|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 731 occurrences of 466 keywords
|
|
|
Results
Found 747 publication records. Showing 746 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
9 | William Aiello, Costas Busch, Maurice Herlihy, Marios Mavronicolas, Nir Shavit, Dan Touitou |
Supporting Increment and Decrement Operations in Balancing Networks. |
STACS |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino |
Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems. |
EUROMICRO |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Qiang Cao, Josep Torrellas, Pedro Trancoso, Josep Lluís Larriba-Pey, Bob Knighten, Youjip Won |
Detailed Characterization of a Quad Pentium Pro Server Running TPC-D. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
Multiprocessor server, TPC-D, Decision support, Performance characterization, Hardware counter |
9 | You-Sung Chang, Bong-Il Park, In-Cheol Park, Chong-Min Kyung |
Customization of a CISC Processor Core for Low-Power Applications. |
ICCD |
1999 |
DBLP DOI BibTeX RDF |
CISC-processor, Complex-instruction, ROM-compile, Low-power-design, Microcode |
9 | Dana S. Henry, Bradley C. Kuszmaul, Vinod Viswanath |
The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture. |
ARVLSI |
1999 |
DBLP DOI BibTeX RDF |
|
9 | Antonio González 0001, Jordi Tubella, Carlos Molina |
Trace-Level Reuse. |
ICPP |
1999 |
DBLP DOI BibTeX RDF |
data value reuse, instruction-level reuse, Instruction-level parallelism |
9 | Faith E. Fich, Maurice Herlihy, Nir Shavit |
On the Space Complexity of Randomized Synchronization. |
J. ACM |
1998 |
DBLP DOI BibTeX RDF |
lower bounds, consensus, space complexity |
9 | Siu-Wai Wu, Allen Gersho |
Additive vector decoding of transform coded images. |
IEEE Trans. Image Process. |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Enric Morancho, José M. Llabería, Àngel Olivé |
Split Last-Address Predictor. |
IEEE PACT |
1998 |
DBLP DOI BibTeX RDF |
speculative execution, dynamic classification, Address prediction |
9 | Vivek Sarkar |
Optimized Execution of Fortran 90 Array Language on Symmetric Shared-Memory Multiprocessors. |
LCPC |
1998 |
DBLP DOI BibTeX RDF |
array language, parallelization, compilers, code optimization, scalarization |
9 | Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino |
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. |
Great Lakes Symposium on VLSI |
1998 |
DBLP DOI BibTeX RDF |
Low-Power Design, Microprocessors |
9 | Jeffrey X. Su, David L. Dill, Jens U. Skakkebæk |
Formally Verifying Data and Control with Weak Reachability Invariants. |
FMCAD |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Xiaoye Jiang, Prasant Mohapatra |
Stream Scheduling Algorithms for Multimedia Storage Servers. |
ICPP |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Sumit Roy 0003, Prithviraj Banerjee, Majid Sarrafzadeh |
Partitioning sequential circuits for low power. |
VLSI Design |
1998 |
DBLP DOI BibTeX RDF |
low-power, gated-clock, sequential synthesis |
9 | Steven Wallace, Brad Calder, Dean M. Tullsen |
Threaded Multiple Path Execution. |
ISCA |
1998 |
DBLP DOI BibTeX RDF |
|
9 | Gary S. Tyson, Todd M. Austin |
Improving the Accuracy and Performance of Memory Communication Through Renaming. |
MICRO |
1997 |
DBLP DOI BibTeX RDF |
data fetching, data value speculation, heap segment, instruction loading, memory access latency, memory communication, memory references, memory renaming, memory segments, processor pipeline, register access techniques, stores, performance, delays, accuracy, instruction-level parallelism, execution time, storage allocation, data dependence speculation, address calculation |
9 | Nicholas C. Gloy, Trevor Blackwell, Michael D. Smith 0001, Brad Calder |
Procedure Placement Using Temporal Ordering Information. |
MICRO |
1997 |
DBLP DOI BibTeX RDF |
profiling, conflict misses, code layout |
9 | Chung-Ho Chen, Akida Wu |
Microarchitecture Support for Improving the Performance of Load Target Prediction. |
MICRO |
1997 |
DBLP DOI BibTeX RDF |
load target prediction, load-use stall, speculative data access, superscalar procesor, pipeline |
9 | Steven Wallace, Nader Bagherzadeh |
Multiple Branch and Block Prediction. |
HPCA |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Prasad Jayanti, Sanjay Khanna |
On the Power of Multi-objects. |
WDAG |
1997 |
DBLP DOI BibTeX RDF |
waitfree, implementation, multi-objects, shared objects, object hierarchy |
9 | Graham A. Mann |
Rational and Effective Linking Across Conceptual Cases - without Rules. |
ICCS |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Enzo Mumolo, Giulia Bernardis |
A Novel Demand Prefetching Algorithm Based on Volterra Adaptive Prediction for Virtual Memory Management Systems. |
HICSS (5) |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Manish Pandey, Richard Raimi, Randal E. Bryant, Magdy S. Abadir |
Formal Verification of Content Addressable Memories Using Symbolic Trajectory Evaluation. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
|
9 | Neil C. Rowe |
Using Local Optimality Criteria for Efficient Information Retrieval with Redundant Information Filters. |
ACM Trans. Inf. Syst. |
1996 |
DBLP DOI BibTeX RDF |
optimization, filters, queries, natural language, Boolean algebra, conjunction |
9 | Shlomit S. Pinter, Adi Yoaz |
Tango: A Hardware-Based Data Prefetching Technique for Superscalar Processors. |
MICRO |
1996 |
DBLP DOI BibTeX RDF |
LRU mechanism, SPEC92 benchmark, Tango, base line architecture, hardware-based data prefetching technique, memory reference instructions, program progress graph, performance, parallel processing, instruction level parallelism, simulation results, superscalar processors, branch target buffer, instruction prefetching, hardware resources, slack time |
9 | Jim Pierce, Trevor N. Mudge |
Wrong-path Instruction Prefetching. |
MICRO |
1996 |
DBLP DOI BibTeX RDF |
|
9 | Manu Gulati, Nader Bagherzadeh |
Performance Study of a Multithreaded Superscalar Microprocessor. |
HPCA |
1996 |
DBLP DOI BibTeX RDF |
multithreading, instruction-level parallelism, Superscalars, out-of-order execution |
9 | André Seznec, Stéphan Jourdan, Pascal Sainrat, Pierre Michaud |
Multiple-Block Ahead Branch Predictors. |
ASPLOS |
1996 |
DBLP DOI BibTeX RDF |
|
9 | Pradeep K. Dubey, George B. Adams III, Michael J. Flynn |
Evaluating Performance Tradeoffs Between Fine-Grained and Coarse-Grained Alternatives. |
IEEE Trans. Parallel Distributed Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Vijay Karamcheti, Andrew A. Chien |
A Comparison of Architectural Support for Messaging in the TMC CM-5 and the Cray T3D. |
ISCA |
1995 |
DBLP DOI BibTeX RDF |
|
9 | Manoj Franklin, Mark Smotherman |
A fill-unit approach to multiple instruction issue. |
MICRO |
1994 |
DBLP DOI BibTeX RDF |
multiple operation issue, instruction-level parallelism, VLIW, superscalar |
9 | Yannis E. Ioannidis, Raghu Ramakrishnan 0001, Linda Winger |
Transitive Closure Algorithms Based on Graph Traversal. |
ACM Trans. Database Syst. |
1993 |
DBLP DOI BibTeX RDF |
node reachability, transitive closure, depth-first search, path computations |
9 | Hans Nilsson |
The External Database in SICStus Prolog. |
LPAR |
1992 |
DBLP DOI BibTeX RDF |
|
9 | Maurice Herlihy |
Wait-Free Synchronization. |
ACM Trans. Program. Lang. Syst. |
1991 |
DBLP DOI BibTeX RDF |
linearization, wait-free synchronization |
9 | Wen-mei W. Hwu, Thomas M. Conte, Pohua P. Chang |
Comparing Software and Hardware Schemes For Reducing the Cost of Branches. |
ISCA |
1989 |
DBLP DOI BibTeX RDF |
|
9 | James R. Goodman, Mary K. Vernon, Philip J. Woest |
Efficent Synchronization Primitives for Large-Scale Cache-Coherent Multiprocessors. |
ASPLOS |
1989 |
DBLP DOI BibTeX RDF |
|
9 | Maurice Herlihy |
Taking concurrency seriously (position paper). |
OOPSLA/ECOOP Workshop on Object-based Concurrent Programming |
1988 |
DBLP DOI BibTeX RDF |
|
9 | S. Krishnaprasad |
Problem dynamics and working set principle as applied to concurrent processing. |
ACM Conference on Computer Science |
1988 |
DBLP DOI BibTeX RDF |
|
9 | Jack B. Dennis, Guang R. Gao |
An efficient pipelined dataflow processor architecture. |
SC |
1988 |
DBLP DOI BibTeX RDF |
|
9 | Thomas Philip |
Using animated color graphics to illustrate software and hardware organizations (abstract only). |
ACM Conference on Computer Science |
1987 |
DBLP DOI BibTeX RDF |
|
9 | Michael N. Nelson, Brent B. Welch, John K. Ousterhout |
Caching in the Sprite Network File System (Extended Abstract). (long version: ACM Trans. Comput. Syst. 6(1): 134-154(1988)) |
SOSP |
1987 |
DBLP DOI BibTeX RDF |
|
9 | Oded Goldreich 0001 |
Towards a Theory of Software Protection. |
CRYPTO |
1986 |
DBLP DOI BibTeX RDF |
|
9 | Fred C. Chow, John L. Hennessy |
Register allocation by priority-based coloring. |
SIGPLAN Symposium on Compiler Construction |
1984 |
DBLP DOI BibTeX RDF |
|
9 | Fred C. Chow, John L. Hennessy |
Register allocation by priority-based coloring (with retrospective) |
Best of PLDI |
1984 |
DBLP DOI BibTeX RDF |
|
9 | Allan Gottlieb, Ralph Grishman, Clyde P. Kruskal, Kevin P. McAuliffe, Larry Rudolph, Marc Snir |
The NYU Ultracomputer-designing a MIMD, shared-memory parallel machine (Extended Abstract). |
ISCA |
1982 |
DBLP BibTeX RDF |
|
9 | C. V. Ramamoorthy, Hon Fung Li |
Efficiency in generalized pipeline networks. |
AFIPS National Computer Conference |
1974 |
DBLP DOI BibTeX RDF |
|
Displaying result #701 - #746 of 746 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8] |
|