|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 1714 occurrences of 747 keywords
|
|
|
Results
Found 4157 publication records. Showing 4157 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
27 | Pelopidas Tsoumanis, Georgios Ioannis Paliaroutis, Nestoras E. Evmorfopoulos, George I. Stamoulis |
On the Impact of Electrical Masking and Timing Analysis on Soft Error Rate Estimation in Deep Submicron Technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | L. Degli Abbati, Rudolf Ullmann, G. Paganini, M. Coppetta, L. Zaia, Vincent Huard, O. Montfort, Riccardo Cantoro, Giorgio Insinga, F. Venini, P. Calao, Paolo Bernardi |
Industrial best practice: cases of study by automotive chip- makers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Hideyuki Ichihara, Takayuki Fukuda, Tomoo Inoue |
A Design of Reliable Linear FSMs with Equivalent States in Stochastic Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Christos Georgakidis, Iordanis Lilitsis, Georgios Stanimeropoulos, Christos P. Sotiriou |
RADPlace: A Timing-aware RAdiation-Hardening Detailed Placement Scheme Satisfying TMR Spacing Constraints. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Corrado De Sio, Sarah Azimi, Andrea Portaluri, Luca Sterpone |
SEU Evaluation of Hardened-by-Replication Software in RISC- V Soft Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Sébastien Thomet, Serge De Paoli, Jean-Marc Daveau, Valérie Bertin, Fady Abouzeid, Philippe Roche, Fakhreddine Ghaffari, Olivier Romain |
FIRECAP: Fail-Reason Capturing hardware module for a RISC-V based System on a Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021, Athens, Greece, October 6-8, 2021, pp. 1-6, 2021, IEEE, 978-1-6654-1609-2. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Luigi Dilillo, Mihalis Psarakis, Taniya Siddiqua (eds.) |
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![IEEE, 978-1-7281-9457-8 The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
27 | Zhen Gao 0005, Xiaohui Wei, Han Zhang, Wenshuo Li, Guangjun Ge, Yu Wang 0002, Pedro Reviriego |
Reliability Evaluation of Pruned Neural Networks against Errors on Parameters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Irith Pomeranz |
Improving a Test Set to Cover Test Holes by Detecting Gate-Exhaustive Faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Annachiara Ruospo, Angelo Balaara, Alberto Bosio, Ernesto Sánchez 0001 |
A Pipelined Multi-Level Fault Injector for Deep Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Dario Mamone, Alberto Bosio, Alessandro Savino, Said Hamdioui, Maurizio Rebaudengo |
On the Analysis of Real-time Operating System Reliability in Embedded Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Sergi Alcaide, Leonidas Kosmidis, Carles Hernández 0001, Jaume Abella 0001 |
Software-only based Diverse Redundancy for ASIL-D Automotive Applications on Embedded HPC Platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Junchao Chen 0001, Thomas Lange, Marko S. Andjelkovic, Aleksandar Simevski, Milos Krstic |
Hardware Accelerator Design with Supervised Machine Learning for Solar Particle Event Prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Avijit Chakraborty, D. M. H. Walker |
Observability Driven Path Generation for Delay Test Coverage Improvement in Scan Limited Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Rubens Luiz Rech Junior, Paolo Rech |
Impact of Layers Selective Approximation on CNNs Reliability and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Marcello Barbirotta, Antonio Mastrandrea, Francesco Menichelli, Francesco Vigli, Luigi Blasi, Abdallah Cheikh, Stefano Sordillo, Fabio Di Gennaro, Mauro Olivieri |
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar 0001 |
Markov Chain-based Modeling and Analysis of Checkpointing with Rollback Recovery for Efficient DSE in Soft Real-time Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Christos Georgakidis, Christos P. Sotiriou |
Radiation Hardening Legalisation Satisfying TMR Spacing Constraints with Respect to HPWL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Aein Rezaei Shahmirzadi, Amir Moradi 0001 |
Clock Glitch versus SIFA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Danilo Cappellone, Stefano Di Mascio, Gianluca Furano, Alessandra Menicucci, Marco Ottavi |
On-Board Satellite Telemetry Forecasting with RNN on RISC-V Based Multicore Processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Xiaohan Yang, Saurabh Khandelwal, Aiqi Jiang, Abusaleh M. Jabir |
A Modelling Attack Resistant Low Overhead Memristive Physical Unclonable Function. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Gianluca Furano, Antonis Tavoularis, Marco Rovatti |
AI in space: applications examples and challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Basma Hajri, Mohammad M. Mansour, Ali Chehab, Hassen Aziza |
A Lightweight Reconfigurable RRAM-based PUF for Highly Secure Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Riccardo Cantoro, Nikolaos Ioannis Deligiannis, Matteo Sonza Reorda, Marcello Traiola, Emanuele Valea |
Evaluating Data Encryption Effects on the Resilience of an Artificial Neural Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Hussein Bazzi, Jérémy Postel-Pellerin, Hassen Aziza, Mathieu Moreau, Adnan Harb |
Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Zhen Gao 0005, Han Zhang, Xiaohui Wei, Tong Yan, Kangkang Guo, Wenshuo Li, Yu Wang 0002, Pedro Reviriego |
Reliable Classification with Ensemble Convolutional Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis |
Efficient LDPC Encoder Designs for Magnetic Recording Media. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Corrado De Sio, Sarah Azimi, Luca Sterpone |
An Emulation Platform for Evaluating the Reliability of Deep Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Athanasios Papadimitriou, Konstantinos Nomikos, Mihalis Psarakis, Ehsan Aerabi, David Hély |
You can detect but you cannot hide: Fault Assisted Side Channel Analysis on Protected Software-based Block Ciphers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Cristiana Bolchini, Luca Cassano, Antonio Miele, Matteo Biasielli |
Lightweight Fault Detection and Management for Image Restoration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Alexander Sprenger, Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand |
Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Payam Habiby, Sebastian Huhn 0001, Rolf Drechsler |
Power-aware Test Scheduling for IEEE 1687 Networks with Multiple Power Domains. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Nagabhushan Reddy, Sankaran Menon, Prashant D. Joshi |
Validation Challenges in Recent Trends of Power Management in Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Vishal Gupta 0002, Danilo Pellegrini, Saurabh Khandelwal, Abusaleh M. Jabir, Shahar Kvatinsky, Eugenio Martinelli, Corrado Di Natale, Marco Ottavi |
Sensing with Memristive Complementary Resistive Switch: Modelling and Simulations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Ryuki Asami, Toshinori Hosokawa, Masayoshi Yoshimura, Masayuki Arai |
A Multiple Target Test Generation Method for Gate-Exhaustive Faults to Reduce the Number of Test Patterns Using Partial MaxSAT. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Giorgio Di Natale, Francesco Regazzoni 0001, Vincent Albanese, Frank Lhermet, Yann Loisel, Abderrahmane Sensaoui, Samuel Pagliarini |
Latest Trends in Hardware Security and Privacy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Yiannakis Sazeides, Arkady Bramnik, Ron Gabor, Chrysostomos Nicopoulos, Ramon Canal, Dimitris Konstantinou, Giorgos Dimitrakopoulos |
2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD). ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Glenn H. Chapman, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Ruoyi Zhao, Israel Koren, Zahava Koren |
Using digital imagers to characterize the dependence of energy and area distributions of SEUs on elevation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | T. Vayssade, Florence Azaïs, Laurent Latorre, François Lefevre |
EVM measurement of RF ZigBee transceivers using standard digital ATE. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Lucas Matana Luza, Daniel Söderström, Georgios Tsiligiannis, Helmut Puchner, Carlo Cazzaniga, Ernesto Sánchez 0001, Alberto Bosio, Luigi Dilillo |
Investigating the Impact of Radiation-Induced Soft Errors on the Reliability of Approximate Computing Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | Soultana Ellinidou, Gaurav Sharma 0006, Olivier Markowitch, Guy Gogniat, Jean-Michel Dricot |
A novel Network-on-Chip security algorithm for tolerating Byzantine faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020, Frascati, Italy, October 19-21, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-9457-8. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
27 | |
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![IEEE, 978-1-7281-2260-1 The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
|
27 | Luca Gnoli, Giuseppe Carnicelli, Alessio Parisi, Luca Urbinati, Burim Kabashi, Fabio Michieletti, Sebastian Ignacio Peradotto Ibarra, Marco Vacca, Mariagrazia Graziano, Jimson Mathew, Marco Ottavi |
Fault Tolerant Photovoltaic Array: A Repair Circuit Based on Memristor Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Alberto Bosio, Ian O'Connor, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Elena I. Vatajelu, Giorgio Di Natale, Lorena Anghel, Surya Nagarajan, Moritz Fieback, Said Hamdioui |
Rebooting Computing: The Challenges for Test and Reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 8138-8143, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Maksim Jenihhin, Matteo Sonza Reorda, Aneesh Balakrishnan, Dan Alexandrescu |
Challenges of Reliability Assessment and Enhancement in Autonomous Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Antonio J. Sánchez, Yubal Barrios, Lucana Santos, Roberto Sarmiento |
Evaluation of TMR effectiveness for soft error mitigation in SHyLoC compression IP core implemented on Zynq SoC under heavy ion radiation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Tsai-Ling Tsai, Jin-Fu Li 0001, Chun-Lung Hsu, Chi-Tien Sun |
Testing of In-Memory-Computing 8T SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Zhen Gao 0001, Jinhua Zhu, Lina Yan, Tong Yan, Pedro Reviriego |
Reliability Evaluation of Polyphase-filter based Decimators Implemented on SRAM-FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Nikos Foutris, Christos Kotselidis, Mikel Luján |
Simulating Wear-out Effects of Asymmetric Multicores at the Architecture Level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Aleksandar Simevski, Patryk Skoncej, Cristiano Calligaro, Milos Krstic |
Scalable and Configurable Multi-Chip SRAM in a Package for Space Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees A. Vissers |
Efficient Error-Tolerant Quantized Neural Network Accelerators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Shanshan Liu 0001, Pedro Reviriego, Kazuteru Namba, Salvatore Pontarelli, Liyi Xiao, Fabrizio Lombardi |
Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Markus Ulbricht 0002, Rizwan Tariq Syed, Milos Krstic |
Developing a Configurable Fault Tolerant Multicore System for Optimized Sensor Processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Glenn H. Chapman, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Bifei Huang, Hao Yang, Israel Koren, Zahava Koren |
Detecting SEUs in Noisy Digital Imagers with small pixels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Alessandro Vallero, Stefano Di Carlo |
Combining Cluster Sampling and ACE analysis to improve fault-injection based reliability evaluation of GPU-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 8138-8143, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Alexander Zeh, Manuela Meier, Viola Rieger |
Parity-Based Concurrent Error Detection Schemes for the ChaCha Stream Cipher. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Feroze Merchant, Anandraj Devarajan, Anik Basu, David Ashen, Brandon Yelton, Prashant D. Joshi |
High Performance Memory Repair. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Toshinori Hosokawa, Hiroshi Yamazaki, Kenichiro Misawa, Masayoshi Yoshimura, Yuki Hirama, Masavuki Arai |
A Low Capture Power Oriented X-filling Method Using Partial MaxSAT Iteratively. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Christian M. Fuchs, Pai H. Chou, Xiaoqing Wen, Nadia M. Murillo, Gianluca Furano, Stefan Holst, Antonis Tavoularis, Shyue-Kung Lu, Aske Plaat, Kostas Marinis |
A Fault-Tolerant MPSoC For CubeSats. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Annachiara Ruospo, Riccardo Cantoro, Ernesto Sánchez 0001, Pasquale Davide Schiavone, Angelo Garofalo, Luca Benini |
On-line Testing for Autonomous Systems driven by RISC-V Processor Design Verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Hideyuki Ichihara, Yuki Maeda, Tsuyoshi Iwagaki, Tomoo Inoue |
State Encoding with Stochastic Numbers for Transient Fault Tolerant Linear Finite State Machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Masayoshi Yoshimura, Yuki Takeuchi, Hiroshi Yamazaki, Toshinori Hosokawa |
A State Assignment Method to Improve Transition Fault Coverage for Controllers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Boyang Du, Sarah Azimi, Corrado De Sio, Ludovica Bozzoli, Luca Sterpone |
On the Reliability of Convolutional Neural Network Implementation on SRAM-based FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Ana Lasheras, Ramon Canal, Eva Rodríguez, Luca Cassano |
Protecting RSA Hardware Accelerators against Differential Fault Analysis through Residue Checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Fritz G. Previlon, Charu Kalra, David R. Kaeli, Paolo Rech |
A Comprehensive Evaluation of the Effects of Input Data on the Resilience of GPU Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Avishek Choudhury, Biplab K. Sikdar |
CORE-VR: A Coherence and Reusability Aware Low Voltage Fault Tolerant Cache in Multicore. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Jiaqiang Li, Pedro Reviriego, Liyi Xiao, Alexander Klockmann |
Protecting Large Word Size Memories against MCUs with 3-bit Burst Error Correction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Donald Kline Jr., Stephen Longofono, Rami G. Melhem, Alex K. Jones |
Predicting Single Event Effects in DRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Lucas Matana Luza, Alexandre Besser, Viyas Gupta, Arto Javanainen, Ali Mohammadzadeh, Luigi Dilillo |
Effects of Heavy Ion and Proton Irradiation on a SLC NAND Flash Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Daniel Oliveira 0002, Philippe O. A. Navaux, Paolo Rech |
Increasing the Efficiency and Efficacy of Selective-Hardening for Parallel Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Mahsa Mousavi, Hamid Reza Pourshaghaghi, Henk Corporaal, Akash Kumar 0001 |
Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Jerrin Pathrose, Leon van de Logt, Hans G. Kerkhoff |
Analog Test Interface for IEEE 1687 Employing Split SAR Architecture to Support Embedded Instrument Dependability Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Danny Santoso, Hyeran Jeon |
Understanding of GPU Architectural Vulnerability for Deep Learning Workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Satyadev Ahlawat, Jaynarayan T. Tudu, Manoj Singh Gaur, Masahiro Fujita, Virendra Singh |
Preventing Scan Attack through Test Response Encryption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | Stefano Di Mascio, Alessandra Menicucci, Eberhard K. A. Gill, Gianluca Furano, Claudio Monteleone |
On the Criticality of Caches in Fault-Tolerant Processors for Space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, October 2-4, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-2260-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
27 | |
2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![IEEE Computer Society, 978-1-5386-8398-9 The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
27 | Puneet Ramesh Savanur, Spyros Tragoudas |
Threshold Voltage Extraction Using Static NBTI Aging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Abhishek Das, Nur A. Touba |
Efficient Non-Binary Hamming Codes for Limited Magnitude Errors in MLC PCMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Glenn H. Chapman, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Israel Koren, Zahava Koren |
Analysis of Single Event Upsets Based on Digital Cameras with Very Small Pixels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Lake Bu, Hai Cheng, Michel A. Kinsy |
Fast Dynamic Device Authentication Based on Lorenz Chaotic Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Elisabeth Baseman, Nathan DeBardeleben, Sean Blanchard, Juston S. Moore, Olena Tkachenko, Kurt B. Ferreira, Taniya Siddiqua, Vilas Sridharan |
Physics-Informed Machine Learning for DRAM Error Modeling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Naixing Wang, Irith Pomeranz, Brady Benware, M. Enamul Amyeen, Srikanth Venkataraman |
Improving the Resolution of Multiple Defect Diagnosis by Removing and Selecting Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Mark Wilkening, Fritz Previlon, David R. Kaeli, Sudhanva Gurumurthi, Steven Raasch, Vilas Sridharan |
Evaluating the Resilience of Parallel Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Nestor E. Evmorfopoulos, George Dimitriou, Georgios I. Stamoulis |
A Placement-Aware Soft Error Rate Estimation of Combinational Circuits for Multiple Transient Faults in CMOS Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Vishal Gupta 0002, Saurabh Khandelwal, Jimson Mathew, Marco Ottavi |
45nm Bit-Interleaving Differential 10T Low Leakage FinFET Based SRAM with Column-Wise Write Access Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Yuta Yamamoto, Kazuteru Namba |
Construction of Latch Design with Complete Double Node Upset Tolerant Capability Using C-Element. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Semiu A. Olowogemo, William H. Robinson, Daniel B. Limbrick |
Effects of Voltage and Temperature Variations on the Electrical Masking Capability of Sub-65 nm Combinational Logic Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Gianluca Furano, Antonis Tavoularis, Lucana Santos, Veronique Ferlet-Cavrois, Cesar Boatella, Ruben Garcia Alia, Pablo Fernández-Martínez, Maria Kastriotou, Vanessa Wyrwoll, Salvatore Danzeca, Maris Tali, Dejan Gacnik, Iztok Kramberger, Lars Juul, Konstantinos Maragos 0001, George Lentaris |
FPGA SEE Test with Ultra-High Energy Heavy Ions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-4, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Zois-Gerasimos Tasoulas, Ryan Guss, Iraklis Anagnostopoulos |
Performance-Based and Aging-Aware Resource Allocation for Concurrent GPU Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Pilin Junsangsri, Fabrizio Lombardi |
Multiple Fault Detection in Nano Programmable Logic Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Marcello Traiola, Arnaud Virazel, Patrick Girard 0001, Mario Barbareschi, Alberto Bosio |
Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Ludovica Bozzoli, Luca Sterpone |
MATS**: An On-Line Testing Approach for Reconfigurable Embedded Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Markus Schütz, Andreas Steininger, Florian Huemer, Jakob Lechner |
State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Zhen Gao 0001, Lina Yan, Jinhua Zhu, Ruishi Han, Pedro Reviriego |
Analysis of the Effects of Single Event Upsets (SEUs) on User Memory in FPGA Implemented Viterbi Decoders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco |
A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Pavan Kumar Javvaji, Spyros Tragoudas |
A Method to Model Statistical Path Delays for Accurate Defect Coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Andrea Floridia, Ernesto Sánchez 0001 |
Hybrid On-Line Self-Test Strategy for Dual-Core Lockstep Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Danilo Pellegrini, Marco Ottavi, Eugenio Martinelli, Corrado Di Natale |
Complementary Resistive Switch Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-5, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | Irith Pomeranz |
Postprocessing Procedure for Reducing the Faulty Switching Activity of a Low-Power Test Set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![In: 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2018, Chicago, IL, USA, October 8-10, 2018, pp. 1-6, 2018, IEEE Computer Society, 978-1-5386-8398-9. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
27 | |
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2017, Cambridge, United Kingdom, October 23-25, 2017 ![Search on Bibsonomy](Pics/bibsonomy.png) |
DFT ![IEEE Computer Society, 978-1-5386-0362-8 The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
Displaying result #301 - #400 of 4157 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ 11][ 12][ 13][ >>] |
|