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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 79 occurrences of 73 keywords
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Results
Found 1930 publication records. Showing 1930 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Weihang Tan, Antian Wang, Yunhao Xu, Yingjie Lao |
Area-Efficient Pipelined VLSI Architecture for Polar Decoder.  |
ISVLSI  |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ricardo Coelho, Felipe Tanus, Álvaro F. Moreira, Gabriel L. Nazar |
ACQuA: A Parallel Accelerator Architecture for Pure Functional Programs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanni Amedeo Cirillo, Giovanna Turvani, Mario Simoni, Mariagrazia Graziano |
Advances in Molecular Quantum Computing: from Technological Modeling to Circuit Design. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Selahattin Sayil, Subed Lamichhane, Kutay Sayil |
Coupling Noise Mitigation using a Pass Transistor. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuwen Cui, Shakthi Prabhakar, Hui Zhao 0013, Saraju P. Mohanty, Juan Fang |
A Low-Cost Conflict-Free NoC Architecture for Heterogeneous Multicore Systems. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Liuting Shang, Muhammad Adil, Ramtin Madani, Chenyun Pan |
Fast Linear Programming Optimization Using Crossbar-Based Analog Accelerator. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shao-I Chu, Chen-En Hsieh, Yi-Ming Lee, Sayed Ahmad Salehi |
Enhanced Architecture for Computing Polynomials Using Unipolar Stochastic Logic. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Gianmarco Ottavi, Angelo Garofalo, Giuseppe Tagliavini, Francesco Conti 0001, Luca Benini, Davide Rossi |
A Mixed-Precision RISC-V Processor for Extreme-Edge DNN Inference. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcel Walter, Rolf Drechsler |
Design Automation for Field-Coupled Nanotechnologies. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros, Pekka Jääskeläinen, Marisa Catalán Cid, Evangelia I. Zacharaki, Apostolos P. Fournaris, Aris S. Lalos |
CPSoSaware: Cross-Layer Cognitive Optimization Tools & Methods for the Lifecycle Support of Dependable CPSoS. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Hui Zhang, Wei Wu, Yufei Ma 0002, Zhongfeng Wang 0001 |
Efficient Hardware Post Processing of Anchor-Based Object Detection on FPGA. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcos T. Leipnitz, Murilo R. Perleberg, Marcelo Schiavon Porto, Gabriel L. Nazar |
Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ameer Shalabi, Kolin Paul, Tara Ghasempouri, Jaan Raik |
NV-SP: A New High Performance and Low Energy NVM-Based Scratch Pad. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yaohua Wang, Xiaowen Chen, Xiao Hu |
Associative Thread Compaction for Efficient Control Flow Handling in GPGPUs. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinay C. Patil, Sandip Kundu |
On Leveraging Multi-threshold FinFETs for Design Obfuscation. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Alish Kanani, Jigar Mehta, Neeraj Goel |
ACA-CSU: A Carry Selection Based Accuracy Configurable Approximate Adder Design. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Abdulqader Nael Mahmoud, Frederic Vanderveken, Christoph Adelmann, Florin Ciubotaru, Sorin Cotofana, Said Hamdioui |
2-Output Spin Wave Programmable Logic Gate. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ahmad Alkhodair, Saraju P. Mohanty, Elias Kougianos, Deepak Puthal |
McPoRA: A Multi-chain Proof of Rapid Authentication for Post-Blockchain Based Security in Large Scale Complex Cyber-Physical Systems. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Eric Homan, Chonghan Lee, Jack Sampson, John P. Sustersic, Vijaykrishnan Narayanan |
DoubtNet: Using Semantic Context to Enable Adaptive Inference for the IoT. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Christos P. Antonopoulos, Georgios Keramidas, Vassilis Tsakanikas, Evi Faliagka, Christos Panagiotou, Nikolaos S. Voros |
Capacity Building Among European Stakeholders In the Areas of Cyber-Physical Systems, IoT & Embedded Systems: The SMART4ALL Digital Innovation Hub Perspective. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Teruo Tanimoto, Shuhei Matsuo, Satoshi Kawakami, Yutaka Tabuchi, Masao Hirokawa, Koji Inoue |
How Many Trials Do We Need for Reliable NISQ Computing? |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Vladimir Herdt, Rolf Drechsler |
Efficient Techniques to Strongly Enhance the Virtual Prototype Based Design Flow. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Jianchi Sun, Nikhilesh Sharma, Jacob Chakareski, Nicholas Mastronarde, Yingjie Lao |
Action Evaluation Hardware Accelerator for Next-Generation Real-Time Reinforcement Learning in Emerging IoT Systems. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Juan Fang, Jiaxing Zhang, Shuaibing Lu, Hui Zhao 0013 |
Exploration on Task Scheduling Strategy for CPU-GPU Heterogeneous Computing System. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Mounika Kelam, Balaji Yadav Battu, Zia Abbas |
A Compact, Power Efficient, Self-Adaptive and PVT Invariant CMOS Relaxation Oscillator. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Nandan Kumar Jha, Shreyas Ravishankar, Sparsh Mittal, Arvind Kaushik, Dipan Mandal, Mahesh Chandra |
DRACO: Co-Optimizing Hardware Utilization, and Performance of DNNs on Systolic Accelerator. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Amit Mahesh Joshi, Prateek Jain 0006, Saraju P. Mohanty |
Secure-iGLU: A Secure Device for Noninvasive Glucose Measurement and Automatic Insulin Delivery in IoMT Framework. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy |
A Fast Transient Digitally Assisted Flash-Based Modular LDO for Sensor Nodes in WBAN. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Christoph Frisch, Michael Tempelmeier, Michael Pehl |
PAG-IoT: A PUF and AEAD Enabled Trusted Hardware Gateway for IoT Devices. |
ISVLSI |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaoru Xie, Fangxuan Sun, Jun Lin 0001, Zhongfeng Wang 0001 |
Fast-ABC: A Fast Architecture for Bottleneck-Like Based Convolutional Neural Networks. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mimi Xie, Yawen Wu, Zhenge Jia, Jingtong Hu |
In-memory AES Implementation for Emerging Non-Volatile Main Memory. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Anup Gangwar, Zheng Xu, Nitin Kumar Agarwal, Ravishankar Sreedharan, Ambica Prasad |
Traffic Driven Automated Synthesis of Network-on-Chip from Physically Aware Behavioral Specification. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruizhe Cai, Xiaolong Ma, Olivia Chen, Ao Ren, Ning Liu 0007, Nobuyuki Yoshikawa, Yanzhi Wang |
IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Renjie Yao, Yaoyao Ye, Weichen Liu |
Design of a Hierarchical Clos-Benes Optical Network-on-Chip Architecture. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Adarsha Balaji, Anup Das 0001 |
A Framework for the Analysis of Throughput-Constraints of SNNs on Neuromorphic Hardware. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Arash Fayyazi, Souvik Kundu 0002, Shahin Nazarian, Peter A. Beerel, Massoud Pedram |
CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Xinyi Zhang, Weiwen Jiang, Yiyu Shi 0001, Jingtong Hu |
When Neural Architecture Search Meets Hardware Implementation: from Hardware Awareness to Co-Design. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Surajeet Ghosh, Shaon Dasgupta, Sanchita Saha Ray |
A Comparison-free Hardware Sorting Engine. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shaahin Angizi, Zhezhi He, Dayane Alfenas Reis, Xiaobo Sharon Hu, Wilman Tsai, Shy Jay Lin, Deliang Fan |
Accelerating Deep Neural Networks in Processing-in-Memory Platforms: Analog or Digital Approach? |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing Zeng, Yangcan Zhou, Jun Lin 0001, Zhongfeng Wang 0001 |
Hardware Implementation of Improved Fast-SSC-Flip Decoder for Polar Codes. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Sreeja Chowdhury, Hao-Ting Shen, Beomsoo Park, Nima Maghari, Domenic Forte |
Aging Analysis of Low Dropout Regulator for Universal Recycled IC Detection. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudipta Paul 0001, Pritha Banerjee 0001, Susmita Sur-Kolay |
Minimization of Flare in EUVL by Simultaneous Wire Segment Perturbation and Dummification. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shubham Rai, Ansh Rupani, Pallab Nath, Akash Kumar 0001 |
Hardware Watermarking Using Polymorphic Inverter Designs Based On Reconfigurable Nanotechnologies. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Alberto Marchisio, Muhammad Abdullah Hanif, Faiq Khalid, George Plastiras, Christos Kyrkou, Theocharis Theocharides, Muhammad Shafique 0001 |
Deep Learning for Edge Computing: Current Trends, Cross-Layer Optimizations, and Open Research Challenges. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Nicolás Wainstein, Tamir Tsabari, Yarden Goldin, Eilam Yalon, Shahar Kvatinsky |
A Dual-Band CMOS Low-Noise Amplifier using Memristor-Based Tunable Inductors. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Pinchen Cui, Ujjwal Guin |
Countering Botnet of Things using Blockchain-Based Authenticity Framework. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019 |
ISVLSI |
2019 |
DBLP BibTeX RDF |
|
| 1 | Süleyman Savas, Yassin Atwa, Tomas Nordström, Zain Ul-Abdin |
Using Harmonized Parabolic Synthesis to Implement a Single-Precision Floating-Point Square Root Unit. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Mehrnoosh Raoufi, Quan Deng, Youtao Zhang, Jun Yang 0002 |
PageCmp: Bandwidth Efficient Page Deduplication through In-memory Page Comparison. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Shichao Yu, Weiqiang Liu 0001, Máire O'Neill |
An Improved Automatic Hardware Trojan Generation Platform. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Adnan Siraj Rakin, Deliang Fan |
Defense-Net: Defend Against a Wide Range of Adversarial Attacks through Adversarial Detector. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheng Xu, Jacob Abraham |
Design of a Safe Convolutional Neural Network Accelerator. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashutosh Dhar, Sitao Huang, Jinjun Xiong, Damir A. Jamsek, Bruno Mesnet, Jian Huang 0006, Nam Sung Kim, Wen-Mei W. Hwu, Deming Chen |
Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Salma Hesham, Diana Goehringer, Mohamed A. Abd El Ghany |
Dark-Silicon Inspired Energy Efficient Hierarchical TDM NoC. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran |
TSV-IaS: Analytic Analysis and Low-Cost Non-Preemptive on-Line Detection and Correction Method for TSV Defects. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Timothy J. Baker, John P. Hayes |
Impact of Autocorrelation on Stochastic Circuit Accuracy. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Hao Cai, Honglan Jiang, Menglin Han, Zhaohao Wang, You Wang 0002, Jun Yang 0006, Jie Han 0001, Leibo Liu, Weisheng Zhao |
Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Alexandros Kouris, Stylianos I. Venieris, Christos-Savvas Bouganis |
Towards Efficient On-Board Deployment of DNNs on Intelligent Autonomous Systems. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuntao Liu 0001, Dana Dachman-Soled, Ankur Srivastava 0001 |
Mitigating Reverse Engineering Attacks on Deep Neural Networks. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Arman Roohi, Ronald F. DeMara |
IRC Cross-Layer Design Exploration of Intermittent Robust Computation Units for IoTs. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ann Gordon-Ross, Saleh Abdel-Hafeez, Mohamad Hammam Alsafrjalani |
A One-Cycle FIFO Buffer for Memory Management Units in Manycore Systems. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Osman Elgawi, A. M. Mutawa, Afaq Ahmad 0001 |
Energy-Efficient Embedded Inference of SVMs on FPGA. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Pankaj Bhowmik, Md Jubaer Hossain Pantho, Sujan Kumar Saha, Christophe Bobda |
A Reconfigurable Layered-Based Bio-Inspired Smart Image Sensor. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yao Chen 0008, Kai Zhang, Cheng Gong, Cong Hao, Xiaofan Zhang 0001, Tao Li 0022, Deming Chen |
T-DLA: An Open-source Deep Learning Accelerator for Ternarized DNN Models on Embedded FPGA. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jingyan Fu, Zhiheng Liao, Na Gong, Jinhui Wang |
Linear Optimization for Memristive Device in Neuromorphic Hardware. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Zuzak, Ankur Srivastava 0001 |
Memory Locking: An Automated Approach to Processor Design Obfuscation. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Brett Mathis, James E. Stine |
A Novel Single/Double Precision Normalized IEEE 754 Floating-Point Adder/Subtracter. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Johan Marconot, David Hély, Florian Pebay-Peyroula |
SPN-DPUF: Substitution-Permutation Network Based Secure Circuit for Digital PUF. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiming Hu, Shuang Liang 0010, Jincheng Yu, Yu Wang 0002, Huazhong Yang |
On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yasaswy Kasarabada, Sudheer Ram Thulasi Raman, Ranga Vemuri |
Deep State Encryption for Sequential Logic Circuits. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yasuhiro Takahashi, Hiroki Koyasu, S. Dinesh Kumar, Himanshu Thapliyal |
Post-Layout Simulation of Quasi-Adiabatic Logic Based Physical Unclonable Function. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Chakraborty 0001, Ankur Srivastava 0001 |
Hardware-Software Co-Design Based Obfuscation of Hardware Accelerators. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Jong Bin Lim, Deming Chen |
Automated Communication and Floorplan-Aware Hardware/Software Co-Design for SoC. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ali Ozdemir, Mshabab Alrizah, Kyusun Choi |
Optimization of Comparator Selection Algorithm for TIQ Flash ADC Using Dynamic Programming Approach. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Sunil R., Siddharth R. K., Nithin Y. B. Kumar, M. H. Vasantha |
An Asynchronous Analog to Digital Converter for Video Camera Applications. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Walter Lau Neto, Xifan Tang, Max Austin, Luca G. Amarù, Pierre-Emmanuel Gaillardon |
Improving Logic Optimization in Sequential Circuits using Majority-inverter Graphs. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yang Sun, Spencer K. Millican |
Test Point Insertion Using Artificial Neural Networks. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Soheil Nazar Shahsavani, Massoud Pedram |
A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Xiong, Fengbin Tu, Shouyi Yin, Shaojun Wei |
Towards Efficient Compact Network Training on Edge-Devices. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Luciano L. Caimi, Fernando Gehm Moraes |
Security in Many-Core SoCs Leveraged by Opaque Secure Zones. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Prashansa Mukim, Aditya Dalakoti, David McCarthy, Brandon Pon, Carrie Segal, Merritt Miller, James F. Buckwalter, Forrest Brewer |
Distributed Pulse Rotary Traveling Wave VCO: Architecture and Design. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Xinzhe Liu, Fupeng Chen, Yajun Ha |
Area Efficient Box Filter Acceleration by Parallelizing with Optimized Adder Tree. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Zengchao Yan, Jun Lin 0001, Zhongfeng Wang 0001 |
A Low-Complexity RS Decoder for Triple-Error-Correcting RS Codes. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Kevin Vaca, Archit Gajjar, Xiaokun Yang |
Real-Time Automatic Music Transcription (AMT) with Zync FPGA. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Pampa Howladar, Pranab Roy, Hafizur Rahaman 0001 |
Micro-electrode-dot Array Based Biochips : Advantages of Using Different Shaped CMAs. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Sébastien Ollivier, Donald Kline Jr., Kawsher A. Roxy, Rami G. Melhem, Sanjukta Bhanja, Alex K. Jones |
The Power of Orthogonality. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Md Jubaer Hossain Pantho, Pankaj Bhowmik, Christophe Bobda |
Neuromorphic Image Sensor Design with Region-Aware Processing. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler |
Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishalini R. Laguduva, Sheikh Ariful Islam, Sathyanarayanan N. Aakur, Srinivas Katkoori, Robert Karam |
Machine Learning Based IoT Edge Node Security Attack and Countermeasures. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Amin Rezaei 0001, Jie Gu 0001, Hi Zhou |
Hybrid Memristor-CMOS Obfuscation Against Untrusted Foundries. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ugo Mureddu, Brice Colombier, Nathalie Bochard, Lilian Bossuet, Viktor Fischer |
Transient Effect Ring Oscillators Leak Too. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin |
Towards Hardware-Assisted Security for IoT Systems. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu Zou, Mingjie Lin |
FAST: A Frequency-Aware Skewed Merkle Tree for FPGA-Secured Embedded Systems. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Dimitrios Stathis 0001, Yu Yang, Saurabh Tewari, Ahmed Hemani, Kolin Paul, Manfred G. Grabherr, Rafi Ahmad |
Approximate Computing Applied to Bacterial Genome Identification using Self-Organizing Maps. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Bryson Shannon, Spandana Etikala, Yutian Gui, Ali Shuja Siddiqui, Fareena Saqib |
Blockchain Based Distributed Key Provisioning and Secure Communication over CAN FD. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Amro Awad, Suboh Suboh, Mao Ye, Kazi Abu Zubair, Mazen Al-Wadi |
Persistently-Secure Processors: Challenges and Opportunities for Securing Non-Volatile Memories. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Ning-Chi Huang, Yu-Guang Chen, Kai-Chiang Wu |
Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheyu Liu, Erxiang Ren, Li Luo, Qi Wei 0001, Xing Wu 0005, Xueqing Li, Fei Qiao, Xin-Jun Liu, Huazhong Yang |
A 1.8mW Perception Chip with Near-Sensor Processing Scheme for Low-Power AIoT Applications. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Zheyu Liu, Zichen Fan, Qi Wei 0001, Xing Wu 0005, Fei Qiao, Ping Jin, Xinjun Liu, Chengliang Liu, Huazhong Yang |
Design of Switched-Current Based Low-Power PIM Vision System for IoT Applications. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
|
| 1 | Siva Nishok Dhanuskodi, Daniel E. Holcomb |
Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility. |
ISVLSI |
2019 |
DBLP DOI BibTeX RDF |
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