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Results
Found 315 publication records. Showing 315 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Wenceslas Rahajandraibe, Fayrouz Haddad, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal |
Low cost built-in-tuning of on-chip passive filters for low-if double quadrature rf receiver. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Guimao Zhang, Maoxiang Yi, Yong Miao, Dawen Xu 0002, Huaguo Liang |
NBTI-induced circuit aging optimization by protectability-aware gate replacement technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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1 | Yu-Wei Lee, Nur A. Touba |
Improving logic obfuscation via logic cone analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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1 | Víctor H. Champac, Yervant Zorian, Letícia Maria Bolzani Pöhls, Vishwani D. Agrawal |
Message from the LATS2015 Chairs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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1 | Iuri A. C. Gomes, Mayler G. A. Martins, André Inácio Reis, Fernanda Lima Kastensmidt |
Using only redundant modules with approximate logic to reduce drastically area overhead in TMR. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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1 | Rigoberto Bracamontes-Salazar, Esdras Juárez-Hernández, Federico Lobato-Lopez, Esteban Martinez Guerrero |
CMOS amplifier with self-correction offset for SerDes applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | André B. M. Gomes, Fredy A. M. Alves, Ricardo S. Ferreira 0001, José Augusto Miranda Nacif |
Vericonn: a tool to generate efficient interconnection networks for post-silicon debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Jesus Lopez-Arredondo, Esteban Tlelo-Cuautle, Rodolfo Trejo-Guerra |
Optimizing an LDO voltage regulator by evolutionary algorithms considering tolerances of the circuit elements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-5, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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1 | Sandeep Kumar Singh 0003, Abir J. Mondal, Alak Majumder |
Generation and performance evaluation of reconfigurable random routing algorithm for 2D-mesh NoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Carlos Leong, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001 |
Fault-tolerance in FPGA focusing power reduction or performance enhancement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Hector Villacorta, Roberto Gómez 0001, Sebastià A. Bota, Jaume Segura 0001, Víctor H. Champac |
Impact of increasing the fin height on soft error rate and static noise margin in a FinFET-based SRAM cell. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Carlos Viale, Pablo A. Petrashin, Luis E. Toledo, Walter J. Lancioni, Carlos Daniel Vázquez |
Single event effects in an analog SOI transconductor: a case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | J. Rafael del-Rey, Zabdiel Brito-Brito, José Ernesto Rayas-Sánchez |
Impedance matching analysis and EMC validation of a low-cost PCB differential interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-5, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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1 | J. L. Bueno-Ruiz, C. A. Arriaga-Arriaga, R. Huerta-Barrera, G. V. Cruz-Dominguez, C. H. Pimentel-Romero, Jesús M. Muñoz-Pacheco, Luz del Carmen Gómez-Pavón, Olga Guadalupe Félix-Beltrán, Arnulfo Luis-Ramos |
Fault conditions of a simple chaotic circuit under capacitor nonlinear effects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-5, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Adit D. Singh |
Scan based two-pattern tests: should they target opens instead of TDFs? ![Search on Bibsonomy](Pics/bibsonomy.png) |
LATS ![In: 16th Latin-American Test Symposium, LATS 2015, Puerto Vallarta, Mexico, March 25-27, 2015, pp. 1-2, 2015, IEEE Computer Society, 978-1-4673-6710-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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Displaying result #301 - #315 of 315 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4] |
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