Search results for "MRAM"

Hits ?▲	Authors	Title	Venue	Year	Link
16	Lizhou Wu, Mottaqiallah Taouil, Siddharth Rao, Erik Jan Marinissen, Said Hamdioui	Survey on STT-MRAM Testing: Failure Mechanisms, Fault Models, and Tests.	CoRR	2020	DBLP BibTeX RDF
16	Yu Pan, Xiaotao Jia, Zhen Cheng, Peng Ouyang, Xueyan Wang, Jianlei Yang 0001, Weisheng Zhao	An STT-MRAM based reconfigurable computing-in-memory architecture for general purpose computing.	CCF Trans. High Perform. Comput.	2020	DBLP DOI BibTeX RDF
16	Hao Cai, Honglan Jiang, Yongliang Zhou, Menglin Han, Bo Liu 0019	Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing.	CCF Trans. High Perform. Comput.	2020	DBLP DOI BibTeX RDF
16	Jinkai Wang, Chenyu Lian, Yining Bai, Guanda Wang, Zhizhong Zhang, Zhenyi Zheng, Lei Chen, Kelian Lin, Kun Zhang 0030, Youguang Zhang, Xiulong Wu, Sorin Cotofana, Yue Zhang 0010	A Self-Matching Complementary-Reference Sensing Scheme for High-Speed and Reliable Toggle Spin Torque MRAM.	IEEE Trans. Circuits Syst.	2020	DBLP DOI BibTeX RDF
16	Yongliang Zhou, Hao Cai, Lei Xie, Menglin Han, Mingyue Liu, Shi Xu, Bo Liu 0019, Weisheng Zhao, Jun Yang 0006	A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM.	IEEE Trans. Circuits Syst. I Fundam. Theory Appl.	2020	DBLP DOI BibTeX RDF
16	Bi Wu, Chao Wang 0094, Zhaohao Wang, Ying Wang 0001, Deming Zhang, Dijun Liu, Youguang Zhang, Xiaobo Sharon Hu	Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories.	IEEE Trans. Circuits Syst.	2020	DBLP DOI BibTeX RDF
16	Yongliang Zhou, Hao Cai, Bo Liu 0019, Weisheng Zhao, Jun Yang 0006	MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing.	IEEE Trans. Circuits Syst.	2020	DBLP DOI BibTeX RDF
16	Chenji Liu, Lan Chen, Xiaoran Hao, Mao Ni, Hao Sun	Fast cacheline-based data replacement for hybrid DRAM and STT-MRAM main memory.	IEICE Electron. Express	2020	DBLP DOI BibTeX RDF
16	Yeongkyo Seo, Kon-Woo Kwon	Area-optimized design of SOT-MRAM.	IEICE Electron. Express	2020	DBLP DOI BibTeX RDF
16	Taejin Park, Jae Young Hur, Wooyoung Jang	TLC STT-MRAM aware LLC for multicore processor.	IEICE Electron. Express	2020	DBLP DOI BibTeX RDF
16	Tae Young Lee, Kazutaka Yamane, Lee Yong Hau, Robin Chao, Nyuk Leong Chung, Vinayak Bharat Naik, K. Sivabalan, Jae Hyun Kwon, Jia Hao Lim, Wah-Peng Neo, Kevin Khua, Naganivetha Thiyagarajah, Suk Hee Jang, Behtash Behin-Aein, Eng-Huat Toh, Yuichi Otani, Dinggui Zeng, Nivetha Balasankaran, Lian Choo Goh, Timothy Ling, Jay Hwang, Lei Zhang, Rachel Low, Soon Leng Tan, Chim Seng Seet, Jia Wen Ting, Stanley Ong, Young Seon You, Swee Tuck Woo, Elgin Quek, Soh Yun Siah	Magnetic Immunity Guideline for Embedded MRAM Reliability to Realize Mass Production.	IRPS	2020	DBLP DOI BibTeX RDF
16	Jia Hao Lim, Nagarajan Raghavan, Jae Hyun Kwon, Tae Young Lee, Robin Chao, Nyuk Leong Chung, Kazutaka Yamane, Naganivetha Thiyagarajah, Vinayak Bharat Naik, Kin Leong Pey	Origins and Signatures of Tail Bit Failures in Ultrathin MgO Based STT-MRAM.	IRPS	2020	DBLP DOI BibTeX RDF
16	Yongsung Ji, Hyunjae Goo, Jungman Lim, Tae-Young Jeong, Taiki Uemura, Gun Rae Kim, Boil Seo, Seungbae Lee, Goeun Park, Jeongmin Jo, Sang-Il Han, Kilho Lee, Junghyuk Lee, Sohee Hwang, Daesop Lee, Suksoo Pyo, Hyun Taek Jung, Shinhee Han, Seungmo Noh, Kiseok Suh, Sungyoung Yoon, Hyeonwoo Nam, Hyewon Hwang, Hai Jiang 0005, J. W. Kim, D. Kwon, Yoonjong Song, K. H. Koh, Hwasung Rhee, Sangwoo Pae, E. Lee	Reliability of Industrial grade Embedded-STT-MRAM.	IRPS	2020	DBLP DOI BibTeX RDF
16	Shanggang Xie, Jiye Huang, Kui Cai 0001, Zhen Mei	The FPGA Implementation of Neural Network-Based Dynamic Threshold Detection for STT-MRAM.	CSNDSP	2020	DBLP DOI BibTeX RDF
16	Piyush Jain, Akshay Kumar, Nicolaas Van Winkelhoff, Didier Gayraud, Surya Gupta, Abdelali El Amraoui, Giorgio Palma, Alexandra Gourio, Laurent Vachez, Luc Palau, Jean-Christophe Buy, Cyrille Dray	High Density STT-MRAM compiler design, validation and characterization methodology in 28nm FDSOI technology.	DATE	2020	DBLP DOI BibTeX RDF
16	Sarath Mohanachandran Nair, Rajendra Bishnoi, Arunkumar Vijayan, Mehdi Baradaran Tahoori	Dynamic Faults based Hardware Trojan Design in STT-MRAM.	DATE	2020	DBLP DOI BibTeX RDF
16	Mostafa Hadizadeh, Elham Cheshmikhani, Hossein Asadi 0001	STAIR: High Reliable STT-MRAM Aware Multi-Level I/O Cache Architecture by Adaptive ECC Allocation.	DATE	2020	DBLP DOI BibTeX RDF
16	Shaahin Angizi, Jiao Sun, Wei Zhang 0076, Deliang Fan	PIM-Aligner: A Processing-in-MRAM Platform for Biological Sequence Alignment.	DATE	2020	DBLP DOI BibTeX RDF
16	Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui	Impact of Magnetic Coupling and Density on STT-MRAM Performance.	DATE	2020	DBLP DOI BibTeX RDF
16	Aqeel Anwar, Arijit Raychowdhury, Ryan Hatcher, Titash Rakshit	XBAROPT - Enabling Ultra-Pipelined, Novel STT MRAM Based Processing-in-Memory DNN Accelerator.	AICAS	2020	DBLP DOI BibTeX RDF
16	Anh Tuan Do, Xuanyao Fong, Fei Li	Aggressive Leakage Current Reduction for Embedded MRAM Using Block-Level Power Gating.	IECON	2020	DBLP DOI BibTeX RDF
16	Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev	Accelerating STT-MRAM Ramp-up Characterization.	NEWCAS	2020	DBLP DOI BibTeX RDF
16	Yu-Der Chih, Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Chieh-Pu Lo, Meng-Chun Shih, Kuei-Hung Shen, Harry Chuang, Tsung-Yung Jonathan Chang	13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference.	ISSCC	2020	DBLP DOI BibTeX RDF
16	Tung-Cheng Chang, Yen-Cheng Chiu, Chun-Ying Lee, Je-Min Hung, Kuang-Tang Chang, Cheng-Xin Xue, Ssu-Yen Wu, Hui-Yao Kao, Peng Chen, Hsiao-Yu Huang, Shih-Hsih Teng, Meng-Fan Chang	13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices.	ISSCC	2020	DBLP DOI BibTeX RDF
16	El Mehdi Boujamaa, Samsudeen Mohamed Ali, Steve Ngueya Wandji, Alexandra Gourio, Suk-Soo Pyo, Gwanhyeob Koh, Yoonjong Song, Taejoong Song, Jongwook Kye, Jean-Christophe Vial, Andrew Sowden, Manuj Rathor, Cyrille Dray	A 14.7Mb/mm2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference.	VLSI Circuits	2020	DBLP DOI BibTeX RDF
16	Masanori Natsui, Akira Tamakoshi, Hiroaki Honjo, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma, Hui Shen, Shunsuke Fukami, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu	Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage.	VLSI Circuits	2020	DBLP DOI BibTeX RDF
16	Chao Wang 0094, Zhaohao Wang, Yansong Xu, Jianlei Yang 0001, Youguang Zhang, Weisheng Zhao	Computing-in-Memory Architecture Based on Field-Free SOT-MRAM with Self-Reference Method.	ISCAS	2020	DBLP DOI BibTeX RDF
16	Yandong Luo, Xiaochen Peng, Ryan Hatcher, Titash Rakshit, Jorge Kittl, Mark S. Rodder, Jae-Sun Seo, Shimeng Yu	A Variation Robust Inference Engine Based on STT-MRAM with Parallel Read-Out.	ISCAS	2020	DBLP DOI BibTeX RDF
16	Jinkai Wang, Yue Zhang 0010, Chenyu Lian, Yining Bai, Zhe Huang, Guanda Wang, Kun Zhang 0030, Youguang Zhang, Weisheng Zhao	Efficient Time-Domain In-Memory Computing Based on TST-MRAM.	ISCAS	2020	DBLP DOI BibTeX RDF
16	Hongjie Wang, Yang Zhao 0013, Chaojian Li, Yue Wang 0036, Yingyan Lin	A New MRAM-Based Process In-Memory Accelerator for Efficient Neural Network Training with Floating Point Precision.	ISCAS	2020	DBLP DOI BibTeX RDF
16	Taehwan Kim, Eunjong Yeo, Yunho Jang, Yeongkyo Seo, Jongsun Park 0001	Dynamic-Reference Based Early Write Termination for Low Energy SOT-MRAM.	ISCAS	2020	DBLP DOI BibTeX RDF
16	Geng Yuan, Xiaolong Ma, Sheng Lin 0001, Zhengang Li, Jieren Deng, Caiwen Ding	A DNN Compression Framework for SOT-MRAM-based Processing-In-Memory Engine.	SoCC	2020	DBLP DOI BibTeX RDF
16	Yining Bai, Yue Zhang 0010, Jinkai Wang, Guanda Wang, Zhizhong Zhang, Zhenyi Zheng, Kun Zhang 0030, Weisheng Zhao	A Novel In-memory Computing Scheme Based on Toggle Spin Torque MRAM.	ACM Great Lakes Symposium on VLSI	2020	DBLP DOI BibTeX RDF
16	Zhengyi Hou, You Wang 0002, Deming Zhang, Chengzhi Wang, Hao Cai	A Modeling Attack Resilient Physical Unclonable Function Based on STT-MRAM.	ACM Great Lakes Symposium on VLSI	2020	DBLP DOI BibTeX RDF
16	Shaahin Angizi, Wei Zhang 0076, Deliang Fan	Exploring DNA Alignment-in-Memory Leveraging Emerging SOT-MRAM.	ACM Great Lakes Symposium on VLSI	2020	DBLP DOI BibTeX RDF
16	Sonal Shreya, Surila Guglani, Brajesh Kumar Kaushik, Sourajeet Roy	Statistical Analysis of Temperature Variability on the Write Efficiency of Spin-Orbit Torque MRAM using Polynomial Chaos Metamodels.	ISQED	2020	DBLP DOI BibTeX RDF
16	Liang Chang 0002, Siqi Yang 0002, Jiahao Liu, Jianbiao Xiao, Jun Zhou 0017	Scalability Analysis and Modeling of XPoint-based MRAM.	ISOCC	2020	DBLP DOI BibTeX RDF
16	Adrian G. Caburnay, Jonathan Gabriel S. A. Reyes, Anastacia P. Ballesil-Alvarez, Maria Theresa G. de Leon, John Richard E. Hizon, Marc D. Rosales, Christopher G. Santos, Maria Patricia Rouelli G. Sabino	Design Space Exploration of a 512KB STT-Assisted SOT MRAM Cache.	ISOCC	2020	DBLP DOI BibTeX RDF
16	Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori	Mitigating Read Failures in STT-MRAM.	VTS	2020	DBLP DOI BibTeX RDF
16	Kanika Monga, Lakshaya Maheshwari, Nitin Chaturvedi, S. Gurunarayanan 0001	Twin-Coupled Sense Amplifier to improve margin in 1T-1MTJ based MRAM array.	VDAT	2020	DBLP DOI BibTeX RDF
16	Xueyan Wang, Jianlei Yang 0001, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu 0001, Weisheng Zhao	TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture.	DAC	2020	DBLP DOI BibTeX RDF
16	Komal Saifullah Khan, Abbas Jamalipour	Coverage Analysis for Multi-Request Association Model (MRAM) in a Caching Ultra-Dense Network.	IEEE Trans. Veh. Technol.	2019	DBLP DOI BibTeX RDF
16	Qing Dong 0001, Zhehong Wang, Jongyup Lim, Yiqun Zhang 0002, Mahmut E. Sinangil, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester	A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination.	IEEE J. Solid State Circuits	2019	DBLP DOI BibTeX RDF
16	Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang	Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\mu$ A Sensing Resolution, and 17.5-nS Read Access Time.	IEEE J. Solid State Circuits	2019	DBLP DOI BibTeX RDF
16	Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu	A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications.	IEEE J. Solid State Circuits	2019	DBLP DOI BibTeX RDF
16	Soheil Salehi, Navid Khoshavi, Ramtin Zand, Ronald F. DeMara	Self-Organized Sub-bank SHE-MRAM-based LLC: An energy-efficient and variation-immune read and write architecture.	Integr.	2019	DBLP DOI BibTeX RDF
16	Xingwei Zhong, Kui Cai 0001, Pingping Chen, Zhen Mei	Design of Rate-Compatible Protograph LDPC Codes for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM).	IEEE Access	2019	DBLP DOI BibTeX RDF
16	Frederic Ouattara, Arash Nejat, Lionel Torres, Ken Mackay	Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-Controlled TRNGs.	IEEE Access	2019	DBLP DOI BibTeX RDF
16	Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory di Pendina	Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers.	IEEE Access	2019	DBLP DOI BibTeX RDF
16	Nour Sayed, Rajendra Bishnoi, Mehdi Baradaran Tahoori	Fast and Reliable STT-MRAM Using Nonuniform and Adaptive Error Detecting and Correcting Scheme.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
16	Liang Chang 0002, Xin Ma, Zhaohao Wang, Youguang Zhang, Yuan Xie 0001, Weisheng Zhao	PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
16	Bi Wu, Beibei Zhang, Yuanqing Cheng, Ying Wang 0001, Dijun Liu, Weisheng Zhao	An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
16	Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori	A Comprehensive Framework for Parametric Failure Modeling and Yield Analysis of STT-MRAM.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
16	Gyuseong Kang, Jongsun Park 0001	Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM.	IEEE Trans. Very Large Scale Integr. Syst.	2019	DBLP DOI BibTeX RDF
16	Masanori Hayashikoshi, Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji, Kiyoshi Kawabata, Koji Nii, Hideyuki Noda, Hiroyuki Kondo, Yoshio Matsuda, Hideto Hidaka	A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications.	IEICE Trans. Electron.	2019	DBLP DOI BibTeX RDF
16	Elham Cheshmikhani, Hamed Farbeh, Seyed Ghassem Miremadi, Hossein Asadi 0001	TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches.	IEEE Trans. Computers	2019	DBLP DOI BibTeX RDF
16	Yinglin Zhao, Peng Ouyang, Wang Kang 0001, Shouyi Yin, Youguang Zhang, Shaojun Wei, Weisheng Zhao	An STT-MRAM Based in Memory Architecture for Low Power Integral Computing.	IEEE Trans. Computers	2019	DBLP DOI BibTeX RDF
16	Armin Haj Aboutalebi, Ethan C. Ahn, Bo Mao, Suzhen Wu, Lide Duan	Mitigating and Tolerating Read Disturbance in STT-MRAM-Based Main Memory via Device and Architecture Innovations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2019	DBLP DOI BibTeX RDF
16	Ramtin Zand, Kerem Yunus Camsari, Supriyo Datta, Ronald F. DeMara	Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons.	ACM J. Emerg. Technol. Comput. Syst.	2019	DBLP DOI BibTeX RDF
16	Nour Sayed, Longfei Mao, Rajendra Bishnoi, Mehdi Baradaran Tahoori	Compiler-Assisted and Profiling-Based Analysis for Fast and Efficient STT-MRAM On-Chip Cache Design.	ACM Trans. Design Autom. Electr. Syst.	2019	DBLP DOI BibTeX RDF
16	Soheil Salehi, Ramtin Zand, Alireza Zaeemzadeh, Nazanin Rahnavard, Ronald F. DeMara	AQuRate: MRAM-based Stochastic Oscillator for Adaptive Quantization Rate Sampling of Sparse Signals.	CoRR	2019	DBLP BibTeX RDF
16	Jie Zhang 0048, Myoungsoo Jung, Mahmut Taylan Kandemir	FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads.	CoRR	2019	DBLP BibTeX RDF
16	Geng Yuan, Xiaolong Ma, Sheng Lin 0001, Zhengang Li, Caiwen Ding	A SOT-MRAM-based Processing-In-Memory Engine for Highly Compressed DNN Implementation.	CoRR	2019	DBLP BibTeX RDF
16	Insik Yoon, Malik Aqeel Anwar, Titash Rakshit, Arijit Raychowdhury	Transfer and Online Reinforcement Learning in STT-MRAM Based Embedded Systems for Autonomous Drones.	CoRR	2019	DBLP BibTeX RDF
16	Soheil Salehi, Ronald F. DeMara	Adaptive Non-Uniform Compressive Sensing using SOT-MRAM Multibit Crossbar Arrays.	CoRR	2019	DBLP BibTeX RDF
16	Naimul Hassan, Susana P. Lainez-Garcia, Felipe García-Sánchez, Joseph S. Friedman	Toggle Spin-Orbit Torque MRAM with Perpendicular Magnetic Anisotropy.	CoRR	2019	DBLP BibTeX RDF
16	Insik Yoon, Malik Aqeel Anwar, Rajiv V. Joshi, Titash Rakshit, Arijit Raychowdhury	Hierarchical Memory System With STT-MRAM and SRAM to Support Transfer and Real-Time Reinforcement Learning in Autonomous Drones.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2019	DBLP DOI BibTeX RDF
16	Ramtin Zand, Ronald F. DeMara	MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance.	IEEE Trans. Circuits Syst. I Regul. Pap.	2019	DBLP DOI BibTeX RDF
16	Hao Cai, You Wang 0002, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang 0006, Weisheng Zhao	Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration.	IEEE Trans. Circuits Syst. I Regul. Pap.	2019	DBLP DOI BibTeX RDF
16	Li Zhang, Liwen Liu, Yiqi Zhuang, Hualian Tang, Beilei Xu, Junlin Bao, Hongjiang Wu	A novel sense amplifier to mitigate the impact of NBTI and PVT variations for STT-MRAM.	IEICE Electron. Express	2019	DBLP DOI BibTeX RDF
16	Roberto Lacerda de Orio, Alexander Makarov, Siegfried Selberherr, Wolfgang Goes, Johannes Ender, Simone Fiorentini, Viktor Sverdlov	Switching Speedup of the Magnetic Free Layer of Advanced SOT-MRAM.	ESSDERC	2019	DBLP DOI BibTeX RDF
16	Soheil Salehi, Alireza Zaeemzadeh, Adrian Tatulian, Nazanin Rahnavard, Ronald F. DeMara	MRAM-Based Stochastic Oscillators for Adaptive Non-Uniform Sampling of Sparse Signals in IoT Applications.	ISVLSI	2019	DBLP DOI BibTeX RDF
16	Jia Hao Lim, Nagarajan Raghavan, Vinayak Bharat Naik, Jae Hyun Kwon, Kazutaka Yamane, H. Yang, K. H. Lee, Kin Leong Pey	Correct Extrapolation Model for TDDB of STT-MRAM MgO Magnetic Tunnel Junctions.	IRPS	2019	DBLP DOI BibTeX RDF
16	Y. Ji, H. J. Goo, J. Lim, S. B. Lee, S. Lee, Taiki Uemura, J. C. Park, S. I. Han, S. C. Shin, J. H. Lee, Y. J. Song, K. M. Lee, H. M. Shin, S. H. Hwang, B. Y. Seo, Y. K. Lee, J. C. Kim, Gwanhyeob Koh, K. C. Park, Sangwoo Pae, Gi-Tae Jeong, J. S. Yoon, E. S. Jung	Reliability of 8Mbit Embedded-STT-MRAM in 28nm FDSOI Technology.	IRPS	2019	DBLP DOI BibTeX RDF
16	Vinayak Bharat Naik, J. H. Lim, K. Yamane, Dinggui Zeng, H. Yang, N. Thiyagarajah, Jae Hyun Kwon, N. L. Chung, R. Chao, T. Ling, K. Lee	Superior Endurance Performance of 22-nm Embedded MRAM Technology.	IRPS	2019	DBLP DOI BibTeX RDF
16	James A. O'Donnell, Chris Connor, Tanmoy Pramanik, Jeff Hicks, Juan G. Alzate, Fatih Hamzaoglu, Justin Brockman, Oleg Golonzka, Kevin Fischer	eNVM MRAM Retention Reliability Modeling in 22FFL FinFET Technology.	IRPS	2019	DBLP DOI BibTeX RDF
16	Shaahin Angizi, Jiao Sun, Wei Zhang 0076, Deliang Fan	GraphS: A Graph Processing Accelerator Leveraging SOT-MRAM.	DATE	2019	DBLP DOI BibTeX RDF
16	Insik Yoon, Malik Aqeel Anwar, Titash Rakshit, Arijit Raychowdhury	Transfer and Online Reinforcement Learning in STT-MRAM Based Embedded Systems for Autonomous Drones.	DATE	2019	DBLP DOI BibTeX RDF
16	Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi 0001	Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation.	DATE	2019	DBLP DOI BibTeX RDF
16	Jie Zhang 0048, Myoungsoo Jung, Mahmut T. Kandemir	FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads.	HPCA	2019	DBLP DOI BibTeX RDF
16	Ryo Tamura, N. Watanabe, Hiroki Koike, Hideo Sato, Shoji Ikeda, Tetsuo Endoh, Soshi Sato	A novel memory test system with an electromagnet for STT-MRAM testing.	NVMTS	2019	DBLP DOI BibTeX RDF
16	Lizhou Wu, Siddharth Rao, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Erik Jan Marinissen, Farrukh Yasin, Sebastien Couet, Said Hamdioui, Gouri Sankar Kar	Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing.	ETS	2019	DBLP DOI BibTeX RDF
16	Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi 0001	ROBIN: incremental oblique interleaved ECC for reliability improvement in STT-MRAM caches.	ASP-DAC	2019	DBLP DOI BibTeX RDF
16	Baohua Sun, Daniel Liu, Leo Yu, Jay Li, Helen Liu, Wenhan Zhang 0001, Terry Torng	System Demonstration of MRAM Co-designed Processing-in-Memory CNN Accelerator for Mobile and IoT Applications.	BigMine@KDD	2019	DBLP BibTeX RDF
16	Jeffry Louis, Barak Hoffer, Shahar Kvatinsky	Performing Memristor-Aided Logic (MAGIC) using STT-MRAM.	ICECS	2019	DBLP DOI BibTeX RDF
16	Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge	SMART: STT-MRAM architecture for smart activation and sensing.	MEMSYS	2019	DBLP DOI BibTeX RDF
16	Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella 0001, Francisco J. Cazorla	STT-MRAM for real-time embedded systems: performance and WCET implications.	MEMSYS	2019	DBLP DOI BibTeX RDF
16	Kyeonghan Kim, Hyein Shin, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim	An Energy-efficient Processing-in-memory Architecture for Long Short Term Memory in Spin Orbit Torque MRAM.	ICCAD	2019	DBLP DOI BibTeX RDF
16	Yongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu 0019, Jun Yang 0006	A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement.	NANOARCH	2019	DBLP DOI BibTeX RDF
16	Jinkai Wang, Yue Zhang 0010, Chenyu Lian, Guanda Wang, Kun Zhang 0030, Xiulong Wu, Youguang Zhang, Weisheng Zhao	High speed and reliable Sensing Scheme with Three Voltages for STT-MRAM.	NANOARCH	2019	DBLP DOI BibTeX RDF
16	Mingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang 0006, Lirida A. B. Naviner	Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM.	NANOARCH	2019	DBLP DOI BibTeX RDF
16	Liqiong Wei, Juan G. Alzate, Umut Arslan, Justin Brockman, Nilanjan Das, Kevin Fischer, Tahir Ghani, Oleg Golonzka, Patrick Hentges, Rawshan Jahan, Pulkit Jain, Blake C. Lin, Mesut Meterelliyoz, Jim O'Donnell, Conor Puls, Pedro A. Quintero, Tanaya Sahu, Meenakshi Sekhar, Ajay Vangapaty, Chris Wiegand, Fatih Hamzaoglu	A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique.	ISSCC	2019	DBLP DOI BibTeX RDF
16	William J. Gallagher, Eric Chien, Tien-Wei Chiang, Jian-Cheng Huang, Meng-Chun Shih, C. Y. Wang, Christine Bair, George Lee, Yi-Chun Shih, Chia-Fu Lee, Roger Wang, Kuei-Hung Shen, J. J. Wu, Wayne Wang, Harry Chuang	Recent Progress and Next Directions for Embedded MRAM Technology.	VLSI Circuits	2019	DBLP DOI BibTeX RDF
16	Shinobu Fujita, Satoshi Takaya, Susumu Takeda, Kazutaka Ikegami	Circuit And Systems Based on Advanced MRAM for Near Future Computing Applications.	VLSI Circuits	2019	DBLP DOI BibTeX RDF
16	Kevin Garello, Farrukh Yasin, Hubert Hody, S. Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar	Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM.	VLSI Circuits	2019	DBLP DOI BibTeX RDF
16	Timon Evenblij, Christian Tenllado, Manu Perumkunnil, Francky Catthoor, Sushil Sakhare, Peter Debacker, Gouri Sankar Kar, Arnaud Furnémont, Nicolas Bueno, José Ignacio Gómez Pérez	A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs.	ICCD	2019	DBLP DOI BibTeX RDF
16	Ameya D. Patil, Haocheng Hua, Sujan K. Gonugondla, Mingu Kang, Naresh R. Shanbhag	An MRAM-Based Deep In-Memory Architecture for Deep Neural Networks.	ISCAS	2019	DBLP DOI BibTeX RDF
16	Mounia Kharbouche-Harrari, Gregory di Pendina, Romain Wacquez, Bernard Dieny, Driss Aboulkassimi, Jérémy Postel-Pellerin, Jean-Michel Portal	Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis.	ISCAS	2019	DBLP DOI BibTeX RDF
16	Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Hayk T. Grigoryan, Grigor Tshagharyan	Variation-aware Fault Modeling and Test Generation for STT-MRAM.	IOLTS	2019	DBLP DOI BibTeX RDF
16	Mounia Kharbouche-Harrari, Romain Wacquez, Gregory di Pendina, Jean-Max Dutertre, Jérémy Postel-Pellerin, Driss Aboulkassimi, Jean-Michel Portal	Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM.	IOLTS	2019	DBLP DOI BibTeX RDF