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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 62 occurrences of 45 keywords
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Results
Found 708 publication records. Showing 707 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Lizhou Wu, Mottaqiallah Taouil, Siddharth Rao, Erik Jan Marinissen, Said Hamdioui |
Survey on STT-MRAM Testing: Failure Mechanisms, Fault Models, and Tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2001.05463, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
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16 | Yu Pan, Xiaotao Jia, Zhen Cheng, Peng Ouyang, Xueyan Wang, Jianlei Yang 0001, Weisheng Zhao |
An STT-MRAM based reconfigurable computing-in-memory architecture for general purpose computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCF Trans. High Perform. Comput. ![In: CCF Trans. High Perform. Comput. 2(3), pp. 272-281, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Hao Cai, Honglan Jiang, Yongliang Zhou, Menglin Han, Bo Liu 0019 |
Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CCF Trans. High Perform. Comput. ![In: CCF Trans. High Perform. Comput. 2(3), pp. 282-296, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Jinkai Wang, Chenyu Lian, Yining Bai, Guanda Wang, Zhizhong Zhang, Zhenyi Zheng, Lei Chen, Kelian Lin, Kun Zhang 0030, Youguang Zhang, Xiulong Wu, Sorin Cotofana, Yue Zhang 0010 |
A Self-Matching Complementary-Reference Sensing Scheme for High-Speed and Reliable Toggle Spin Torque MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-I(12), pp. 4247-4258, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yongliang Zhou, Hao Cai, Lei Xie, Menglin Han, Mingyue Liu, Shi Xu, Bo Liu 0019, Weisheng Zhao, Jun Yang 0006 |
A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Fundam. Theory Appl. ![In: IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5), pp. 1602-1614, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Bi Wu, Chao Wang 0094, Zhaohao Wang, Ying Wang 0001, Deming Zhang, Dijun Liu, Youguang Zhang, Xiaobo Sharon Hu |
Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-I(12), pp. 4660-4669, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yongliang Zhou, Hao Cai, Bo Liu 0019, Weisheng Zhao, Jun Yang 0006 |
MTJ-LRB: Proposal of MTJ-Based Loop Replica Bitline as MRAM Device-Circuit Interaction for PVT-Robust Sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. ![In: IEEE Trans. Circuits Syst. 67-II(12), pp. 3352-3356, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Chenji Liu, Lan Chen, Xiaoran Hao, Mao Ni, Hao Sun |
Fast cacheline-based data replacement for hybrid DRAM and STT-MRAM main memory. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 17(10), pp. 20200090, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yeongkyo Seo, Kon-Woo Kwon |
Area-optimized design of SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 17(21), pp. 20200314, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Taejin Park, Jae Young Hur, Wooyoung Jang |
TLC STT-MRAM aware LLC for multicore processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 17(24), pp. 20200359, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Tae Young Lee, Kazutaka Yamane, Lee Yong Hau, Robin Chao, Nyuk Leong Chung, Vinayak Bharat Naik, K. Sivabalan, Jae Hyun Kwon, Jia Hao Lim, Wah-Peng Neo, Kevin Khua, Naganivetha Thiyagarajah, Suk Hee Jang, Behtash Behin-Aein, Eng-Huat Toh, Yuichi Otani, Dinggui Zeng, Nivetha Balasankaran, Lian Choo Goh, Timothy Ling, Jay Hwang, Lei Zhang, Rachel Low, Soon Leng Tan, Chim Seng Seet, Jia Wen Ting, Stanley Ong, Young Seon You, Swee Tuck Woo, Elgin Quek, Soh Yun Siah |
Magnetic Immunity Guideline for Embedded MRAM Reliability to Realize Mass Production. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: 2020 IEEE International Reliability Physics Symposium, IRPS 2020, Dallas, TX, USA, April 28 - May 30, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3199-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Jia Hao Lim, Nagarajan Raghavan, Jae Hyun Kwon, Tae Young Lee, Robin Chao, Nyuk Leong Chung, Kazutaka Yamane, Naganivetha Thiyagarajah, Vinayak Bharat Naik, Kin Leong Pey |
Origins and Signatures of Tail Bit Failures in Ultrathin MgO Based STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: 2020 IEEE International Reliability Physics Symposium, IRPS 2020, Dallas, TX, USA, April 28 - May 30, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3199-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yongsung Ji, Hyunjae Goo, Jungman Lim, Tae-Young Jeong, Taiki Uemura, Gun Rae Kim, Boil Seo, Seungbae Lee, Goeun Park, Jeongmin Jo, Sang-Il Han, Kilho Lee, Junghyuk Lee, Sohee Hwang, Daesop Lee, Suksoo Pyo, Hyun Taek Jung, Shinhee Han, Seungmo Noh, Kiseok Suh, Sungyoung Yoon, Hyeonwoo Nam, Hyewon Hwang, Hai Jiang 0005, J. W. Kim, D. Kwon, Yoonjong Song, K. H. Koh, Hwasung Rhee, Sangwoo Pae, E. Lee |
Reliability of Industrial grade Embedded-STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: 2020 IEEE International Reliability Physics Symposium, IRPS 2020, Dallas, TX, USA, April 28 - May 30, 2020, pp. 1-3, 2020, IEEE, 978-1-7281-3199-3. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Shanggang Xie, Jiye Huang, Kui Cai 0001, Zhen Mei |
The FPGA Implementation of Neural Network-Based Dynamic Threshold Detection for STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CSNDSP ![In: 12th International Symposium on Communication Systems, Networks and Digital Signal Processing, CSNDSP 2020, Porto, Portugal, July 20-22, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-6743-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Piyush Jain, Akshay Kumar, Nicolaas Van Winkelhoff, Didier Gayraud, Surya Gupta, Abdelali El Amraoui, Giorgio Palma, Alexandra Gourio, Laurent Vachez, Luc Palau, Jean-Christophe Buy, Cyrille Dray |
High Density STT-MRAM compiler design, validation and characterization methodology in 28nm FDSOI technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 1327-1330, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Sarath Mohanachandran Nair, Rajendra Bishnoi, Arunkumar Vijayan, Mehdi Baradaran Tahoori |
Dynamic Faults based Hardware Trojan Design in STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 933-938, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Mostafa Hadizadeh, Elham Cheshmikhani, Hossein Asadi 0001 |
STAIR: High Reliable STT-MRAM Aware Multi-Level I/O Cache Architecture by Adaptive ECC Allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 1484-1489, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Shaahin Angizi, Jiao Sun, Wei Zhang 0076, Deliang Fan |
PIM-Aligner: A Processing-in-MRAM Platform for Biological Sequence Alignment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 1265-1270, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
16 | Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui |
Impact of Magnetic Coupling and Density on STT-MRAM Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020, pp. 1211-1216, 2020, IEEE, 978-3-9819263-4-7. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Aqeel Anwar, Arijit Raychowdhury, Ryan Hatcher, Titash Rakshit |
XBAROPT - Enabling Ultra-Pipelined, Novel STT MRAM Based Processing-in-Memory DNN Accelerator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
AICAS ![In: 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020, Genova, Italy, August 31 - September 2, 2020, pp. 36-40, 2020, IEEE, 978-1-7281-4922-6. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Anh Tuan Do, Xuanyao Fong, Fei Li |
Aggressive Leakage Current Reduction for Embedded MRAM Using Block-Level Power Gating. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IECON ![In: The 46th Annual Conference of the IEEE Industrial Electronics Society, IECON 2020, Singapore, October 18-21, 2020, pp. 2249-2254, 2020, IEEE, 978-1-7281-5414-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev |
Accelerating STT-MRAM Ramp-up Characterization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NEWCAS ![In: 18th IEEE International New Circuits and Systems Conference, NEWCAS 2020, Montréal, QC, Canada, June 16-19, 2020, pp. 303-306, 2020, IEEE, 978-1-7281-7044-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yu-Der Chih, Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Chieh-Pu Lo, Meng-Chun Shih, Kuei-Hung Shen, Harry Chuang, Tsung-Yung Jonathan Chang |
13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020, pp. 222-224, 2020, IEEE, 978-1-7281-3205-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Tung-Cheng Chang, Yen-Cheng Chiu, Chun-Ying Lee, Je-Min Hung, Kuang-Tang Chang, Cheng-Xin Xue, Ssu-Yen Wu, Hui-Yao Kao, Peng Chen, Hsiao-Yu Huang, Shih-Hsih Teng, Meng-Fan Chang |
13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020, pp. 224-226, 2020, IEEE, 978-1-7281-3205-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | El Mehdi Boujamaa, Samsudeen Mohamed Ali, Steve Ngueya Wandji, Alexandra Gourio, Suk-Soo Pyo, Gwanhyeob Koh, Yoonjong Song, Taejoong Song, Jongwook Kye, Jean-Christophe Vial, Andrew Sowden, Manuj Rathor, Cyrille Dray |
A 14.7Mb/mm2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-9942-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Masanori Natsui, Akira Tamakoshi, Hiroaki Honjo, Toshinari Watanabe, Takashi Nasuno, Chaoliang Zhang, Takaho Tanigawa, Hirofumi Inoue, Masaaki Niwa, Toru Yoshiduka, Yasuo Noguchi, Mitsuo Yasuhira, Yitao Ma, Hui Shen, Shunsuke Fukami, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu |
Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020, pp. 1-2, 2020, IEEE, 978-1-7281-9942-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Chao Wang 0094, Zhaohao Wang, Yansong Xu, Jianlei Yang 0001, Youguang Zhang, Weisheng Zhao |
Computing-in-Memory Architecture Based on Field-Free SOT-MRAM with Self-Reference Method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yandong Luo, Xiaochen Peng, Ryan Hatcher, Titash Rakshit, Jorge Kittl, Mark S. Rodder, Jae-Sun Seo, Shimeng Yu |
A Variation Robust Inference Engine Based on STT-MRAM with Parallel Read-Out. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Jinkai Wang, Yue Zhang 0010, Chenyu Lian, Yining Bai, Zhe Huang, Guanda Wang, Kun Zhang 0030, Youguang Zhang, Weisheng Zhao |
Efficient Time-Domain In-Memory Computing Based on TST-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Hongjie Wang, Yang Zhao 0013, Chaojian Li, Yue Wang 0036, Yingyan Lin |
A New MRAM-Based Process In-Memory Accelerator for Efficient Neural Network Training with Floating Point Precision. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Taehwan Kim, Eunjong Yeo, Yunho Jang, Yeongkyo Seo, Jongsun Park 0001 |
Dynamic-Reference Based Early Write Termination for Low Energy SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2020, Sevilla, Spain, October 10-21, 2020, pp. 1-5, 2020, IEEE, 978-1-7281-3320-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Geng Yuan, Xiaolong Ma, Sheng Lin 0001, Zhengang Li, Jieren Deng, Caiwen Ding |
A DNN Compression Framework for SOT-MRAM-based Processing-In-Memory Engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SoCC ![In: 33rd IEEE International System-on-Chip Conference, SoCC 2020, Las Vegas, NV, USA, September 8-11, 2020, pp. 37-42, 2020, IEEE, 978-1-7281-8746-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Yining Bai, Yue Zhang 0010, Jinkai Wang, Guanda Wang, Zhizhong Zhang, Zhenyi Zheng, Kun Zhang 0030, Weisheng Zhao |
A Novel In-memory Computing Scheme Based on Toggle Spin Torque MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020, pp. 351-356, 2020, ACM, 978-1-4503-7944-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Zhengyi Hou, You Wang 0002, Deming Zhang, Chengzhi Wang, Hao Cai |
A Modeling Attack Resilient Physical Unclonable Function Based on STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020, pp. 65-70, 2020, ACM, 978-1-4503-7944-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Shaahin Angizi, Wei Zhang 0076, Deliang Fan |
Exploring DNA Alignment-in-Memory Leveraging Emerging SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020, pp. 277-282, 2020, ACM, 978-1-4503-7944-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Sonal Shreya, Surila Guglani, Brajesh Kumar Kaushik, Sourajeet Roy |
Statistical Analysis of Temperature Variability on the Write Efficiency of Spin-Orbit Torque MRAM using Polynomial Chaos Metamodels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 21st International Symposium on Quality Electronic Design, ISQED 2020, Santa Clara, CA, USA, March 25-26, 2020, pp. 87-92, 2020, IEEE, 978-1-7281-4207-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Liang Chang 0002, Siqi Yang 0002, Jiahao Liu, Jianbiao Xiao, Jun Zhou 0017 |
Scalability Analysis and Modeling of XPoint-based MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020, pp. 205-206, 2020, IEEE, 978-1-7281-8331-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Adrian G. Caburnay, Jonathan Gabriel S. A. Reyes, Anastacia P. Ballesil-Alvarez, Maria Theresa G. de Leon, John Richard E. Hizon, Marc D. Rosales, Christopher G. Santos, Maria Patricia Rouelli G. Sabino |
Design Space Exploration of a 512KB STT-Assisted SOT MRAM Cache. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020, pp. 145-146, 2020, IEEE, 978-1-7281-8331-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
Mitigating Read Failures in STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 38th IEEE VLSI Test Symposium, VTS 2020, San Diego, CA, USA, April 5-8, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-5359-9. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Kanika Monga, Lakshaya Maheshwari, Nitin Chaturvedi, S. Gurunarayanan 0001 |
Twin-Coupled Sense Amplifier to improve margin in 1T-1MTJ based MRAM array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VDAT ![In: 2020 24th International Symposium on VLSI Design and Test (VDAT), Bhubaneswar, India, July 23-25, 2020, pp. 1-4, 2020, IEEE, 978-1-7281-9369-4. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Xueyan Wang, Jianlei Yang 0001, Yinglin Zhao, Yingjie Qi, Meichen Liu, Xingzhou Cheng, Xiaotao Jia, Xiaoming Chen, Gang Qu 0001, Weisheng Zhao |
TCIM: Triangle Counting Acceleration With Processing-In-MRAM Architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: 57th ACM/IEEE Design Automation Conference, DAC 2020, San Francisco, CA, USA, July 20-24, 2020, pp. 1-6, 2020, IEEE, 978-1-7281-1085-1. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
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16 | Komal Saifullah Khan, Abbas Jamalipour |
Coverage Analysis for Multi-Request Association Model (MRAM) in a Caching Ultra-Dense Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Veh. Technol. ![In: IEEE Trans. Veh. Technol. 68(4), pp. 3882-3889, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Qing Dong 0001, Zhehong Wang, Jongyup Lim, Yiqun Zhang 0002, Mahmut E. Sinangil, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester |
A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(1), pp. 231-239, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Ku-Feng Lin, Ta-Ching Yeh, Hung-Chang Yu, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang |
Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\mu$ A Sensing Resolution, and 17.5-nS Read Access Time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(4), pp. 1029-1038, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Masanori Natsui, Daisuke Suzuki, Akira Tamakoshi, Toshinari Watanabe, Hiroaki Honjo, Hiroki Koike, Takashi Nasuno, Yitao Ma, Takaho Tanigawa, Yasuo Noguchi, Mitsuo Yasuhira, Hideo Sato, Shoji Ikeda, Hideo Ohno, Tetsuo Endoh, Takahiro Hanyu |
A 47.14-µW 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Solid State Circuits ![In: IEEE J. Solid State Circuits 54(11), pp. 2991-3004, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Soheil Salehi, Navid Khoshavi, Ramtin Zand, Ronald F. DeMara |
Self-Organized Sub-bank SHE-MRAM-based LLC: An energy-efficient and variation-immune read and write architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Integr. ![In: Integr. 65, pp. 293-307, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Xingwei Zhong, Kui Cai 0001, Pingping Chen, Zhen Mei |
Design of Rate-Compatible Protograph LDPC Codes for Spin-Torque Transfer Magnetic Random Access Memory (STT-MRAM). ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 182425-182432, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Frederic Ouattara, Arash Nejat, Lionel Torres, Ken Mackay |
Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-Controlled TRNGs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 59271-59277, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory di Pendina |
Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Access ![In: IEEE Access 7, pp. 58085-58093, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Nour Sayed, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
Fast and Reliable STT-MRAM Using Nonuniform and Adaptive Error Detecting and Correcting Scheme. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(6), pp. 1329-1342, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Liang Chang 0002, Xin Ma, Zhaohao Wang, Youguang Zhang, Yuan Xie 0001, Weisheng Zhao |
PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(11), pp. 2668-2679, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Bi Wu, Beibei Zhang, Yuanqing Cheng, Ying Wang 0001, Dijun Liu, Weisheng Zhao |
An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(8), pp. 1851-1860, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
A Comprehensive Framework for Parametric Failure Modeling and Yield Analysis of STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(7), pp. 1697-1710, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Gyuseong Kang, Jongsun Park 0001 |
Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 27(6), pp. 1343-1352, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Masanori Hayashikoshi, Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji, Kiyoshi Kawabata, Koji Nii, Hideyuki Noda, Hiroyuki Kondo, Yoshio Matsuda, Hideto Hidaka |
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Electron. ![In: IEICE Trans. Electron. 102-C(4), pp. 287-295, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Elham Cheshmikhani, Hamed Farbeh, Seyed Ghassem Miremadi, Hossein Asadi 0001 |
TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 68(3), pp. 455-470, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Yinglin Zhao, Peng Ouyang, Wang Kang 0001, Shouyi Yin, Youguang Zhang, Shaojun Wei, Weisheng Zhao |
An STT-MRAM Based in Memory Architecture for Low Power Integral Computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 68(4), pp. 617-623, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Armin Haj Aboutalebi, Ethan C. Ahn, Bo Mao, Suzhen Wu, Lide Duan |
Mitigating and Tolerating Read Disturbance in STT-MRAM-Based Main Memory via Device and Architecture Innovations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(12), pp. 2229-2242, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Ramtin Zand, Kerem Yunus Camsari, Supriyo Datta, Ronald F. DeMara |
Composable Probabilistic Inference Networks Using MRAM-based Stochastic Neurons. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM J. Emerg. Technol. Comput. Syst. ![In: ACM J. Emerg. Technol. Comput. Syst. 15(2), pp. 17:1-17:22, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Nour Sayed, Longfei Mao, Rajendra Bishnoi, Mehdi Baradaran Tahoori |
Compiler-Assisted and Profiling-Based Analysis for Fast and Efficient STT-MRAM On-Chip Cache Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 24(4), pp. 41:1-41:25, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Soheil Salehi, Ramtin Zand, Alireza Zaeemzadeh, Nazanin Rahnavard, Ronald F. DeMara |
AQuRate: MRAM-based Stochastic Oscillator for Adaptive Quantization Rate Sampling of Sparse Signals. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1903.00971, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Jie Zhang 0048, Myoungsoo Jung, Mahmut Taylan Kandemir |
FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1903.01776, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Geng Yuan, Xiaolong Ma, Sheng Lin 0001, Zhengang Li, Caiwen Ding |
A SOT-MRAM-based Processing-In-Memory Engine for Highly Compressed DNN Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1912.05416, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Insik Yoon, Malik Aqeel Anwar, Titash Rakshit, Arijit Raychowdhury |
Transfer and Online Reinforcement Learning in STT-MRAM Based Embedded Systems for Autonomous Drones. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1905.06314, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Soheil Salehi, Ronald F. DeMara |
Adaptive Non-Uniform Compressive Sensing using SOT-MRAM Multibit Crossbar Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1911.08633, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Naimul Hassan, Susana P. Lainez-Garcia, Felipe García-Sánchez, Joseph S. Friedman |
Toggle Spin-Orbit Torque MRAM with Perpendicular Magnetic Anisotropy. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1905.01125, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Insik Yoon, Malik Aqeel Anwar, Rajiv V. Joshi, Titash Rakshit, Arijit Raychowdhury |
Hierarchical Memory System With STT-MRAM and SRAM to Support Transfer and Real-Time Reinforcement Learning in Autonomous Drones. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE J. Emerg. Sel. Topics Circuits Syst. ![In: IEEE J. Emerg. Sel. Topics Circuits Syst. 9(3), pp. 485-497, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Ramtin Zand, Ronald F. DeMara |
MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(12), pp. 4662-4672, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Hao Cai, You Wang 0002, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang 0006, Weisheng Zhao |
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. I Regul. Pap. ![In: IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(1), pp. 239-250, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Li Zhang, Liwen Liu, Yiqi Zhuang, Hualian Tang, Beilei Xu, Junlin Bao, Hongjiang Wu |
A novel sense amplifier to mitigate the impact of NBTI and PVT variations for STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Electron. Express ![In: IEICE Electron. Express 16(12), pp. 20190238, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Roberto Lacerda de Orio, Alexander Makarov, Siegfried Selberherr, Wolfgang Goes, Johannes Ender, Simone Fiorentini, Viktor Sverdlov |
Switching Speedup of the Magnetic Free Layer of Advanced SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ESSDERC ![In: 49th European Solid-State Device Research Conference, ESSDERC 2019, Cracow, Poland, September 23-26, 2019, pp. 146-149, 2019, IEEE, 978-1-7281-1539-9. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Soheil Salehi, Alireza Zaeemzadeh, Adrian Tatulian, Nazanin Rahnavard, Ronald F. DeMara |
MRAM-Based Stochastic Oscillators for Adaptive Non-Uniform Sampling of Sparse Signals in IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2019 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2019, Miami, FL, USA, July 15-17, 2019, pp. 403-408, 2019, IEEE, 978-1-7281-3391-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Jia Hao Lim, Nagarajan Raghavan, Vinayak Bharat Naik, Jae Hyun Kwon, Kazutaka Yamane, H. Yang, K. H. Lee, Kin Leong Pey |
Correct Extrapolation Model for TDDB of STT-MRAM MgO Magnetic Tunnel Junctions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2019, Monterey, CA, USA, March 31 - April 4, 2019, pp. 1-7, 2019, IEEE, 978-1-5386-9504-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Y. Ji, H. J. Goo, J. Lim, S. B. Lee, S. Lee, Taiki Uemura, J. C. Park, S. I. Han, S. C. Shin, J. H. Lee, Y. J. Song, K. M. Lee, H. M. Shin, S. H. Hwang, B. Y. Seo, Y. K. Lee, J. C. Kim, Gwanhyeob Koh, K. C. Park, Sangwoo Pae, Gi-Tae Jeong, J. S. Yoon, E. S. Jung |
Reliability of 8Mbit Embedded-STT-MRAM in 28nm FDSOI Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2019, Monterey, CA, USA, March 31 - April 4, 2019, pp. 1-3, 2019, IEEE, 978-1-5386-9504-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Vinayak Bharat Naik, J. H. Lim, K. Yamane, Dinggui Zeng, H. Yang, N. Thiyagarajah, Jae Hyun Kwon, N. L. Chung, R. Chao, T. Ling, K. Lee |
Superior Endurance Performance of 22-nm Embedded MRAM Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2019, Monterey, CA, USA, March 31 - April 4, 2019, pp. 1-4, 2019, IEEE, 978-1-5386-9504-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | James A. O'Donnell, Chris Connor, Tanmoy Pramanik, Jeff Hicks, Juan G. Alzate, Fatih Hamzaoglu, Justin Brockman, Oleg Golonzka, Kevin Fischer |
eNVM MRAM Retention Reliability Modeling in 22FFL FinFET Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IRPS ![In: IEEE International Reliability Physics Symposium, IRPS 2019, Monterey, CA, USA, March 31 - April 4, 2019, pp. 1-3, 2019, IEEE, 978-1-5386-9504-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Shaahin Angizi, Jiao Sun, Wei Zhang 0076, Deliang Fan |
GraphS: A Graph Processing Accelerator Leveraging SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 378-383, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Insik Yoon, Malik Aqeel Anwar, Titash Rakshit, Arijit Raychowdhury |
Transfer and Online Reinforcement Learning in STT-MRAM Based Embedded Systems for Autonomous Drones. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 1489-1494, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi 0001 |
Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Florence, Italy, March 25-29, 2019, pp. 854-859, 2019, IEEE, 978-3-9819263-2-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Jie Zhang 0048, Myoungsoo Jung, Mahmut T. Kandemir |
FUSE: Fusing STT-MRAM into GPUs to Alleviate Off-Chip Memory Access Overheads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: 25th IEEE International Symposium on High Performance Computer Architecture, HPCA 2019, Washington, DC, USA, February 16-20, 2019, pp. 426-439, 2019, IEEE, 978-1-7281-1444-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Ryo Tamura, N. Watanabe, Hiroki Koike, Hideo Sato, Shoji Ikeda, Tetsuo Endoh, Soshi Sato |
A novel memory test system with an electromagnet for STT-MRAM testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NVMTS ![In: 19th Non-Volatile Memory Technology Symposium, NVMTS 2019, Durham, NC, USA, October 28-30, 2019, pp. 1-4, 2019, IEEE, 978-1-7281-4431-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Lizhou Wu, Siddharth Rao, Guilherme Cardoso Medeiros, Mottaqiallah Taouil, Erik Jan Marinissen, Farrukh Yasin, Sebastien Couet, Said Hamdioui, Gouri Sankar Kar |
Pinhole Defect Characterization and Fault Modeling for STT-MRAM Testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ETS ![In: 24th IEEE European Test Symposium, ETS 2019, Baden-Baden, Germany, May 27-31, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-1173-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Elham Cheshmikhani, Hamed Farbeh, Hossein Asadi 0001 |
ROBIN: incremental oblique interleaved ECC for reliability improvement in STT-MRAM caches. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: Proceedings of the 24th Asia and South Pacific Design Automation Conference, ASPDAC 2019, Tokyo, Japan, January 21-24, 2019, pp. 173-178, 2019, ACM, 978-1-4503-6007-4. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Baohua Sun, Daniel Liu, Leo Yu, Jay Li, Helen Liu, Wenhan Zhang 0001, Terry Torng |
System Demonstration of MRAM Co-designed Processing-in-Memory CNN Accelerator for Mobile and IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
BigMine@KDD ![In: Proceedings of the 8th International Workshop on Big Data, IoT Streams and Heterogeneous Source Mining: Algorithms, Systems, Programming Models and Applications co-located with 25th ACM SIGKDD Conference on Knowledge Discovery and Data Mining (KDD 2019), Anchorage, Alaska, August 4-8, 2019., 2019, CEUR-WS.org. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP BibTeX RDF |
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16 | Jeffry Louis, Barak Hoffer, Shahar Kvatinsky |
Performing Memristor-Aided Logic (MAGIC) using STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICECS ![In: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, Genoa, Italy, November 27-29, 2019, pp. 787-790, 2019, IEEE, 978-1-7281-0996-1. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge |
SMART: STT-MRAM architecture for smart activation and sensing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMSYS ![In: Proceedings of the International Symposium on Memory Systems, MEMSYS 2019, Washington, DC, USA, September 30 - October 03, 2019., pp. 316-330, 2019, ACM, 978-1-4503-7206-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella 0001, Francisco J. Cazorla |
STT-MRAM for real-time embedded systems: performance and WCET implications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMSYS ![In: Proceedings of the International Symposium on Memory Systems, MEMSYS 2019, Washington, DC, USA, September 30 - October 03, 2019., pp. 195-205, 2019, ACM, 978-1-4503-7206-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Kyeonghan Kim, Hyein Shin, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim |
An Energy-efficient Processing-in-memory Architecture for Long Short Term Memory in Spin Orbit Torque MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the International Conference on Computer-Aided Design, ICCAD 2019, Westminster, CO, USA, November 4-7, 2019, pp. 1-8, 2019, ACM, 9781728123509. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Yongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu 0019, Jun Yang 0006 |
A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019, Qingdao, China, July 17-19, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-5520-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Jinkai Wang, Yue Zhang 0010, Chenyu Lian, Guanda Wang, Kun Zhang 0030, Xiulong Wu, Youguang Zhang, Weisheng Zhao |
High speed and reliable Sensing Scheme with Three Voltages for STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019, Qingdao, China, July 17-19, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-5520-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Mingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang 0006, Lirida A. B. Naviner |
Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NANOARCH ![In: IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019, Qingdao, China, July 17-19, 2019, pp. 1-6, 2019, IEEE, 978-1-7281-5520-3. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Liqiong Wei, Juan G. Alzate, Umut Arslan, Justin Brockman, Nilanjan Das, Kevin Fischer, Tahir Ghani, Oleg Golonzka, Patrick Hentges, Rawshan Jahan, Pulkit Jain, Blake C. Lin, Mesut Meterelliyoz, Jim O'Donnell, Conor Puls, Pedro A. Quintero, Tanaya Sahu, Meenakshi Sekhar, Ajay Vangapaty, Chris Wiegand, Fatih Hamzaoglu |
A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid- State Circuits Conference, ISSCC 2019, San Francisco, CA, USA, February 17-21, 2019, pp. 214-216, 2019, IEEE, 978-1-5386-8531-0. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | William J. Gallagher, Eric Chien, Tien-Wei Chiang, Jian-Cheng Huang, Meng-Chun Shih, C. Y. Wang, Christine Bair, George Lee, Yi-Chun Shih, Chia-Fu Lee, Roger Wang, Kuei-Hung Shen, J. J. Wu, Wayne Wang, Harry Chuang |
Recent Progress and Next Directions for Embedded MRAM Technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 190-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Shinobu Fujita, Satoshi Takaya, Susumu Takeda, Kazutaka Ikegami |
Circuit And Systems Based on Advanced MRAM for Near Future Computing Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 278-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Kevin Garello, Farrukh Yasin, Hubert Hody, S. Couet, Laurent Souriau, Shamin H. Sharifi, Johan Swerts, Robert Carpenter, Sidharth Rao, Wonsub Kim, J. Wu, K. K. V. Sethu, M. Pak, N. Jossart, D. Crotti, Arnaud Furnémont, Gouri Sankar Kar |
Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 194-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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16 | Timon Evenblij, Christian Tenllado, Manu Perumkunnil, Francky Catthoor, Sushil Sakhare, Peter Debacker, Gouri Sankar Kar, Arnaud Furnémont, Nicolas Bueno, José Ignacio Gómez Pérez |
A Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: 37th IEEE International Conference on Computer Design, ICCD 2019, Abu Dhabi, United Arab Emirates, November 17-20, 2019, pp. 255-263, 2019, IEEE, 978-1-5386-6648-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Ameya D. Patil, Haocheng Hua, Sujan K. Gonugondla, Mingu Kang, Naresh R. Shanbhag |
An MRAM-Based Deep In-Memory Architecture for Deep Neural Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Mounia Kharbouche-Harrari, Gregory di Pendina, Romain Wacquez, Bernard Dieny, Driss Aboulkassimi, Jérémy Postel-Pellerin, Jean-Michel Portal |
Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Hayk T. Grigoryan, Grigor Tshagharyan |
Variation-aware Fault Modeling and Test Generation for STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 25th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2019, Rhodes, Greece, July 1-3, 2019, pp. 80-83, 2019, IEEE, 978-1-7281-2490-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
16 | Mounia Kharbouche-Harrari, Romain Wacquez, Gregory di Pendina, Jean-Max Dutertre, Jérémy Postel-Pellerin, Driss Aboulkassimi, Jean-Michel Portal |
Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IOLTS ![In: 25th IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2019, Rhodes, Greece, July 1-3, 2019, pp. 322-327, 2019, IEEE, 978-1-7281-2490-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
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