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Searching for RIP with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1981-1993 (17) 1994-1997 (17) 1998-2000 (19) 2001-2002 (18) 2003-2004 (17) 2005-2006 (18) 2007-2008 (26) 2009 (16) 2010-2011 (20) 2012-2013 (23) 2014 (19) 2015-2016 (18) 2017-2018 (19) 2019 (15) 2020-2021 (26) 2022-2023 (20) 2024 (2)
Publication types (Num. hits)
article(165) incollection(1) inproceedings(142) phdthesis(1) proceedings(1)
Venues (Conferences, Journals, ...)
CoRR(52) RFC(14) DAC(10) IEEE Trans. Comput. Aided Des....(9) IEEE Signal Process. Lett.(7) IEEE Trans. Signal Process.(5) Scientometrics(5) Signal Process.(5) ASP-DAC(4) DATE(4) ACNS(3) Bioinform.(3) CISS(3) Comput. Secur.(3) First Monday(3) FPL(3) More (+10 of total 165)
Authors
Arie Rip(11) Gary Scott Malkin(8) Jwo-Yuh Wu(6) Ling-Hua Chang(6) Haifeng Li 0004(5) Wengu Chen(5) Alex Pang(4) Gen Li 0005(4) Gerry M. Meyer(4) Huanmin Ge(4) Muhammet Mustafa Ozdal(4) Yuantao Gu(4) Akila de Silva(3) Anhua Wan(3) Chang Huang(3) Denka Kutzarova(3) More (+10 of total 649)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
The graphs summarize 106 occurrences of 89 keywords
Results
Found 319 publication records. Showing 310 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
14Priya Alti, Basabi Bhaumik Neural Global Router. Search on Bibsonomy IJCNN (6) The full citation details ... 2000 DBLP  DOI  BibTeX  RDF optimization, Global routing, Rectilinear Steiner tree
14Le-Chin Eugene Liu, Hsiao-Ping Tseng, Carl Sechen Chip-level area routing. Search on Bibsonomy ISPD The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
14Jason Cong, Patrick H. Madden Performance Driven Multi-Layer General Area Routing for PCB/MCM Designs. Search on Bibsonomy DAC The full citation details ... 1998 DBLP  DOI  BibTeX  RDF logic synthesis, gate-sizing, fanout optimization
14Yuh-Sheng Lee, Allen C.-H. Wu A performance and routability-driven router for FPGAs considering path delays. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
14Arun Balakrishnan, Srimat T. Chakradhar Sequential Circuits with combinational Test Generation Complexity. Search on Bibsonomy VLSI Design The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
14Ching-Dong Chen, Yuh-Sheng Lee, Allen C.-H. Wu, Youn-Long Lin TRACER-fpga: a router for RAM-based FPGA's. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
14Charles E. Perkins, Pravin Bhagwat Highly Dynamic Destination-Sequenced Distance-Vector Routing (DSDV) for mobile computers. Search on Bibsonomy SIGCOMM The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
14Thomas Narten Internet Routing. Search on Bibsonomy SIGCOMM The full citation details ... 1989 DBLP  DOI  BibTeX  RDF Internet, ARPANET, DARPA
14Takumi Watanabe, Yoshi Sugiyama A new routing algorithm and its hardware implementation. Search on Bibsonomy DAC The full citation details ... 1986 DBLP  DOI  BibTeX  RDF
14Kaoru Kawamura, Masanobu Umeda, Hiroshi Shiraishi Hierarchical dynamic router. Search on Bibsonomy DAC The full citation details ... 1986 DBLP  DOI  BibTeX  RDF
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