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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 350 occurrences of 190 keywords
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Results
Found 312 publication records. Showing 312 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Louis Scheffer, Eric Nequist |
Why interconnect prediction doesn't work. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 139-144, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
constructive estimation, wire load model, interconnect prediction |
1 | Dirk Stroobandt, Herwig Van Marck |
Efficient representation of interconnection length distributions using generating polynomials. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 99-105, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
interconnect length distributions, enumeration, VLSI CAD, generating polynomials |
1 | Imed Ben Dhaou, Hannu Tenhunen |
Energy efficient high-speed on-chip signaling in deep-submicron CMOS technology. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 69-76, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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1 | Mariagrazia Graziano, Marco Delaurenti, Maurizio Zamboni |
Power supply design parameters prediction for high performance IC design flows. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 61-67, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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1 | Peng Li 0001, Pranab K. Nag, Wojciech Maly |
Cost based tradeoff analysis of standard cell designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 129-135, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
a posteriori wire length estimation, die size estimation, yield and cost prediction |
1 | |
The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![ACM The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP BibTeX RDF |
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1 | Denis Deschacht, Grégory Servel, Fabrice Huret, Erick Paleczny, Patrick Kennis |
Theoretical limits for signal reflections due to inductance for on-chip interconnections. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 55-60, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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1 | James W. Joyner, Payman Zarkesh-Ha, Jeffrey A. Davis, James D. Meindl |
Vertical pitch limitations on performance enhancement in bonded three-dimensional interconnect architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 123-127, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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1 | Srinivas Bodapati, Farid N. Najm |
Pre-layout estimation of individual wire lengths. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 93-98, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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1 | Andrew B. Kahng, Dirk Stroobandt |
Wiring layer assignments with consistent stage delays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 115-122, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
via impact, routing, delay, wire length, layer assignment |
1 | Dennis Sylvester |
Measurement techniques and interconnect estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 79-81, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
capacitance measurement, interconnect characterization, noise measurement, process variation, interconnect estimation |
1 | Amir H. Farrahi |
Estimation and removal or routing congestion (discussion session). ![Search on Bibsonomy](Pics/bibsonomy.png) |
SLIP ![In: The Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), April 8-9, 2000, San Diego, California, USA, Proceedings, pp. 149, 2000, ACM. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
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