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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 1928 occurrences of 678 keywords
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Results
Found 2033 publication records. Showing 2033 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Shravan K. Chaganti, Li Xu, Degang Chen 0001 |
A low-cost method for separation and accurate estimation of ADC noise, aperture jitter, and clock jitter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Kun Young Chung, Stefano Di Carlo |
Innovative practices session 9C DFT and data for diagnostics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Pete Sarson, Stefano Di Carlo |
Innovative practices session 5C automotive test solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Chang Liu 0010, Michael A. Kochte, Hans-Joachim Wunderlich |
Aging monitor reuse for small delay fault testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Fail data reduction for diagnosis of scan chain faults under transparent-scan. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Bonita Bhaskaran, Sailendra Chadalavada, Shantanu Sarangi, Nithin Valentine, Venkat Abilash Reddy Nerallapally, Ayub Abdollahian |
At-speed capture global noise reduction & low-power memory test architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Ahmad Bahai |
Keynote address: Opening keynote. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Jyotirmoy V. Deshmukh, Wolfgang Kunz, Hans-Joachim Wunderlich, Sybille Hellebrand |
Special session on early life failures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Arijit Raychowdhury |
Innovative practices session 4A variation-tolerant design of circuits/systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Suriya Natarajan, Abhijit Sathaye |
Innovative practices session 4C data analytics in test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Rubin A. Parekhji, Srinivas Modekurty |
Innovative practices session 2C: "How is industry simplifying analog test". ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Kazumi Hatayama, Masahiro Ishida |
Innovative practices session 10B innovative practices in Asia-2: From cost perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Jan Burchard, Dominik Erb, Sudhakar M. Reddy, Adit D. Singh, Bernd Becker 0001 |
Efficient SAT-based generation of hazard-activated TSOF tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Sebastian Siatkowski, Li-C. Wang, Nik Sumikawa, LeRoy Winemberg |
Learning the process for correlation analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Yan Duan, Degang Chen 0001 |
Accurate jitter decomposition in high-speed links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Dongrong Zhang, Miao Tony He, Xiaoxiao Wang 0001, Mark M. Tehranipoor |
Dynamically obfuscated scan for protecting IPs against scan-based attacks throughout supply chain. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Yu-Hao Huang, Ching-Ho Lu, Tse-Wei Wu, Yu-Teng Nien, Ying-Yen Chen, Max Wu, Jih-Nung Lee, Mango C.-T. Chao |
Methodology of generating dual-cell-aware tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Arani Sinha, Nitin Chaudhary |
Innovative practices session 1C screening for layout sensitive defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Deepak Krishnankutty, Ryan W. Robucci, Nilanjan Banerjee, Chintan Patel |
Fiscal: Firmware identification using side-channel power analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Ahmed Ibrahim 0001, Hans G. Kerkhoff |
Structured scan patterns retargeting for dynamic instruments access. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Haralampos-G. D. Stratigopoulos, Christian Streitwieser |
Adaptive test flow for mixed-signal ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Dae-Hyun Kim 0003, Linda Milor |
A methodology for estimating memory lifetime using a system-level accelerated life test and error-correcting codes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Cheng Xue, R. D. (Shawn) Blanton |
Test-set reordering for improving diagnosability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Md Imran Momtaz, Suvadeep Banerjee, Abhijit Chatterjee |
On-line diagnosis and compensation for parametric failures in linear state variable circuits and systems using time-domain checksum observers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Kao-Chi Lee, Kai-Chiang Wu, Chih-Ying Tsai, Mango Chia-Tso Chao |
Fast WAT test structure for measuring Vt variance based on latch-based comparators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Kazumi Hatayama, Masahiro Ishida |
Innovative practices session 9B innovative practices in Asia-1: From quality perspective. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Peter Sarson, Shohei Shibuya, Tomonori Yanagida, Haruo Kobayashi 0001 |
A technique for dynamic range improvement of intermodulation distortion products for an Interpolating DAC-based Arbitrary Waveform Generator using a phase switching algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Kelson Gent, Akash Agrawal, Michael S. Hsiao |
A framework for fast test generation at the RTL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1-6, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Sandeep Gupta 0001, Miron Abramovici, Magdy Abadir, Sridhar Narayanan |
Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Peter Sarson |
Innovative practices session 7C automotive quality assurance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 35th IEEE VLSI Test Symposium, VTS 2017, Las Vegas, NV, USA, April 9-12, 2017, pp. 1, 2017, IEEE Computer Society, 978-1-5090-4482-5. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
A convergent procedure for partially-reachable states. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Suvadeep Banerjee, Suriyaprakash Natarajan |
Infant mortality tests for analog and mixed-signal circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Surya Piplani, G. S. Visweswaran, Anshul Kumar |
Impact of crosstalk and process variation on capture power reduction for at-speed test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Md Imran Momtaz, Suvadeep Banerjee, Abhijit Chatterjee |
Real-time DC motor error detection and control compensation using linear checksums. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Elena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto |
Security primitives (PUF and TRNG) with STT-MRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Jae Woong Jeong, Jennifer Kitchen, Sule Ozev |
Process independent gain measurement with low overhead via BIST/DUT co-design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Franco Stellari, Peilin Song, Manuel Villalobos, John Sylvestri |
Revealing SRAM memory content using spontaneous photon emission. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Gregor Schatzberger, Friedrich Peter Leisenberger, Peter Sarson |
Yield improvement of an EEPROM for automotive applications while maintaining high reliability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Lorena Anghel, Ahmed Benhassain, Ajith Sivadasan, Florian Cacho, Vincent Huard |
Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Milind Sonawane, Pavan Kumar Datla Jagannadha, Sailendra Chadalavada, Shantanu Sarangi, Mahmut Yilmaz, Amit Sanghani, Karthikeyan Natarajan, Jonathon E. Colburn, Anubhav Sinha |
Dynamic docking architecture for concurrent testing and peak power reduction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Alan Becker |
Short burst software transparent on-line MBIST. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Andreas Riefert, Riccardo Cantoro, Matthias Sauer 0002, Matteo Sonza Reorda, Bernd Becker 0001 |
Effective generation and evaluation of diagnostic SBST programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Fabian Oboril, Azadeh Shirvanian, Mehdi Baradaran Tahoori |
Fault tolerant approximate computing using emerging non-volatile spintronic memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Suriyaprakash Natarajan, Li-C. Wang |
Session 4B - Panel data analytics in semiconductor manufacturing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Amit Sanghani, Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Jonathon E. Colburn |
Flexible scan interface architecture for complex SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Juergen Alt, Paolo Bernardi, Alberto Bosio, Riccardo Cantoro, Hans G. Kerkhoff, Andreas Leininger, Wolfgang Molzer, Alessandro Motta, Christian Pacha, Alberto Pagani, Alireza Rohani, R. Strasser |
Thermal issues in test: An overview of the significant aspects and industrial practice. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Mike Ricchetti, Eric Rentschler, Amit Majumdar 0002, Mike Lowe, Mark LaVine, Skip Lindsey, Sharad Kumar |
Special panel session IIB: "System validation and silicon debug - Is standardization possible?". ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Hari Chauhan, Marvin Onabajo |
Performance enhancement techniques and verification methods for radio frequency circuits and systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Jianwei Zhang, Sandeep K. Gupta 0001 |
Using hardware testing approaches to improve software testing: Undetectable mutant identification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Yanhong Zhou, Huawei Li 0001, Tiancheng Wang, Bo Liu 0018, Yingke Gao, Xiaowei Li 0001 |
Path constraint solving based test generation for observability-enhanced branch coverage. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Sebastian Siatkowski, Chuanhe Jay Shan, Li-C. Wang, Nikolas Sumikawa, W. Robert Daasch, John M. Carulli |
Consistency in wafer based outlier screening. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Jain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho |
Test and diagnosis of paper-based microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio |
Cache- and register-aware system reliability evaluation based on data lifetime analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Sotiris Tselonis, Manolis Kaliorakis, Nikos Foutris, George Papadimitriou 0001, Dimitris Gizopoulos |
Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Ali Ahmadi, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Pankaj Bongale, Vinothkumar Sundaresan, Partha Ghosh, Rubin A. Parekhji |
A novel technique for interdependent trim code optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Chih-Ying Tsai, Kao-Chi Lee, Chien-Hsueh Lin, Sung-Chu Yu, Wen-Rong Liau, Alex Chun-Liang Hou, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Mango C.-T. Chao |
Predicting Vt mean and variance from parallel Id measurement with model-fitting technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Kevin Greene, Vikas Chauhan, Brian A. Floyd |
Code-modulated embedded test for phased arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Georgios Volanis, Dzmitry Maliuk, Yichuan Lu, Kiruba S. Subramani, Angelos Antonopoulos 0002, Yiorgos Makris |
On-die learning-based self-calibration of analog/RF ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Arunkumar Vijayan, Abhishek Koneru, Mojtaba Ebrahimi, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori |
Online soft-error vulnerability estimation for memory arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Yuming Zhuang, Tao Chen 0006, Shravan K. Chaganti, Degang Chen 0001 |
Accurate linearity testing with impure sinusoidal stimulus robust against flicker noise. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Yu-Ting Li, Yong-Xiao Chen, Jin-Fu Li 0001 |
Fault modeling and testing of resistive nonvolatile-8T SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Ran Wang 0002, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty, Amit Sanghani |
A programmable method for low-power scan shift in SoC integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Dae Hyun Kim 0003, Linda S. Milor |
ECC-ASPIRIN: An ECC-assisted post-package repair scheme for aging errors in DRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Stavros Hadjitheophanous, Stelios N. Neophytou, Maria K. Michael |
Scalable parallel fault simulation for shared-memory multiprocessor systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Yuming Zhuang, Degang Chen 0001 |
Accurate spectral testing with non-coherent sampling for large distortion to noise ratios. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Xuan Zuo, Sandeep K. Gupta 0001 |
Process variation oriented delay testing of SRAMs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Jizhe Zhang, Sandeep K. Gupta 0001 |
SRAM yield-per-area optimization under spatially-correlated process variation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Mehdi Baradaran Tahoori, Rob Aitken, Sriram R. Vangal, Bal Sandhu |
Test implications and challenges in near threshold computing special session. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Kaveh Shamsi, Yier Jin |
Security of emerging non-volatile memories: Attacks and defenses. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Dilip Bhavsar, Michael Lohmiller, Pankaj Pant |
Lateral coupling faults in multi-ported register files and methods for their testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Bonnie Lynne Gray |
Active polymers for bio medical microdevices and microfluidic systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Cristiana Bolchini |
Runtime resource management for lifetime extension in multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Sandip Ray, Swarup Bhunia, Yier Jin, Mark M. Tehranipoor |
Security validation in IoT space. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Juan Portillo, Eugene John, Seetharam Narasimhan |
Building trust in 3PIP using asset-based security property verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Bodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu |
Thwarting timing attacks on NEMS relay based designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Bonita Bhaskaran, Amit Sanghani, Kaushik Narayanun, Ayub Abdollahian, Amit Laknaur |
Test method and scheme for low-power validation in modern SOC integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Nikos Foutris, Athanasios Chatzidimitriou, Dimitris Gizopoulos, John Kalamatianos, Vilas Sridharan |
Faults in data prefetchers: Performance degradation and variability. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Ruhul Hasin, Jennifer Kitchen |
Post fabrication tuning of GaN based RF power amplifiers for pico-cell applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-4, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Omar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault |
WeSPer: A flexible small delay defect quality metric. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll |
Fault tolerance of approximate compute algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Sabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee |
Adaptive testing of analog/RF circuits using hardware extracted FSM models. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Miao Tony He, Gustavo K. Contreras, Mark M. Tehranipoor, Dat Tran, LeRoy Winemberg |
Test-point insertion efficiency analysis for LBIST applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Jie Han 0001 |
Introduction to approximate computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Shraddha Bodhe, M. Enamul Amyeen, Clariza Galendez, Houston Mooers, Irith Pomeranz, Srikanth Venkataraman |
Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | |
34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016 ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![IEEE Computer Society, 978-1-4673-8454-4 The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP BibTeX RDF |
|
1 | Andrzej J. Strojwas, Jacob A. Abraham, Hong Hao, Max M. Shulaker |
Keynote address: Challenges and opportunities in electrical characterization and test for 14nm and below. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-2, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Srinivasa Shashank Nuthakki, Rajit Karmakar, Santanu Chattopadhyay, Krishnendu Chakrabarty |
Optimization of the IEEE 1687 access network for hybrid access schedules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1-6, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Antonio Miele |
Lifetime reliability modeling and estimation in multi-core systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 34th IEEE VLSI Test Symposium, VTS 2016, Las Vegas, NV, USA, April 25-27, 2016, pp. 1, 2016, IEEE Computer Society, 978-1-4673-8454-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
1 | Yong-Xiao Chen, Jin-Fu Li 0001 |
Fault modeling and testing of 1T1R memristor memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Kohki Taniguchi, Noriyuki Miura, Taisuke Hayashi, Makoto Nagata |
At-Product-Test Dedicated Adaptive supply-resonance suppression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ashkan Eghbal, Pooria M. Yaghini, Nader Bagherzadeh |
Capacitive Coupling Mitigation for TSV-based 3D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ali Ahmadi, Ke Huang 0001, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris |
Yield prognosis for fab-to-fab product migration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Chao Han, Adit D. Singh |
Testing cross wire opens within complex gates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Rob Aitken |
Panel: Is design-for-security the new DFT? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Suraj Sindia |
Innovative practices session 2C: New technologies, new challenges - 2. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sk Subidh Ali, Ozgur Sinanoglu |
TMO: A new class of attack on cipher misusing test infrastructure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Gurgen Harutyunyan, Grigor Tshagharyan, Yervant Zorian |
Impact of parameter variations on FinFET faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Dominik Erb, Karsten Scheibler, Matthias Sauer 0002, Sudhakar M. Reddy, Bernd Becker 0001 |
Multi-cycle Circuit Parameter Independent ATPG for interconnect open defects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Erik Larsson, Bill Eklow, Scott Davidsson, Rob Aitken, Artur Jutman, Christophe Lotz |
No Fault Found: The root cause. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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