|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 239 occurrences of 145 keywords
|
|
|
Results
Found 319 publication records. Showing 319 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
14 | Pietro Babighian, Luca Benini, Enrico Macii |
A Scalable ODC-Based Algorithm for RTL Insertion of Gated Clocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France, pp. 500-505, 2004, IEEE Computer Society, 0-7695-2085-5. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Cao Cao, Bengt Oelmann |
Mixed Synchronous/Asynchronous State Memory for Low Power FSM Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August - 3 September 2004, Rennes, France, pp. 363-370, 2004, IEEE Computer Society, 0-7695-2203-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Ruchira Sasanka, Sarita V. Adve, Yen-Kuang Chen, Eric Debes |
The energy efficiency of CMP vs. SMT for multimedia workloads. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICS ![In: Proceedings of the 18th Annual International Conference on Supercomputing, ICS 2004, Saint Malo, France, June 26 - July 01, 2004, pp. 196-206, 2004, ACM, 1-58113-839-3. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
multimedia, energy efficiency, CMP, SMT |
14 | Kim M. Hazelwood, David M. Brooks |
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004, pp. 326-331, 2004, ACM. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
voltage emergencies, power-aware computing, hardware-software co-design, dI/dt |
14 | Tilman Glökler, Andreas Hoffmann 0002, Heinrich Meyr |
Methodical Low-Power ASIP Design Space Exploration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 33(3), pp. 229-246, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
ICORE, low power, ASIP, application-specific instruction set processor, low energy, LISA |
14 | Arindam Mukherjee 0001, Malgorzata Marek-Sadowska |
Clock and Power Gating with Timing Closure. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Des. Test Comput. ![In: IEEE Des. Test Comput. 20(3), pp. 32-39, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Alex K. Jones, Prithviraj Banerjee |
An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPGA ![In: Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003, pp. 244, 2003, ACM, 1-58113-651-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Allan Hartstein, Thomas R. Puzak |
Optimum Power/Performance Pipeline Depth. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MICRO ![In: Proceedings of the 36th Annual International Symposium on Microarchitecture, San Diego, CA, USA, December 3-5, 2003, pp. 117-128, 2003, IEEE Computer Society, 0-7695-2043-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Russ Joseph, David M. Brooks, Margaret Martonosi |
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), Anaheim, California, USA, February 8-12, 2003, pp. 79-90, 2003, IEEE Computer Society, 0-7695-1871-0. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Sergio Saponara, Luca Fanucci, Luca Serafini |
Low-Power FFT/IFFT VLSI Macro Cell for Scalable Broadband VDSL Modem. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IWSOC ![In: Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June - 2 July 2003, Calgary, Alberta, Canada, pp. 161-166, 2003, IEEE Computer Society, 0-7695-1944-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Luca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Fabrizio Pro, Massimo Poncino |
Energy-aware design techniques for differential power analysis protection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 2003, pp. 36-41, 2003, ACM, 1-58113-688-9. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
low-power design, differential power analysis |
14 | Hongbo Yang, Guang R. Gao, Clement Leung |
On achieving balanced power consumption in software pipelined loops. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CASES ![In: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002, pp. 210-217, 2002, ACM, 1-58113-575-0. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
power-aware compilation, instruction level parallelism, software pipelining |
14 | Victor V. Zyuban, Philip N. Strenski |
Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002, pp. 166-171, 2002, ACM, 1-58113-475-4. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
hardware intensity, energy efficiency, metric, power, energy |
14 | Ad M. G. Peeters, Kees van Berkel 0001 |
Synchronous Handshake Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASYNC ![In: 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 11-14 March 2001, Salt Lake City, UT, USA, pp. 86-95, 2001, IEEE Computer Society, 0-7695-1034-5. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Tao Li, Chen Ding |
Instruction Balance and Its Relation to Program Energy Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCPC ![In: Languages and Compilers for Parallel Computing, 14th International Workshop, LCPC 2001, Cumberland Falls, KY, USA, August 1-3, 2001. Revised Papers, pp. 71-85, 2001, Springer, 3-540-04029-3. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | Meng Tong Tan, Joseph Sylvester Chang, Yit Chow Tong |
A novel low-voltage low-power wave digital filter bank for an intelligent noise reduction digital hearing instrument. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2001 International Symposium on Circuits and Systems, ISCAS 2001, Sydney, Australia, May 6-9, 2001, pp. 681-684, 2001, IEEE, 0-7803-6685-9. The full citation details ...](Pics/full.jpeg) |
2001 |
DBLP DOI BibTeX RDF |
|
14 | David M. Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook |
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Micro ![In: IEEE Micro 20(6), pp. 26-44, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
14 | David M. Brooks, Margaret Martonosi |
Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPCA ![In: Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, Orlando, FL, USA, January 9-12, 1999, pp. 13-22, 1999, IEEE Computer Society, 0-7695-0004-8. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
14 | Uzi Zangi, Ran Ginosar |
A low power video processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 136-138, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
Displaying result #301 - #319 of 319 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4] |
|