Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
17 | Klaus Schneider 0001, Anoop Bhagyanath, Julius Roob |
Code generation criteria for buffered exposed datapath architectures from dataflow graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
LCTES ![In: LCTES '22: 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, San Diego, CA, USA, 14 June 2022, pp. 133-145, 2022, ACM, 978-1-4503-9266-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Anoop Bhagyanath, Klaus Schneider 0001 |
Buffer Allocation for Exposed Datapath Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MCSoC ![In: 15th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, MCSoC 2022, Penang, Malaysia, December 19-22, 2022, pp. 18-25, 2022, IEEE, 978-1-6654-6499-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Armand Behroozi, Sunghyun Park 0004, Scott A. Mahlke |
Loner: utilizing the CPU vector datapath to process scalar integer data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CC ![In: CC '22: 31st ACM SIGPLAN International Conference on Compiler Construction, Seoul, South Korea, April 2 - 3, 2022, pp. 205-217, 2022, ACM, 978-1-4503-9183-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Klaus Schneider 0001, Anoop Bhagyanath, Julius Roob |
Virtual Buffers for Exposed Datapath Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MBMV ![In: Methods and Description Languages for Modelling and Verification of Circuits and Systems, MBMV 2022, 25th Workshop, Virtual Event, Germany, February 17-18, 2022, pp. 1-11, 2022, VDE/IEEE, 978-3-8007-5754-1. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP BibTeX RDF |
|
17 | Junxue Zhang 0001, Chaoliang Zeng, Hong Zhang 0025, Shuihai Hu, Kai Chen 0005 |
LiteFlow: towards high-performance adaptive neural networks for kernel datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SIGCOMM ![In: SIGCOMM '22: ACM SIGCOMM 2022 Conference, Amsterdam, The Netherlands, August 22 - 26, 2022, pp. 414-427, 2022, ACM, 978-1-4503-9420-8. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Samuel Coward, George A. Constantinides, Theo Drane |
Automatic Datapath Optimization using E-Graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARITH ![In: 29th IEEE Symposium on Computer Arithmetic, ARITH 2022, Lyon, France, September 12-14, 2022, pp. 43-50, 2022, IEEE, 978-1-6654-7827-4. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Tomasz Osinski, Jan Palimaka, Mateusz Kossakowski, Frédéric Dang Tran, El-Fadel Bonfoh, Halina Tarasiuk |
A novel programmable software datapath for software-defined networking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoNEXT ![In: Proceedings of the 18th International Conference on emerging Networking EXperiments and Technologies, CoNEXT 2022, Roma, Italy, December 6-9, 2022, pp. 245-260, 2022, ACM, 978-1-4503-9508-3. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Jun-Seok Park, Changsoo Park, Suknam Kwon, Hyeong-Seok Kim, Taeho Jeon, Yesung Kang, Heonsoo Lee, Dongwoo Lee, James Kim, YoungJong Lee, Sangkyu Park, Jun-Woo Jang, Sanghyuck Ha, MinSeong Kim, Jihoon Bang, Sukhwan Lim, Inyup Kang |
A Multi-Mode 8K-MAC HW-Utilization-Aware Neural Processing Unit with a Unified Multi-Precision Datapath in 4nm Flagship Mobile SoC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISSCC ![In: IEEE International Solid-State Circuits Conference, ISSCC 2022, San Francisco, CA, USA, February 20-26, 2022, pp. 246-248, 2022, IEEE, 978-1-6654-2800-2. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | Haiyang Lin, Mingyu Yan, Duo Wang, Mo Zou, Fengbin Tu, Xiaochun Ye, Dongrui Fan, Yuan Xie 0001 |
Alleviating datapath conflicts and design centralization in graph analytics acceleration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10 - 14, 2022, pp. 901-906, 2022, ACM, 978-1-4503-9142-9. The full citation details ...](Pics/full.jpeg) |
2022 |
DBLP DOI BibTeX RDF |
|
17 | MohammadReza Taheri, Amir Sabbagh Molahosseini, Keivan Navi |
Efficient Incorporation of the RNS Datapath in Reverse Converter. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. II Express Briefs ![In: IEEE Trans. Circuits Syst. II Express Briefs 68(4), pp. 1388-1392, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
17 | Paulo C. Santos 0001, João Paulo Cardoso de Lima, Rafael Fão de Moura, Marco A. Z. Alves, Antonio C. S. Beck, Luigi Carro |
Enabling Near-Data Accelerators Adoption by Through Investigation of Datapath Solutions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Program. ![In: Int. J. Parallel Program. 49(2), pp. 237-252, 2021. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
17 | Daniele Passaretti, Thilo Pionteck |
Configurable Pipelined Datapath for Data Acquisition in Interventional Computed Tomography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2021, Orlando, FL, USA, May 9-12, 2021, pp. 257, 2021, IEEE, 978-1-6654-3555-0. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
17 | Irene Zhang, Amanda Raybuck, Pratyush Patel, Kirk Olynyk, Jacob Nelson 0001, Omar S. Navarro Leija, Ashlie Martinez, Jing Liu, Anna Kornfeld Simpson, Sujay Jayakar, Pedro Henrique Penna, Max Demoulin, Piali Choudhury, Anirudh Badam |
The Demikernel Datapath OS Architecture for Microsecond-scale Datacenter Systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SOSP ![In: SOSP '21: ACM SIGOPS 28th Symposium on Operating Systems Principles, Virtual Event / Koblenz, Germany, October 26-29, 2021, pp. 195-211, 2021, ACM, 978-1-4503-8709-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
17 | Mehmet Kayaalp 0001 |
Using Logisim-evolution for Teaching Datapath and Control. ![Search on Bibsonomy](Pics/bibsonomy.png) |
WCAE ![In: ACM/IEEE Workshop on Computer Architecture Education, WCAE 2021, Raleigh, NC, USA, June 17, 2021, pp. 1-8, 2021, IEEE, 978-1-6654-0001-5. The full citation details ...](Pics/full.jpeg) |
2021 |
DBLP DOI BibTeX RDF |
|
17 | Vijay Dahiphale, Gaurav Bansod, Ankur Zambare, Narayan Pisharoty |
Design and implementation of various datapath architectures for the ANU lightweight cipher on an FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Frontiers Inf. Technol. Electron. Eng. ![In: Frontiers Inf. Technol. Electron. Eng. 21(4), pp. 615-628, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Siva Nishok Dhanuskodi, Samuel Allen, Daniel E. Holcomb |
Efficient Register Renaming Architectures for 8-bit AES Datapath at 0.55 pJ/bit in 16-nm FinFET. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 28(8), pp. 1807-1820, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Rei Ueno, Naofumi Homma, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, Makoto Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger |
High Throughput/Gate AES Hardware Architectures Based on Datapath Compression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 69(4), pp. 534-548, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Shathanaa Rajmohan, Ramasubramanian Natarajan |
A Memetic Algorithm-Based Design Space Exploration for Datapath Resource Allocation During High-Level Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Circuits Syst. Comput. ![In: J. Circuits Syst. Comput. 29(1), pp. 2050001:1-2050001:30, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Qi Nie, Sharad Malik |
MemFlow: Memory-Driven Data Scheduling With Datapath Co-Design in Accelerators for Large-Scale Inference Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(9), pp. 1875-1888, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Gopinath Mahale, Pramod P. Udupa, Kiran Kolar Chandrasekharan, Sehwan Lee |
WinDConv: A Fused Datapath CNN Accelerator for Power-Efficient Edge Devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11), pp. 4278-4289, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Shilpa Pendyala, Sheikh Ariful Islam, Srinivas Katkoori |
Interval Arithmetic and Self-Similarity Based RTL Input Vector Control for Datapath Leakage Minimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Design Autom. Electr. Syst. ![In: ACM Trans. Design Autom. Electr. Syst. 25(6), pp. 54:1-54:26, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Shahzad, Eun-Sung Jung |
Flexible IoT Datapath Programming using P4. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/2006.15782, 2020. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP BibTeX RDF |
|
17 | Marc Dahlem, Klaus Schneider 0001 |
Compiling synchronous languages to optimal move code for exposed datapath architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, St. Goar, Germany, May 25-26, 2020, pp. 19-25, 2020, ACM, 978-1-4503-7131-5. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Jiun Hong, TaeGeon Lee, Saad Arslan, HyungWon Kim 0001 |
Compact CNN Training Accelerator with Variable Floating-Point Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020, pp. 326-327, 2020, IEEE, 978-1-7281-8331-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Junghoon Cho, Junhyun Song, Jongsun Park 0001 |
Implementation of Low Cost ARIA Architecture with Composite Field Optimization and Datapath Modification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISOCC ![In: International SoC Design Conference, ISOCC 2020, Yeosu, South Korea, October 21-24, 2020, pp. 304-305, 2020, IEEE, 978-1-7281-8331-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | David Langerman, Alex Johnson, Kyle Buettner, Alan D. George |
Beyond Floating-Point Ops: CNN Performance Prediction with Critical Datapath Length. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HPEC ![In: 2020 IEEE High Performance Extreme Computing Conference, HPEC 2020, Waltham, MA, USA, September 22-24, 2020, pp. 1-9, 2020, IEEE, 978-1-7281-9219-2. The full citation details ...](Pics/full.jpeg) |
2020 |
DBLP DOI BibTeX RDF |
|
17 | Nusa Zidaric |
Automated Design Space Exploration and Datapath Synthesis for Finite Field Arithmetic with Applications to Lightweight Cryptography. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2020 |
RDF |
|
17 | Vijay Dahiphale, Hrishikesh Raut, Gaurav Bansod |
Design and Implementation of novel datapath designs of lightweight cipher RECTANGLE for resource constrained environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Multim. Tools Appl. ![In: Multim. Tools Appl. 78(16), pp. 23659-23688, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Yuki Taguchi, Ryota Kawashima, Hiroki Nakayama, Tsunemasa Hayashi, Hiroshi Matsuo |
Fast Datapath Processing Based on Hop-by-Hop Packet Aggregation for Service Function Chaining. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Inf. Syst. ![In: IEICE Trans. Inf. Syst. 102-D(11), pp. 2184-2194, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Yu Wang 0136, Donghoon Yeo, Hyunchul Shin |
Effective datapath logic extraction techniques using connection vectors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 13(6), pp. 741-747, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Utkarsh Gupta, Priyank Kalla, Vikas Rao |
Boolean Gröbner Basis Reductions on Finite Field Datapath Circuits Using the Unate Cube Set Algebra. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3), pp. 576-588, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Mahmood Fazlali, Mohammad K. Fallah, Naemeh Hosseinpour, Ali Katanforoush |
Accelerating datapath merging by task parallelisation on multicore systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Parallel Emergent Distributed Syst. ![In: Int. J. Parallel Emergent Distributed Syst. 34(5), pp. 615-628, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Shathanaa Rajmohan, Ramasubramanian Natarajan |
Group influence based improved firefly algorithm for Design Space Exploration of Datapath resource allocation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Intell. ![In: Appl. Intell. 49(6), pp. 2084-2100, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Ho Keun Kim, Myung Hoon Sunwoo |
Low Power AES Using 8-Bit and 32-Bit Datapath Optimization for Small Internet-of-Things (IoT). ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 91(11-12), pp. 1283-1289, 2019. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Alex Hirvonen, Kati Tervo, Heikki Kultala, Pekka Jääskeläinen |
AEx: Automated Customization of Exposed Datapath Soft-Cores. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 22nd Euromicro Conference on Digital System Design, DSD 2019, Kallithea, Greece, August 28-30, 2019, pp. 35-42, 2019, IEEE, 978-1-7281-2862-7. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Kanishkan Vadivel, Roel Jordans, Sander Stuijk, Henk Corporaal, Pekka Jääskeläinen, Heikki Kultala |
Towards Efficient Code Generation for Exposed Datapath Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SCOPES ![In: Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES '19, Sankt Goar, Germany, May 27-28, 2019, pp. 86-89, 2019, ACM, 978-1-4503-6762-2. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Markus Anders, Klaus Schneider 0001 |
A Formal Semantics of Exposed Datapath Architectures with Buffered Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 19th International Conference on Application of Concurrency to System Design, ACSD 2019, Aachen, Germany, June 23-28, 2019, pp. 53-62, 2019, IEEE, 978-1-7281-3843-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Vikram B. Suresh, Sudhir Satpathy, Raghavan Kumar, Mark A. Anders 0001, Himanshu Kaul, Amit Agarwal 0001, Steven Hsu, Ram Krishnamurthy 0001, Vivek De, Sanu Mathew |
A 250Mv, 0.063J/Ghash Bitcoin Mining Engine in 14nm CMOS Featuring Dual-Vcc Sha256 Datapath and 3-Phase Latch Based Clocking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, pp. 32-, 2019, IEEE, 978-4-86348-720-8. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Qinhao Wang, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita |
High-Level Engineering Change Through Programmable Datapath and SMT Solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019, pp. 1-5, 2019, IEEE, 978-1-7281-0397-6. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Pratik Pachange, Gaurav Bansod |
A Fast and Efficient Datapath Designs of Lightweight Cipher RoadRunneR on FPGA's for Resource Constrained Environments. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IoTSMS ![In: Sixth International Conference on Internet of Things: Systems, Management and Security, IOTSMS 2019, Granada, Spain, October 22-25, 2019, pp. 65-72, 2019, IEEE, 978-1-7281-2949-5. The full citation details ...](Pics/full.jpeg) |
2019 |
DBLP DOI BibTeX RDF |
|
17 | Anirban Sengupta, Deepak Kachave |
Spatial and Temporal Redundancy for Transient Fault-Tolerant Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Aerosp. Electron. Syst. ![In: IEEE Trans. Aerosp. Electron. Syst. 54(3), pp. 1168-1183, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Marc Dahlem, Anoop Bhagyanath, Klaus Schneider 0001 |
Optimal Scheduling for Exposed Datapath Architectures with Buffered Processing Units by ASP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1804.10998, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP BibTeX RDF |
|
17 | Piotr Patronik, Stanislaw J. Piestrak |
Design of RNS Reverse Converters with Constant Shifting to Residue Datapath Channels. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 90(3), pp. 323-339, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Marc Dahlem, Anoop Bhagyanath, Klaus Schneider 0001 |
Optimal Scheduling for Exposed Datapath Architectures with Buffered Processing Units by ASP. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Theory Pract. Log. Program. ![In: Theory Pract. Log. Program. 18(3-4), pp. 438-451, 2018. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Avinash Raikwar, Amit Kumar Mishra |
Datapath Integrated Mapping in BTS Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MWSCAS ![In: IEEE 61st International Midwest Symposium on Circuits and Systems, MWSCAS 2018, Windsor, ON, Canada, August 5-8, 2018, pp. 1062-1065, 2018, IEEE, 978-1-5386-7392-8. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Qi Nie, Sharad Malik |
MemFlow: Memory-driven data scheduling with datapath co-design in accelerators for large-scale inference applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, Jeju, Korea (South), January 22-25, 2018, pp. 446-451, 2018, IEEE, 978-1-5090-0602-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Markus Anders, Anoop Bhagyanath, Klaus Schneider 0001 |
On Memory Optimal Code Generation for Exposed Datapath Architectures with Buffered Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 18th International Conference on Application of Concurrency to System Design, ACSD 2018, Bratislava, Slovakia, June 25-29, 2018, pp. 115-124, 2018, IEEE Computer Society, 978-1-5386-7013-2. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Makoto Saitoh, Elsayed A. Elsayed, Thiem Van Chu, Susumu Mashimo, Kenji Kise |
A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018, Boulder, CO, USA, April 29 - May 1, 2018, pp. 197-204, 2018, IEEE Computer Society, 978-1-5386-5522-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Mark A. Anders 0001, Himanshu Kaul, Sanu Mathew, Vikram B. Suresh, Sudhir Satpathy, Amit Agarwal 0001, Steven Hsu, Ram Krishnamurthy 0001 |
2.9TOPS/W Reconfigurable Dense/Sparse Matrix-Multiply Accelerator with Unified INT8/INTI6/FP16 Datapath in 14NM Tri-Gate CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Circuits ![In: 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, June 18-22, 2018, pp. 39-40, 2018, IEEE, 978-1-5386-4214-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Jiaming Xu, Ao Fan, Minyi Lu, Weiwei Shan |
Differential Power Analysis of 8-Bit Datapath AES for IoT Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TrustCom/BigDataSE ![In: 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications / 12th IEEE International Conference On Big Data Science And Engineering, TrustCom/BigDataSE 2018, New York, NY, USA, August 1-3, 2018, pp. 1470-1473, 2018, IEEE, 978-1-5386-4388-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Minyi Lu, Ao Fan, Jiaming Xu, Weiwei Shan |
A Compact, Lightweight and Low-Cost 8-Bit Datapath AES Circuit for IoT Applications in 28nm CMOS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
TrustCom/BigDataSE ![In: 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications / 12th IEEE International Conference On Big Data Science And Engineering, TrustCom/BigDataSE 2018, New York, NY, USA, August 1-3, 2018, pp. 1464-1469, 2018, IEEE, 978-1-5386-4388-4. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Arman Roohi, Ramtin Zand, Ronald F. DeMara |
Logic-Encrypted Synthesis for Energy-Harvesting-Powered Spintronic-Embedded Datapath Design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Great Lakes Symposium on VLSI ![In: Proceedings of the 2018 on Great Lakes Symposium on VLSI, GLSVLSI 2018, Chicago, IL, USA, May 23-25, 2018, pp. 9-14, 2018, ACM. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Qiao Xiang, Franck Le, Yeon-Sup Lim, Vinod K. Mishra, Christopher Williams 0001, Yang Richard Yang, Hongwei Zhang |
OpenSDC: A Novel, Generic Datapath for Software Defined Coalitions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MILCOM ![In: 2018 IEEE Military Communications Conference, MILCOM 2018, Los Angeles, CA, USA, October 29-31, 2018, pp. 1-6, 2018, IEEE, 978-1-5386-7185-6. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Ting Lin, Shan Cao, Shunqing Zhang, Shugong Xu |
A Unified Reconfigurable Datapath for 5G Compatible LDPC Decoding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
APCCAS ![In: 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Chengdu, China, October 26-30, 2018, pp. 215-218, 2018, IEEE, 978-1-5386-8240-1. The full citation details ...](Pics/full.jpeg) |
2018 |
DBLP DOI BibTeX RDF |
|
17 | Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigné, Xuan-Tu Tran |
AES Datapath Optimization Strategies for Low-Power Low-Energy Multisecurity-Level Internet-of-Things Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 25(12), pp. 3281-3290, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Junghoon Oh, Mineo Kaneko |
Latency-Aware Selection of Check Variables for Soft-Error Tolerant Datapath Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 100-A(7), pp. 1506-1510, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Yu Wang 0136, Hyunchul Shin |
Effective regularity extraction and placement techniques for datapath-intensive circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IET Circuits Devices Syst. ![In: IET Circuits Devices Syst. 11(5), pp. 512-519, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Cunxi Yu, Mihir Choudhury, Andrew Sullivan, Maciej J. Ciesielski |
Advanced Datapath Synthesis using Graph Isomorphism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1708.09597, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
17 | Payman Behnam, Bijan Alizadeh, Sajjad Taheri |
Automated Formal Equivalence Verification of Pipelined Nested Loops in Datapath Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CoRR ![In: CoRR abs/1712.09818, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP BibTeX RDF |
|
17 | Martin Broich, Tobias G. Noll |
Optimal Datapath Widths Within Turbo and Viterbi Decoders for High Area- and Energy-Efficiency. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 87(3), pp. 299-325, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Cheng-Chun Tu, Joe Stringer, Justin Pettit |
Building an Extensible Open vSwitch Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM SIGOPS Oper. Syst. Rev. ![In: ACM SIGOPS Oper. Syst. Rev. 51(1), pp. 72-77, 2017. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Anoop Bhagyanath, Klaus Schneider 0001 |
Exploring different execution paradigms in exposed datapath architectures with buffered processing units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017, pp. 1-10, 2017, IEEE, 978-1-5386-3437-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Heikki O. Kultala, Pekka Jääskeläinen, Johannes IJzerman, Lasse Lehtonen, Timo Viitanen, Markku J. Mäkitalo, Jarmo H. Takala |
Exposed datapath optimizations for loop scheduling. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: 2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017, Pythagorion, Greece, July 17-20, 2017, pp. 171-178, 2017, IEEE, 978-1-5386-3437-0. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Anoop Bhagyanath, Klaus Schneider 0001 |
Exploring the Potential of Instruction-Level Parallelism of Exposed Datapath Architectures with Buffered Processing Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACSD ![In: 17th International Conference on Application of Concurrency to System Design, ACSD 2017, Zaragoza, Spain, June 25-30, 2017, pp. 106-115, 2017, IEEE Computer Society, 978-1-5386-2867-6. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Cunxi Yu, Mihir Choudhury, Andrew Sullivan, Maciej J. Ciesielski |
Advanced datapath synthesis using graph isomorphism. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017, Irvine, CA, USA, November 13-16, 2017, pp. 424-429, 2017, IEEE, 978-1-5386-3093-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Akshay Narayan 0001, Frank Cangialosi, Prateesh Goyal, Srinivas Narayana, Mohammad Alizadeh, Hari Balakrishnan |
The Case for Moving Congestion Control Out of the Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
HotNets ![In: Proceedings of the 16th ACM Workshop on Hot Topics in Networks, Palo Alto, CA, USA, HotNets 2017, November 30 - December 01, 2017, pp. 101-107, 2017, ACM, 978-1-4503-5569-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Minas Dasygenis, Thanasis Karpouzis, Konstantinos Stergiou 0001 |
Template matching of a coarse grain reconfigurable architecture datapath using constraint programming. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PCI ![In: Proceedings of the 21st Pan-Hellenic Conference on Informatics, Larissa, Greece, September 28-30, 2017, pp. 17:1-17:2, 2017, ACM, 978-1-4503-5355-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Zhongqi An, Zhengyu Zhang, Qiang Li, Jing Xing, Hao Du, Zhan Wang, Zhigang Huo, Jie Ma |
Optimizing the Datapath for Key-value Middleware with NVMe SSDs over RDMA Interconnects. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CLUSTER ![In: 2017 IEEE International Conference on Cluster Computing, CLUSTER 2017, Honolulu, HI, USA, September 5-8, 2017, pp. 582-586, 2017, IEEE Computer Society, 978-1-5386-2326-8. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Chau-Chin Huang, Bo-Qiao Lin, Hsin-Ying Lee, Yao-Wen Chang, Kuo-Sheng Wu, Jun-Zhi Yang |
Graph-Based Logic Bit Slicing for Datapath-Aware Placement. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 54th Annual Design Automation Conference, DAC 2017, Austin, TX, USA, June 18-22, 2017, pp. 71:1-71:6, 2017, ACM, 978-1-4503-4927-7. The full citation details ...](Pics/full.jpeg) |
2017 |
DBLP DOI BibTeX RDF |
|
17 | Weihua Zheng, Shenping Xiao, Kenli Li 0001, Keqin Li 0001, Weijin Jiang |
A performance-efficient and datapath-regular implementation of modified split-radix fast Fourier transform. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Intell. Fuzzy Syst. ![In: J. Intell. Fuzzy Syst. 31(2), pp. 957-965, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Huawei Huang, Song Guo 0001, Jinsong Wu 0001, Jie Li 0002 |
Green DataPath for TCAM-Based Software-Defined Networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Commun. Mag. ![In: IEEE Commun. Mag. 54(11), pp. 194-201, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Junghoon Oh, Mineo Kaneko |
Area-Efficient Soft-Error Tolerant Datapath Synthesis Based on Speculative Resource Sharing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. ![In: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 99-A(7), pp. 1311-1322, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Alberto A. Del Barrio, Jason Cong, Román Hermida |
A Distributed Clustered Architecture to Tackle Delay Variations in Datapath Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(3), pp. 419-432, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Deepak Kachave, Anirban Sengupta |
Integrating physical level design and high level synthesis for simultaneous multi-cycle transient and multiple transient fault resiliency of application specific datapath processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 60, pp. 141-152, 2016. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Yu Yuan, Erdal Oruklu |
Leakage reduction techniques for FinFET datapath circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EIT ![In: 2016 IEEE International Conference on Electro Information Technology, EIT 2016, Grand Forks, ND, USA, May 19-21, 2016, pp. 638-641, 2016, IEEE, 978-1-4673-9985-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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17 | Onur Kayiran, Adwait Jog, Ashutosh Pattnaik, Rachata Ausavarungnirun, Xulong Tang, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das |
μC-States: Fine-grained GPU Datapath Power Management. ![Search on Bibsonomy](Pics/bibsonomy.png) |
PACT ![In: Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, PACT 2016, Haifa, Israel, September 11-15, 2016, pp. 17-30, 2016, ACM, 978-1-4503-4121-9. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Yifan He, Maurice Peemen, Luc Waeijen, Erkan Diken, Mattia Fiumara, Gerard K. Rauwerda, Henk Corporaal, Tong Geng |
A configurable SIMD architecture with explicit datapath for intelligent learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2016, Agios Konstantinos, Samos Island, Greece, July 17-21, 2016, pp. 156-163, 2016, IEEE, 978-1-5090-3076-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Anoop Bhagyanath, Klaus Schneider 0001 |
Optimal compilation for exposed datapath architectures with buffered processing units by SAT solvers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
MEMOCODE ![In: 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2016, Kanpur, India, November 18-20, 2016, pp. 143-152, 2016, IEEE, 978-1-5090-2791-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Junghoon Oh, Mineo Kaneko |
Soft-Error Tolerant Datapath Synthesis Considering Adjacency Constraint between Components. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016, pp. 595-600, 2016, IEEE Computer Society, 978-1-4673-9039-2. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Michael Adriaansen, Mark Wijtvliet, Roel Jordans, Luc Waeijen, Henk Corporaal |
Code Generation for Reconfigurable Explicit Datapath Architectures with LLVM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: 2016 Euromicro Conference on Digital System Design, DSD 2016, Limassol, Cyprus, August 31 - September 2, 2016, pp. 30-37, 2016, IEEE Computer Society, 978-1-5090-2817-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Andreas Becher, Stefan Wildermann, Moritz Mühlenthaler, Jürgen Teich |
ReOrder: Runtime datapath generation for high-throughput multi-stream processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ReConFig ![In: International Conference on ReConFigurable Computing and FPGAs, ReConFig 2016, Cancun, Mexico, November 30 - Dec. 2, 2016, pp. 1-8, 2016, IEEE, 978-1-5090-3707-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Payman Behnam, Bijan Alizadeh, Sajjad Taheri, Masahiro Fujita |
Formally analyzing fault tolerance in datapath designs using equivalence checking. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASP-DAC ![In: 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016, Macao, Macao, January 25-28, 2016, pp. 133-138, 2016, IEEE, 978-1-4673-9569-4. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
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17 | Yuki Fukazawa, Keita Watanabe, Yuki Minoura, Toshio Kondo, Takahiro Sasaki |
SIMD-based datapath with efficient operation structure for motion estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICASSP ![In: 2016 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP 2016, Shanghai, China, March 20-25, 2016, pp. 1031-1035, 2016, IEEE, 978-1-4799-9988-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Joonas Multanen, Heikki Kultala, Matias Koskela, Timo Viitanen, Pekka Jääskeläinen, Jarmo Takala, Aram Danielyan, Cristóvão Cruz |
OpenCL programmable exposed datapath high performance low-power image signal processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
NORCAS ![In: IEEE Nordic Circuits and Systems Conference, NORCAS 2016, Copenhagen, Denmark, November 1-2, 2016, pp. 1-6, 2016, IEEE, 978-1-5090-1095-0. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Cunxi Yu, Maciej J. Ciesielski |
Automatic word-level abstraction of datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, pp. 1718-1721, 2016, IEEE, 978-1-4799-5341-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Ayub Chin Abdullah, Chia Yee Ooi, Nordinah Bt Ismail, Nurita Binti Mohammad |
Power-aware through-silicon-via minimization by partitioning finite state machine with datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS ![In: IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016, pp. 1942-1945, 2016, IEEE, 978-1-4799-5341-7. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Edith Beigné, Xuan-Tu Tran |
Ultra low-power and low-energy 32-bit datapath AES architecture for IoT applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICICDT ![In: International Conference on IC Design and Technology, ICICDT 2016, Ho Chi Minh, Vietnam, June 27-29, 2016, pp. 1-4, 2016, IEEE, 978-1-5090-0827-8. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | V. R. Devanathan, Sumant Kale |
A reconfigurable built-in memory self-repair architecture for heterogeneous cores with embedded BIST datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ITC ![In: 2016 IEEE International Test Conference, ITC 2016, Fort Worth, TX, USA, November 15-17, 2016, pp. 1-6, 2016, IEEE, 978-1-4673-8773-6. The full citation details ...](Pics/full.jpeg) |
2016 |
DBLP DOI BibTeX RDF |
|
17 | Guang-Ming Tang |
Studies on Datapath Circuits for Superconductor Bit-Slice Microprocessors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
|
2016 |
RDF |
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17 | Anirban Sengupta, Saumya Bhadauria |
Bacterial foraging driven exploration of multi cycle fault tolerant datapath based on power-performance tradeoff in high level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Expert Syst. Appl. ![In: Expert Syst. Appl. 42(10), pp. 4719-4732, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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17 | Kan Shi, David Boland, George A. Constantinides |
Imprecise Datapath Design: An Overclocking Approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ACM Trans. Reconfigurable Technol. Syst. ![In: ACM Trans. Reconfigurable Technol. Syst. 8(2), pp. 6:1-6:23, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Weihua Zheng, Kenli Li 0001, Keqin Li 0001 |
Datapath-regular implementation and scaled technique for N=3×2m DFTs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Signal Process. ![In: Signal Process. 113, pp. 68-79, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Anirban Sengupta, Saumya Bhadauria |
Automated design space exploration of multi-cycle transient fault detectable datapath based on multi-objective user constraints for application specific computing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Adv. Eng. Softw. ![In: Adv. Eng. Softw. 82, pp. 14-24, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Saumya Bhadauria, Anirban Sengupta |
Adaptive bacterial foraging driven datapath optimization: Exploring power-performance tradeoff in high level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Appl. Math. Comput. ![In: Appl. Math. Comput. 269, pp. 265-278, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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17 | Bijan Alizadeh, Payman Behnam, Somayeh Sadeghi Kohan |
A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Computers ![In: IEEE Trans. Computers 64(6), pp. 1564-1578, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Anirban Sengupta, Vipul Kumar Mishra |
Simultaneous exploration of optimal datapath and loop based high level transformation during area-delay tradeoff in architectural synthesis using swarm intelligence. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Int. J. Knowl. Based Intell. Eng. Syst. ![In: Int. J. Knowl. Based Intell. Eng. Syst. 19(1), pp. 47-61, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Anirban Sengupta, Reza Sedaghat |
Swarm intelligence driven design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis based on user power-delay budget. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Microelectron. Reliab. ![In: Microelectron. Reliab. 55(6), pp. 990-1004, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Pekka Jääskeläinen, Heikki Kultala, Timo Viitanen, Jarmo Takala |
Code Density and Energy Efficiency of Exposed Datapath Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 80(1), pp. 49-64, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
17 | Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He |
A Low-Energy Wide SIMD Architecture with Explicit Datapath. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. Signal Process. Syst. ![In: J. Signal Process. Syst. 80(1), pp. 65-86, 2015. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
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17 | Efstathios Sotiriou-Xanthopoulos, Dionysios Diamantopoulos, George Economakos |
Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ARC ![In: Applied Reconfigurable Computing - 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings, pp. 321-330, 2015, Springer, 978-3-319-16213-3. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|