Search results for "nanoelectronic"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
22	Özgür Türel, Jung Hoon Lee, Xiaolong Ma, Konstantin Likharev	Architectures for nanoelectronic implementation of artificial neural networks: new results.	Neurocomputing	2005	DBLP DOI BibTeX RDF
22	Árpád I. Csurgay, Wolfgang Porod, Stephen M. Goodnick	The circuit paradigm in nanoelectronics - field-coupled and hybrid nanoelectronic circuits.	ECCTD	2005	DBLP DOI BibTeX RDF
22	André DeHon, Konstantin Likharev	Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation.	ICCAD	2005	DBLP DOI BibTeX RDF
22	Jung Hoon Lee, Xiaolong Ma, Konstantin Likharev	CMOL CrossNets: Possible Neuromorphic Nanoelectronic Circuits.	NIPS	2005	DBLP BibTeX RDF
22	Jeffrey Scott Kline	Silicon Nanoelectronic Devices Fabricated by Ultra-High Vacuum, Scanning Tunneling Microscope Nanolithography		2005	RDF
22	Gianluca Fiori	Simulation of three-dimensional nanoelectronic devices.		2005	RDF
22	Lars-Erik Wernersson, Peter Lindström, André Nauen, Erik Lind	Nanoelectronic pulse generators based on gated resonant tunnelling diodes.	Int. J. Circuit Theory Appl.	2004	DBLP DOI BibTeX RDF
22	Costa Gerousis, Stephen M. Goodnick, Wolfgang Porod	Nanoelectronic single-electron transistor circuits and architectures.	Int. J. Circuit Theory Appl.	2004	DBLP DOI BibTeX RDF
22	Özgür Türel, Jung Hoon Lee, Xiaolong Ma, Konstantin K. Likharev	Neuromorphic architectures for nanoelectronic circuits.	Int. J. Circuit Theory Appl.	2004	DBLP DOI BibTeX RDF
22	Árpád I. Csurgay, Wolfgang Porod	Surface plasmon waves in nanoelectronic circuits.	Int. J. Circuit Theory Appl.	2004	DBLP DOI BibTeX RDF
22	Ioannis Tsimperidis, Ioannis Karafyllidis, Antonios Thanailakis	Design and simulation of a nanoelectronic single-electron universal Control-Control-Not gate.	Microelectron. J.	2004	DBLP DOI BibTeX RDF
22	D. Kafantaris, Ioannis Karafyllidis, Ioannis Andreadis	Implementation of non-linear filters using nanoelectronic single-electron circuitry.	Microelectron. J.	2004	DBLP DOI BibTeX RDF
22	Janaina Gonçalves Guimarães, José Camargo da Costa	Design of a single-electron current source for nanoelectronic devices.	Microelectron. J.	2004	DBLP DOI BibTeX RDF
22	George T. Zardalidis, Ioannis Karafyllidis	Design and simulation of a nanoelectronic single-electron universal Fredkin gate.	IEEE Trans. Circuits Syst. I Regul. Pap.	2004	DBLP DOI BibTeX RDF
22	Özgür Türel, Jung Hoon Lee, Xiaolong Ma, Konstantin Likharev	Architectures for Nanoelectronic Neural Networks: New Results.	ESANN	2004	DBLP BibTeX RDF
22	Michail E. Kiziroglou, Ioannis Karafyllidis	Design and simulation of a nanoelectronic single-electron analog to digital converter.	Microelectron. J.	2003	DBLP DOI BibTeX RDF
22	Özgür Türel, Konstantin Likharev	CrossNets: Neuromorphic Networks for Nanoelectronic Implementation.	ICANN	2003	DBLP DOI BibTeX RDF
22	Luigi G. Occhipinti, Luigi Fortuna	Organic molecules and composites with applications in micro and nanoelectronic systems.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
22	Costa Gerousis, Stephen M. Goodnick, Wolfgang Porod	Toward nanoelectronic cellular neural networks.	Int. J. Circuit Theory Appl.	2000	DBLP DOI BibTeX RDF
22	Werner Prost, Uwe Auer, Franz-Josef Tegude, Christian Pacha, Karl F. Goser, Guido Janssen, T. van der Roer	Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes.	Int. J. Circuit Theory Appl.	2000	DBLP DOI BibTeX RDF
22	Arthur H. M. van Roermund, Jaap Hoekstra	Design philosophy for nanoelectronic systems, from SETs to neural nets.	Int. J. Circuit Theory Appl.	2000	DBLP DOI BibTeX RDF
22	Arthur H. M. van Roermund, Jaap Hoekstra	From nanotechnology to nanoelectronic systems, from SETs to neural nets.	ISCAS	2000	DBLP DOI BibTeX RDF
22	Árpád Csurgay, Wolfgang Porod	Toward nanoelectronic systems integration.	ISCAS	2000	DBLP DOI BibTeX RDF
22	Costa Gerousis, Stephen M. Goodnick, Xiaohui Wang, Wolfgang Porod, Árpád Csurgay, Géza Tóth 0003, Craig S. Lent	Modeling nanoelectronic CNN cells: CMOS, SETs and QCAs.	ISCAS	2000	DBLP DOI BibTeX RDF
22	David B. Janes, Ronald P. Andres, E. H. Chen, J. Dicke, V. R. Kolagunta, Jochen P. Lauterbach, Takhee Lee, Jia Liu, M. R. Melloch, E. L. Peckham, T. Pletcher, Ron Reifenberger, H. J. Ueng, B. L. Walsh, J. M. Woodall, C. P. Kubiak, B. Kasibhatla	Self-Assembly Based Approaches for Metal/Molecule/Semiconductor Nanoelectronic Circuits.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
22	Vwani P. Roychowdhury, David B. Janes, Supriyo Bandyopadhyay	Nanoelectronic architecture for Boolean logic.	Proc. IEEE	1997	DBLP DOI BibTeX RDF
22	David Goldhaber-Gordon, Michael S. Montemerlo, J. Christopher Love, Gregory J. Opiteck, James C. Ellenbogen	Overview of nanoelectronic devices.	Proc. IEEE	1997	DBLP DOI BibTeX RDF
22	Vwani P. Roychowdhury, M. P. Anantram	On Computing With Locally-Interconnected Architectures in Atomic/Nanoelectronic Systems.	ASAP	1997	DBLP DOI BibTeX RDF
22	Lutz J. Micheel, Albert H. Taddiken, Alan C. Seabaugh	Multiple-Valued Logic Computation Circuits Using Micro- and Nanoelectronic Devices.	ISMVL	1993	DBLP DOI BibTeX RDF
16	Shuo Wang, Lei Wang 0003, Faquir C. Jain	Towards achieving reliable and high-performance nanocomputing via dynamic redundancy allocation.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	Nanoscale architecture, hardware reliability, redundancy allocation, performance, redundant design
16	Wenjing Rao, Alex Orailoglu, Ramesh Karri	Logic Mapping in Crossbar-Based Nanoarchitectures.	IEEE Des. Test Comput.	2009	DBLP DOI BibTeX RDF
16	Volkmar Eichhorn, Sergej Fatikow, Tim Wortmann, Christian Stolle, Christoph Edeler, Daniel Jasper, Ozlem Sardan, Peter Bøggild, Guillaume Boetsch, Christophe Canales, Reymond Clavel	NanoLab: A nanorobotic system for automated pick-and-place handling and characterization of CNTs.	ICRA	2009	DBLP DOI BibTeX RDF
16	Joseph Sloan, Rakesh Kumar 0002	Towards scalable reliability frameworks for error prone CMPs.	CASES	2009	DBLP DOI BibTeX RDF	dynamic constitution, in-network fault tolerance
16	Harika Manem, Garrett S. Rose	The effects of logic partitioning in a majority logic based CMOS-NANO FPGA.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	cmos-nano, fpga
16	Ci Lei, Dinesh Pamunuwa, Steven Bailey, Colin Lambert	Application of Molecular Electronics Devices in Digital Circuit Design.	NanoNet	2008	DBLP DOI BibTeX RDF	nanotechnology, circuit simulation, molecular electronics
16	Bao Liu 0001	A Voltage Controlled Nano Addressing Circuit.	NanoNet	2008	DBLP DOI BibTeX RDF	Nano Architecture, Nano Addressing, Nanoelectronics
16	Kevin Ryan, Sansiri Tanachutiwat, Wei Wang 0003	3D CMOL Crossnet for Neuromorphic Network Applications.	NanoNet	2008	DBLP DOI BibTeX RDF	CMOS-Nano Hybrid System, CMOL, Crossnet, Neuromorphic Network, 3D IC
16	Azad Naeemi, James D. Meindl	Physical models for electron transport in graphene nanoribbons and their junctions.	ICCAD	2008	DBLP DOI BibTeX RDF
16	Huifei Rao, Jie Chen 0002, Vicky H. Zhao, Woon Tiong Ang, I-Chyn Wey, An-Yeu Wu	An efficient methodology to evaluate nanoscale circuit fault-tolerance performance based on belief propagation.	ISCAS	2008	DBLP DOI BibTeX RDF
16	Manoj Kumar Goparaju, Ashok Kumar Palaniswamy, Spyros Tragoudas	A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks.	DFT	2008	DBLP DOI BibTeX RDF
16	Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker 0001	On Reducing Circuit Malfunctions Caused by Soft Errors.	DFT	2008	DBLP DOI BibTeX RDF
16	Timothy J. Dysart, Peter M. Kogge	System Reliabilities When Using Triple Modular Redundancy in Quantum-Dot Cellular Automata.	DFT	2008	DBLP DOI BibTeX RDF
16	Mathieu Luisier, Gerhard Klimeck	A multi-level parallel simulation approach to electron transport in nano-scale transistors.	SC	2008	DBLP DOI BibTeX RDF
16	Chen He, Margarida F. Jacome	Defect-Aware High-Level Synthesis Targeted at Reconfigurable Nanofabrics.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
16	D. Dutta Majumder, Christian Ulrichs, Debosmita Majumder, Inga Mewis, Ashoke Ranjan Thakur, R. L. Brahmachary, Rajat Banerjee, Ayesha Rahman, Nitai Debnath, Dipankar Seth, Sumistha Das, Indrani Roy, Amrita Ghosh, Prity Sagar, Carsten Schulz, Nguyen Quang Linh, Arunava Goswami	Current Status and Future Trends of Nanoscale Technology and Its Impact on Modern Computing, Biology, Medicine and Agricultural Biotechnology.	ICCTA	2007	DBLP DOI BibTeX RDF	hydrophobic nanosilica, lipophilic nanosilica, Nanoscience, nanosilica, machine learning, pervasive computing, computational biology, genomics, reversible computing, Agriculture, cancer, HIV, cybernetics, quantum mechanics, consciousness, Alzheimer's disease, neuronal network, biotechnology, metabolomics, malaria
16	Lixin Dong, Xinyong Tao, Li Zhang 0010, Xiaobin Zhang, Bradley J. Nelson	Nanorobotic Spot Welding by Attogram Precision Metal Deposition from Copper-filled Carbon Nanotubes.	ICRA	2007	DBLP DOI BibTeX RDF
16	Sybille Hellebrand, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, Bernd Straube	A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction.	DFT	2007	DBLP DOI BibTeX RDF
16	Wei Wang 0003, Ming Liu, Andrew Hsu	Hybrid Nanoelectronics: Future of Computer Technology.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	fault tolerance, hybrid, circuit, computer systems, nanoelectronics, device, microelectronics
16	Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck, Daniel J. Sorin	NANA: A nano-scale active network architecture.	ACM J. Emerg. Technol. Comput. Syst.	2006	DBLP DOI BibTeX RDF	Accumulator ISA, defect isolation, reverse path forwarding, active network, DNA, defect tolerance, self-assembly, carbon nanotube, nanoelectronics, nanocomputing
16	Ralf Eickhoff, Ulrich Rückert 0001	Enhancing Fault Tolerance of Radial Basis Functions.	IJCNN	2006	DBLP DOI BibTeX RDF
16	Ruojie Sha, Xiaoping Zhang, Shiping Liao, Pamela E. Constantinou, Baoquan Ding, Tong Wang, Alejandra V. Garibotti, Hong Zhong, Lisa B. Israel, Xing Wang, Gang Wu, Banani Chakraborty, Junghuei Chen, Yuwen Zhang, Hao Yan, Zhiyong Shen, Wanqiu Shen, Phiset Sa-Ardyen, Jens Kopatsch, Jiwen Zheng, Philip S. Lukeman, William B. Sherman, Chengde Mao, Natasa Jonoska, Nadrian C. Seeman	Structural DNA Nanotechnology: Molecular Construction and Computation.	UC	2005	DBLP DOI BibTeX RDF	Unusual DNA Motifs, Bottom-Up Nanoscale Construction, Nanoscale DNA Objects, Nanorobotics, Nanoscale Pattern Design, DNA Sequence Design
16	Ralf Eickhoff, Ulrich Rückert 0001	Tolerance of Radial Basis Functions Against Stuck-At-Faults.	ICANN (2)	2005	DBLP DOI BibTeX RDF
16	Olivier Duval, L.-P. Lafrance, Yvon Savaria, Patrick Desjardins	An Integrated Test Platform for Nanostructure Electrical Characterization.	ICMENS	2004	DBLP DOI BibTeX RDF
16	Arvind Kumar, Sandip Tiwari	Testing and Defect Tolerance: A Rent's Rule Based Analysis and Implications on Nanoelectronics.	DFT	2004	DBLP DOI BibTeX RDF
16	Wenjing Rao, Alex Orailoglu, Ramesh Karri	Fault Tolerant Arithmetic with Applications in Nanotechnology based Systems.	ITC	2004	DBLP DOI BibTeX RDF
16	Margarida F. Jacome, Chen He, Gustavo de Veciana, Stephen Bijansky	Defect tolerant probabilistic design paradigm for nanotechnologies.	DAC	2004	DBLP DOI BibTeX RDF	probabilistic design, nanotechnologies, defect tolerance
16	Michael Nicolaidis, Nadir Achouri, Lorena Anghel	Memory Built-In Self-Repair for Nanotechnologies.	IOLTS	2003	DBLP DOI BibTeX RDF
16	Matthew M. Ziegler, Mircea R. Stan	A Case for CMOS/nano co-design.	ICCAD	2002	DBLP DOI BibTeX RDF
16	Koray Karahaliloglu, Sina Balkir	Image processing with quantum dot nanostructures.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
16	Victor V. Zhirnov, Daniel J. C. Herr	New Frontiers: Self-Assembly and Nanoelectronics.	Computer	2001	DBLP DOI BibTeX RDF
16	Martin Hänggi, Leon O. Chua	Compact bistable CNNs based on resonant tunneling diodes.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
16	Eelco Rouw, Jaap Hoekstra, Arthur H. M. van Roermund	Spike correlation based learning for unsupervised neural lattice structures.	ISCAS (3)	2001	DBLP DOI BibTeX RDF
16	Roelof H. Klunder, Jaap Hoekstra	Energy conservation in a circuit with single electron tunnel junctions.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
16	David Crawley	A Multilevel Cache Memory Architecture for Nanoelectronics.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF