Search results for "Capacitance"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
15	Seung-Ho Jung, Jong-Humn Baek, Seok-Yoon Kim	Short circuit power estimation of static CMOS circuits.	ASP-DAC	2001	DBLP DOI BibTeX RDF
15	Nikos Haralabidis, Dimitris Loukas	A versatile CMOS low-noise analog front-end stage for solid state detector interfaces.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
15	Håkan Bengtson, Christer Svensson	3V CMOS 0.35 µ transimpedance receiver for optical applications.	ISCAS (4)	2001	DBLP DOI BibTeX RDF
15	Paul Kartschoke, Shervin Hojat	Techniques that Improved the Timing Convergence of the Gekko PowerPC Microprocessor.	ISQED	2001	DBLP DOI BibTeX RDF
15	Matthias Ringe, Thomas Lindenkreuz, Erich Barke	Static Timing Analysis Taking Crosstalk into Account.	DATE	2000	DBLP DOI BibTeX RDF
15	Shervin Hojat, Paul Kartschoke	Techniques for Improving Timing Convergence of Advanced Microprocessors.	EUROMICRO	2000	DBLP DOI BibTeX RDF
15	Kevin T. Tang, Eby G. Friedman	Noise estimation due to signal activity for capacitively coupled CMOS logic gates.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF
15	Azeez J. Bhavnagarwala, Blanca Austin, Ashok Kapoor, James D. Meindl	CMOS system-on-a-chip voltage scaling beyond 50nm.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF
15	Hung-Jung Chen, Bradley S. Carlson	Power estimation for a submicron CMOS inverter driving a CRC interconnect load.	ACM Great Lakes Symposium on VLSI	2000	DBLP DOI BibTeX RDF
15	N. S. Nagaraj, Frank Cano, Duane Young, Deepak Vohra, Manoj Das	A Practical Approach to Crosstalk Noise Verification of Static CMOS Designs.	VLSI Design	2000	DBLP DOI BibTeX RDF
15	Ravishankar Arunachalam, Karthik Rajagopal, Lawrence T. Pileggi	TACO: timing analysis with coupling.	DAC	2000	DBLP DOI BibTeX RDF
15	Sumant Ramprasad, Naresh R. Shanbhag, Ibrahim N. Hajj	A coding framework for low-power address and data busses.	IEEE Trans. Very Large Scale Integr. Syst.	1999	DBLP DOI BibTeX RDF
15	Atul Garg, Y. L. Le Coz, Hans J. Greub, R. B. Iverson, Robert F. Philhower, Pete M. Campbell, Cliff A. Maier, Sam A. Steidl, Matthew W. Ernest, Russell P. Kraft, Steven R. Carlough, J. W. Perry, Thomas W. Krawczyk Jr., John F. McDonald 0001	Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
15	Youxin Gao, Martin D. F. Wong	Optimal shape function for a bidirectional wire under Elmore delay model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
15	Charles J. Alpert, Anirudh Devgan, Stephen T. Quay	Buffer insertion for noise and delay optimization.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
15	Martin Margala	Low-Power SRAM Circuit Design.	MTDT	1999	DBLP DOI BibTeX RDF	design, VLSI, low-power, SRAM, low-voltage
15	Michael W. Beattie, Lawrence T. Pileggi	Electromagnetic parasitic extraction via a multipole method with hierarchical refinement.	ICCAD	1999	DBLP DOI BibTeX RDF
15	Martin Kuhlmann, Sachin S. Sapatnekar, Keshab K. Parhi	Efficient Crosstalk Estimation.	ICCD	1999	DBLP DOI BibTeX RDF
15	Ahmet T. Erdogan, Tughrul Arslan	A coefficient segmentation algorithm for low power implementation of FIR filters.	ISCAS (3)	1999	DBLP DOI BibTeX RDF
15	Fenghao Mu, Christer Svensson	Methodology of layout based schematic and its usage in efficient high performance CMOS design.	ISCAS (6)	1999	DBLP DOI BibTeX RDF
15	Antonio Petraglia, Jacqueline S. Pereira	Switched-capacitor decimation filters with direct form polyphase structure having very small sensitivity characteristics.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
15	Chulwoo Kim, Seung-Moon Yoo, Sung-Mo Kang	NMOS Energy Recovery Logic.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF
15	Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh	Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization.	VLSI Design	1999	DBLP DOI BibTeX RDF
15	Rui Escadas Martins, Wolfgang Pyka, Rainer Sabelka, Siegfried Selberherr	High-precision interconnect analysis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
15	S. Turgis, Daniel Auvergne	A novel macromodel for power estimation in CMOS structures.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1998	DBLP DOI BibTeX RDF
15	Labros Bisdounis, Odysseas G. Koufopavlou, Constantinos E. Goutis, Spiridon Nikolaidis 0001	Switching Response Modeling of the CMOS Inverter for Sub-micron Devices.	DATE	1998	DBLP DOI BibTeX RDF	CMOS circuits timing analysis, Propagation delay modeling, Sub-micron devices
15	Atila Alvandpour, Per Larsson-Edefors, Christer Svensson	Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits.	ISLPED	1998	DBLP DOI BibTeX RDF	short-circuit current, power consumption, power estimation
15	Fenghao Mu, Christer Svensson	Efficient High-Speed CMOS Design by Layout Based Schematic Method.	EUROMICRO	1998	DBLP DOI BibTeX RDF
15	Sadiq M. Sait, Habib Youssef, Munir M. Zahra	Tabu Search Based Circuit Optimization.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	CMOS/BiCMOS, Mixed Technologies, Tabu Search, Search Algorithms, Critical Path, False Path, Circuit Optimization
15	Rajesh S. Parthasarathy, Ramalingam Sridhar	Double Pass Transistor Logic for High Performance Wave Pipeline Circuits.	VLSI Design	1998	DBLP DOI BibTeX RDF
15	Gustavo E. Téllez, Majid Sarrafzadeh	Minimal buffer insertion in clock trees with skew and slew rate constraints.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
15	Youxin Gao, D. F. Wong 0001	Optimal shape function for a bi-directional wire under Elmore delay model.	ICCAD	1997	DBLP DOI BibTeX RDF	Bi-directional wire, Optimal shape, Elmore Delay
15	Mahadevamurty Nemani, Farid N. Najm	High-level area and power estimation for VLSI circuits.	ICCAD	1997	DBLP DOI BibTeX RDF	VLSI, CAD, Boolean function, power, estimation, area, high-level
15	Christian Dufaza, Hassan Ihs	Test Synthesis for DC Test and Maximal Diagnosis of Switched-Capacitor Circuits.	VTS	1997	DBLP DOI BibTeX RDF
15	A. Dharchoudhuri, S. M. Kang	Analytical Fast Timing Simulation of MOS Circuits Driving RC Interconnects.	VLSI Design	1997	DBLP DOI BibTeX RDF
15	Lakshmikant Bhupathi, Liang-Fang Chao	Dichotomy-based Model for FSM Power Minimization.	ICCD	1996	DBLP DOI BibTeX RDF
15	Huzefa Mehta, Robert Michael Owens, Mary Jane Irwin	Some Issues in Gray Code Addressing.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF
15	Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen	A cell-based power estimation in CMOS combinational circuits.	ICCAD	1994	DBLP DOI BibTeX RDF
15	Sepuan Yu, A. F. Franz, T. G. Mihran	A physical parametric transistor model for CMOS circuit simulation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
15	Bing J. Sheu, Wen-Jay Hsu, P. K. Ko	An MOS transistor charge model for VLSI design.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1988	DBLP DOI BibTeX RDF
13	Yi Lu, Bo Zhou 0014, Yijun Zhang, Qingyun Chang	Doubly Salient Electromagnetic Motor-Drive System With Small DC-Link Capacitance.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Jiaxun Teng, Xiaofeng Sun, Min Zhang 0031, Wei Zhao, Xin Li 0033	Low-Capacitance CHB-Based SST Based on Resonant Push-Pull Decoupling Channel.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Changsong Cai, Junhua Wang, Maryam Saeedifard, Pengcheng Zhang, Ruixuan Chen, Jin Zhang	Gyrator-Gain Variable WPT Topology for MC-Unconstrained CC Output Customization Using Simplified Capacitance Tuning.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Rongrong Zhang, Shuo Wang 0003, Teng Long, Jian Qiu, Kefu Liu, Hui Zhao 0004	The Magnetized Capacitance, First Resonant Frequency, and Electromagnetic Analysis of Inductors With Ferrite Cores.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Ripun Phukan, Shin-Yu Chen, Rolando Burgos	A Systematic Methodology for Parasitic Capacitance Estimation and Validation of Multichip Modules.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Lihua Liu, Zhen Ke, Jiankai Li, Xiaojun Liu, Guangyou Fang	Turn-Off Current and TEM Field Based on Distributed Capacitance Model of Multiple Coils in Helicopter Transient Electromagnetic System.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Yanan Liu, Xinke Wu, Siliang Zhang	A Simple Input Filter Capacitance (IFC) Current Compensation Scheme for CRM Totem-Pole PFC With Si MOSFETs at 800 Hz Line Frequency.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Qian Xiao, Huai Wang, Yu Jin, Hongjie Jia, Yunfei Mu, Jiebei Zhu, Remus Teodorescu, Frede Blaabjerg	Submodule Capacitance Monitoring Approach for the MMC With Asymptotically Converged Error.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Yun Zhang 0003, Jiali Shan, Tianbao Song, Zhen Huang 0004, Xinshan Zhu	Back Propagation Artificial Neural Network Based DC Bus Capacitance Identification Method in Three-Phase PWM Rectifier for Charging System of EVs.	IEEE Trans. Ind. Electron.	2024	DBLP DOI BibTeX RDF
13	Yoontae Jung, Sein Oh, Sohmyung Ha, Minkyu Je	A 187-dB FoMS Power-Efficient Second-Order Highpass ΔΣ Capacitance-to-Digital Converter.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
13	Jongho Kim, Gyuchan Cho, Jintae Kim	A 7 GHz ERBW 1.1 GS/s 6-bit PVT Tolerant Asynchronous Charge-Injection SAR With Only 8.5 fF Input Capacitance in 28 nm CMOS.	IEEE J. Solid State Circuits	2024	DBLP DOI BibTeX RDF
13	Jae-Sub Ko, Cheol Woong Choi, Woongkul Lee, Dae-Kyong Kim	Novel Phase Shift Angle Compensation Method of DAB Converter Considering Parasitic Capacitance of SiC MOSFET.	IEEE Access	2024	DBLP DOI BibTeX RDF
13	Xian Liao, Zhengyu Xu, Wei Liu, Xuquan Hu, Jie Zhou, Zhihong Fu	Influence of Parasitic Capacitance on Turn-Off Current and Its Optimization Method for Transient Electromagnetic System.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
13	Yiqi Jin, Yi Li 0032, Maomao Zhang, Lihui Peng	A Physics-Constrained Deep Learning-Based Image Reconstruction for Electrical Capacitance Tomography.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
13	Yidan Yang, Guoqiang Liu, Jing Liu	A Permittivity Imaging Method: Electrical Capacitance Tomography Based on Electromagnetic Momentum.	IEEE Trans. Instrum. Meas.	2024	DBLP DOI BibTeX RDF
13	Fujihiko Matsumoto, Hinano Ohtsu	Consideration of Integrated Low-Frequency Low-Pass Notch Filter Employing CCII Based Capacitance Multipliers.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2024	DBLP DOI BibTeX RDF
13	Víctor M. Milián Sánchez, Miguel Enrique Iglesias Martínez, Jose Guerra Carmenate, Juan Carlos Castro-Palacio, Eduardo Balvis Outeiriño, Pedro Fernández de Córdoba, Francisco Misael Muñoz-Pérez, Juan A. Monsoriu, Sarira Sahu	Spectral Analysis of Anomalous Capacitance Measurements in Interleaving Structures: Study of Frequency Distribution in Photomultipliers.	Symmetry	2024	DBLP DOI BibTeX RDF
13	Bhawna Tiwari, Suyash Shrivastava, Pydi Ganga Bahubalindruni	Smart Digital Capacitance Sensing System Using IGZO TFTs on Flexible Substrate.	IEEE Trans. Circuits Syst. II Express Briefs	2024	DBLP DOI BibTeX RDF
13	Jing Lei 0002, Qibin Liu	Fractional Optimization With the Learnable Prior for Electrical Capacitance Tomography.	IEEE Trans. Computational Imaging	2024	DBLP DOI BibTeX RDF
13	Lihao Liu, Fan Yang 0001, Li Shang, Xuan Zeng 0001	GNN-Cap: Chip-Scale Interconnect Capacitance Extraction Using Graph Neural Network.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2024	DBLP DOI BibTeX RDF
13	Frank Male	Pywaterflood: Well connectivity analysis through capacitance-resistance modeling.	J. Open Source Softw.	2024	DBLP DOI BibTeX RDF
13	Snehlata Yadav, Sonam Rewari, Rajeshwari Pandey	Physics-based analytical model for trap assisted biosensing in dual cavity negative capacitance junctionless accumulation mode FET.	Microelectron. J.	2024	DBLP DOI BibTeX RDF
13	Nadim Ahmed, Gourab Dutta	Extraction of device parameters from capacitance-voltage characteristics of p-GaN/AlGaN/GaN HEMT.	Microelectron. J.	2024	DBLP DOI BibTeX RDF
13	Chirantan Das	Development Of Impedance and Capacitance based Sensors for the Estimation of Adulterant Ingredients in Different Bio-Consumables.	CoRR	2024	DBLP DOI BibTeX RDF
13	Matthew A. Charleston, Shah M. Chowdhury, Qussai M. Marashdeh, Benjamin J. Straiton, Fernando L. Teixeira	Microgravity Mass Gauging with Capacitance Sensing: Sensor Design and Experiment.	CoRR	2024	DBLP DOI BibTeX RDF
13	Zhoujie Wu, Cai Luo, Zhong Guan	A Dynamic Capacitance Matching (DCM)-based Current Response Algorithm for Signal Line RC Network.	CoRR	2024	DBLP DOI BibTeX RDF
13	Federico Lombardo, Federico Pittino, Daniele Goldoni, Luca Selmi	Machine learning and data augmentation methods for multispectral capacitance images of nanoparticles with nanoelectrodes array biosensors.	Eng. Appl. Artif. Intell.	2024	DBLP DOI BibTeX RDF
13	Menghan Song, Tamio Ikehashi	A Capacitance Varying Charge Pump with Exponential Stage-Number Dependence and Its Implementation by MEMS Technology.	IEICE Trans. Electron.	2024	DBLP DOI BibTeX RDF
13		Retraction Note: Capacitance pin defect detection based on deep learning.	J. Comb. Optim.	2024	DBLP DOI BibTeX RDF
13	Giseok Kim, Jaehyun Park, Seong-Ook Jung	Post-Layout Parasitic Capacitance Prediction Methodology Using Bayesian Optimization.	ICEIC	2024	DBLP DOI BibTeX RDF
13	Guido Di Patrizio Stanchieri, Andrea De Marcellis, Marco Faccio, Elia Palange, Michele Gabrio Antonelli, Pierluigi Beomonte Zobel	A Current-Mode Analog-Front-End for Capacitance-to-Voltage Conversion of Length Transducers in Pneumatic Artificial Muscles.	LASCAS	2024	DBLP DOI BibTeX RDF
13	Junmin Lee, Juwon Ham, Hamin Lee, Wooseok Jang, Hyeongjoon Kim, Byungcheol So, Seunghoon Ko	A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR Scan.	ISSCC	2024	DBLP DOI BibTeX RDF
13	Yangho Seo, Jihee Choi, Sunki Cho, Hyunwook Han, Wonjong Kim, Gyeongha Ryu, Jungil Ahn, Younga Cho, Sungphil Choi, Seohee Lee, Wooju Lee, Chaehyuk Lee, Kiup Kim, Seongseop Lee, Sangbeom Park, Minjun Choi, Sungwoo Lee, Mino Kim, Taekyun Shin, Hyeongsoo Jeong, Hyunseung Kim, Houk Song, Yunsuk Hong, Seokju Yoon, Giwook Park, Hokeun You, Changkyu Choi, Hae-Kang Jung, Joohwan Cho, Jonghwan Kim	13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance Reduction.	ISSCC	2024	DBLP DOI BibTeX RDF
13	Jun-Gi Lee, Hong-Hyun Bae, Seunghyun Jang, Hyun-Sik Kim	28.1 A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving -28dB Worst-Case Power-Supply Rejection Across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip Capacitance.	ISSCC	2024	DBLP DOI BibTeX RDF
13	Junyeol An, Seung Hun Choi, Si-Woo Kim, Jae-Youl Lee, Hyung-Min Lee, Yoon-Kyung Choi	26.3 Noise Immunity in Capacitive Sensing: Single-Ended AFE Design with Common-Current Subtraction for Mutual- and Self-Capacitance Sensing in 390pF Load.	ISSCC	2024	DBLP DOI BibTeX RDF
13	Naoharu Sawada, Takumi Yamamoto, Yuta Sugiura	Converting Tatamis into Touch Sensors by Measuring Capacitance.	SII	2024	DBLP DOI BibTeX RDF
13	Jing Lei 0002, Xueyao Wang	Transfer learning-driven inversion method for the imaging problem in electrical capacitance tomography.	Expert Syst. Appl.	2023	DBLP DOI BibTeX RDF
13	Yudi Xiao, Martijn Duraij, Zhe Zhang 0002, Tiberiu-Gabriel Zsurzsan, Michael A. E. Andersen	ZVS Design in Full-SiC Three-Level Neutral-Point-Clamped DC-DC Converter Considering Quasi-Linear Output Capacitance $C_{oss}$.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Yao Wang, Shuyan Zhao, Hua Zhang 0022, Chong Zhu, Ying Mei, Ningfei Jiao, Fei Lu 0001	Compact Z-Impedance Compensation for Inductive Power Transfer and its Capacitance Tuning Method.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Tuofei Chen, Lei Gu, William J. Dally, Juan Rivas-Davila, John D. Fox	A Novel High-Efficiency Three-Phase Multilevel PV Inverter With Reduced DC-Link Capacitance.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Sakda Somkun, Suparak Srita, Tanakorn Kaewchum, Akekachai Pannawan, Chayakarn Saeseiw, Piyadanai Pachanapan	Adaptive Notch Filters for Bus Voltage Control and Capacitance Degradation Prognostic of Single-Phase Grid-Connected Inverter.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Xun Wu, Kaidi Li, Tianjian Yu, Shu Cheng, Yunkai Huang, Yusong Hu, Chunyang Chen	A Capacitance Estimation Method for DC-Link Capacitors Based on Pre-Charging Model and Noise Evaluation.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Zhaoyang Zhao, Pooya Davari, Weiguo Lu, Frede Blaabjerg	Online DC-Link Capacitance Monitoring for Digital-Controlled Boost PFC Converters Without Additional Sampling Devices.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Junya Huo, Nannan Zhao, Runfeng Gao, Guoqiang Zhang, Gaolin Wang, Dianguo Xu 0001	Analysis and Compensation of Position Estimation Error for Sensorless Reduced DC-Link Capacitance IPMSM Drives.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Zhengxuan Li, Lifeng Gou, Qiang Song 0002, Bojin Tang, Biao Zhao, Leiyan Han, Kailun Wang	Reduction in Submodule Capacitance in FB- and HYB-MMCs With Variable DC Voltages.	IEEE Trans. Ind. Electron.	2023	DBLP DOI BibTeX RDF
13	Sujin Park, Hyungil Chae, SeongHwan Cho	A 3.68 aFrms Resolution Continuous-Time Bandpass Δ Σ Capacitance-to-Digital Converter for Full-CMOS Sensors in 0.18 μm CMOS.	IEEE J. Solid State Circuits	2023	DBLP DOI BibTeX RDF
13	Ravikumar Selvam, Akhilesh Tyagi	A Side-Channel Evaluation of On-chip Vdd Distribution Network with Decoupling Capacitance.	SN Comput. Sci.	2023	DBLP DOI BibTeX RDF
13	Shelja Kaushal, Ashwani K. Rana	Reliable and low power Negative Capacitance Junctionless FinFET based 6T SRAM cell.	Integr.	2023	DBLP DOI BibTeX RDF
13	Jiahong Zhang, Zhuo Wang, Chao Ma	A CMOS transimpedance amplifier with broad-band and high gain based on negative Miller capacitance.	Integr.	2023	DBLP DOI BibTeX RDF
13	Yanhan Zeng, Qianhui Ge, Xin Zhang, Yuting Zhang, Meiling Chen, Yongfu Li	A CAFVF-based output-capacitor-less LDO with PSRR improvement by feed forward and negative capacitance.	Integr.	2023	DBLP DOI BibTeX RDF
13	Yang Zhang 0063, Sicheng Li, Xu Zhang, Chenhui Liu, Ziying Liu, Bing Luo	A Hybrid Low Capacitance Modular Multilevel Converter for Medium Voltage PMSM Drive and Its Control Method.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Laixiang Qin, Chunlai Li, Yiqun Wei, Guoqing Hu, Jingbiao Chen, Yi Li, Caixia Du, Zhangwei Xu, Xiumei Wang, Jin He 0003	Recent Developments in Negative Capacitance Gate-All-Around Field Effect Transistors: A Review.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Yujie Lan, Lei Yang, Xu Zhang, Qingbin Chen, Zaiping Zheng	Calculation Model of Parasitic Capacitance for High-Frequency Inductors and Transformers.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Rahmad B. Y. Syah, Aryan Veisi, Zainal Arifin Hasibuan, Mustafa A. Al-Fayoumi, Mohammad Sh. Daoud, Ehsan Eftekhari-Zadeh	A Novel Smart Optimized Capacitance-Based Sensor for Annular Two-Phase Flow Metering With High Sensitivity.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Nima Shahpari, Mehdi Habibi, Piero Malcovati, José M. de la Rosa 0001	A 12-Bit Low-Input Capacitance SAR ADC With a Rail-to-Rail Comparator.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Su-Seong Park, Myeong-Seok Jeon, Sung-Soo Min, Rae-Young Kim	High-Frequency Planar Transformer Based on Interleaved Serpentine Winding Method With Low Parasitic Capacitance for High-Current Input LLC Resonant Converter.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Ahmed Abuelnaga, Zhituo Ni, Sarah Badawi, Mehdi Narimani, Navid Reza Zargari	A New Approach to Reduce DC-Bus Capacitance in Regenerative CHB Motor Drives.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Mustafa A. Al-Fayoumi, Hani Mahmoud Al-Mimi, Aryan Veisi, Hussain Al-Aqrabi, Mohammad Sh. Daoud, Ehsan Eftekhari-Zadeh	Utilizing Artificial Neural Networks and Combined Capacitance-Based Sensors to Predict Void Fraction in Two-Phase Annular Fluids Regardless of Liquid Phase Type.	IEEE Access	2023	DBLP DOI BibTeX RDF
13	Yu Tian, Zhang Cao, Lijun Xu 0001, Wuqiang Yang	A PIλDμ-Controlled Calderon's Method for Triple-Valued Electrical Capacitance Tomography.	IEEE Trans. Instrum. Meas.	2023	DBLP DOI BibTeX RDF
13	Almazbek Imanaliev, Olivier Thévenot, Kamel Dougdag, François Piquemal	Measuring Nonlinearity in AH 2700A Capacitance Bridges With Sub-ppm Level Uncertainty.	IEEE Trans. Instrum. Meas.	2023	DBLP DOI BibTeX RDF