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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 417 publication records. Showing 417 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yee-Wing Hsieh, Steven P. Levitan |
Abstraction techniques for verification of multiple tightly coupled counters, registers and comparators.  |
HLDVT  |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Christophe Paoli, Marie-Laure Nivet, Jean François Santucci |
Use of constraint solving in order to generate test vectors for behavioral validation. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael D. Jones, Ganesh Gopalakrishnan |
Toward automated abstraction for protocols on branching networks. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Beardo, Francesco Bruschi, Fabrizio Ferrandi, Donatella Sciuto |
An approach to functional testing of VLIW architectures. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Bart Vermeulen, Gert-Jan van Rootselaar |
Silicon debug of a co-processor array for video applications. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
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| 1 | |
Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, Berkeley, California, USA, November 8-10, 2000 |
HLDVT |
2000 |
DBLP BibTeX RDF |
|
| 1 | Stefan Koerner |
Code simulation concept for S/390 processors using an emulation system. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Dominique Federici, Paul Bisgambiglia, Jean François Santucci |
High level fault simulation: experiments and results on ITC'99 benchmarks. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Hoon Choi, Byeong-Whee Yun, Yun-Tae Lee |
Simulation strategy after model checking: experience in industrial SOC design. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Anneliese von Mayrhauser, Tom Chen 0001, Jan Kok, Chuck Anderson 0001, Anita Read, Amjad Hajjar |
On choosing test criteria for behavioral level hardware design verification. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Karen A. Tomko, Anurag Tiwari |
Hardware/software co-debugging for reconfigurable computing. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | M. S. Jahanpour, Eduard Cerny |
Compositional verification of an ATM switch module using interface recognizer/suppliers (IRS). |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroyuki Tomiyama, Taisei Yoshino, Nikil D. Dutt |
Verification of in-order execution in pipelined processors. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivekananda M. Vedula, Jacob A. Abraham |
A novel methodology for hierarchical test generation using functional constraint composition. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Fabian Wolf, Rolf Ernst |
Data flow based cache prediction using local simulation. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Marcello Lajolo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante, Luciano Lavagno |
Behavioral-level test vector generation for system-on-chip designs. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajesh Radhakrishnan, Elena Teica, Ranga Vemuri |
An approach to high-level synthesis system validation using formally verified transformations. |
HLDVT |
2000 |
DBLP DOI BibTeX RDF |
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Displaying result #401 - #417 of 417 (100 per page; Change: ) Pages: [ <<][ 1][ 2][ 3][ 4][ 5] |
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