Search results for "IOLTS"

Hits ?▲	Authors	Title	Venue	Year	Link
1		22nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016, Sant Feliu de Guixols, Spain, July 4-6, 2016	IOLTS	2016	DBLP BibTeX RDF
1	Zeinab Mahdavi, Zahra Shirmohammadi, Seyed Ghassem Miremadi	ACM: Accurate crosstalk modeling to predict channel delay in Network-on-Chips.	IOLTS	2016	DBLP DOI BibTeX RDF
1	Patryk Skoncej, Felix Mühlbauer, Felix Kubicek, Lukas Schröder, Mario Schölzel	Feasibility of software-based repair for program memories.	IOLTS	2016	DBLP DOI BibTeX RDF
1	Jaime Espinosa, Carles Hernández 0001, Jaume Abella 0001	Modeling RTL fault models behavior to increase the confidence on TSIM-based fault injection.	IOLTS	2016	DBLP DOI BibTeX RDF
1	Erol Koser, Walter Stechele	Tackling long duration transients in sequential logic.	IOLTS	2016	DBLP DOI BibTeX RDF
1	Ghislain Takam Tchendjou, Rshdee Alhakim, Emmanuel Simeu, Fritz Lebowsky	Evaluation of machine learning algorithms for image quality assessment.	IOLTS	2016	DBLP DOI BibTeX RDF
1	Chiara Sandionigi, Olivier Héron	Identifying aging-aware representative paths in processors.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Amr Haggag, Nik Sumikawa, Aamer Shaukat	Reliability/yield trade-off in mitigating "no trouble found" field returns.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Daniele Rossi 0001, Vasileios Tenentes, S. Saqib Khursheed, Bashir M. Al-Hashimi	BTI and leakage aware dynamic voltage scaling for reliable low power cache memories.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Jing Ye 0001, Yu Hu 0001, Xiaowei Li 0001	OPUF: Obfuscation logic based physical unclonable function.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Adrian Evans, Enrico Costenaro, Arkady Bramnik	Flip-flop SEU reduction through minimization of the temporal vulnerability factor (TVF).	IOLTS	2015	DBLP DOI BibTeX RDF
1	Zissis Poulos, Andreas G. Veneris	Mining simulation metrics for failure triage in regression testing.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Anzhela Yu. Matrosova, Eugeniy Mitrofanov, Toral Shah	Simplification of fully delay testable combinational circuits.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Ijeoma Anarado, Yiannis Andreopoulos	Mitigation of fail-stop failures in integer matrix products via numerical packing.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Miho Ueno, Masanori Hashimoto, Takao Onoye	Real-time on-chip supply voltage sensor and its application to trace-based timing error localization.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Jaime Espinosa, Carles Hernández 0001, Jaume Abella 0001	Characterizing fault propagation in safety-critical processor designs.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Alessandro Vallero, Alessandro Savino, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Gianfranco Politano, Dimitris Gizopoulos, Stefano Di Carlo	Bayesian network early reliability evaluation analysis for both permanent and transient faults.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Gontran Sion, Yves Blaquière, Yvon Savaria	Defect diagnosis algorithms for a field programmable interconnect network embedded in a Very Large Area Integrated Circuit.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Joseph Lenox, Spyros Tragoudas	Towards Trojan circuit detection with maximum state transition exploration.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Anis Souari, Claude Thibeault, Yves Blaquière, Raoul Velazco	Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Andreina Zambrano, Hans G. Kerkhoff	Fault-tolerant system for catastrophic faults in AMR sensors.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Mehdi Baradaran Tahoori, Abhijit Chatterjee, Krishnendu Chakrabarty, Abhishek Koneru, Arunkumar Vijayan, Debashis Banerjee	Self-awareness and self-learning for resiliency in real-time systems.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Nikolaos Eftaxiopoulos-Sarris, Nicholas Axelos, Kiamal Z. Pekmestzi	Low leakage radiation tolerant CAM/TCAM cell.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Diane Tchuani Tchakonte, Emmanuel Simeu, Maurice Tchuenté	Adaptive healing procedure for lifetime improvement in Wireless Sensor Networks.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Yuta Kimi, Go Matsukawa, Shuhei Yoshida, Shintaro Izumi, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto	An accurate soft error propagation analysis technique considering temporal masking disablement.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Clement Champeix, Nicolas Borrel, Jean-Max Dutertre, Bruno Robisson, Mathieu Lisart, Alexandre Sarafianos	Experimental validation of a Bulk Built-In Current Sensor for detecting laser-induced currents.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Katerina Katsarou, Yiorgos Tsiatouhas	Soft error immune latch under SEU related double-node charge collection.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Marc Lacruche, Nicolas Borrel, Clement Champeix, Cyril Roscian, Alexandre Sarafianos, Jean-Baptiste Rigaud, Jean-Max Dutertre, Edith Kussener	Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Lake Bu, Mark G. Karpovsky, Zhen Wang 0001	New byte error correcting codes with simple decoding for reliable cache design.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Gurgen Harutunyan, Yervant Zorian	An effective embedded test & diagnosis solution for external memories.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Serhiy Avramenko, Stefano Esposito, Massimo Violante, Marco Sozzi, Massimo Traversone, Marco Binello, Marco Terrone	An Hybrid Architecture for consolidating mixed criticality applications on multicore systems.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Alexandros Panteloukas, Anastasios Psarras, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos	Timing-resilient Network-on-Chip architectures.	IOLTS	2015	DBLP DOI BibTeX RDF
1		21st IEEE International On-Line Testing Symposium, IOLTS 2015, Halkidiki, Greece, July 6-8, 2015	IOLTS	2015	DBLP BibTeX RDF
1	Monir Zaman, Ali Ahmadi, Yiorgos Makris	Workload characterization and prediction: A pathway to reliable multi-core systems.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Chang Liu 0010, Michael A. Kochte, Hans-Joachim Wunderlich	Efficient observation point selection for aging monitoring.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Tong-Yu Hsieh, Yi-Han Peng	Filtering-based error-tolerability evaluation of image processing circuits.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard 0001, Matteo Sonza Reorda	Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich	Efficient on-line fault-tolerance for the preconditioned conjugate gradient method.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu	Power analysis attacks on ARX: An application to Salsa20.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Riccardo Cantoro, Matteo Sonza Reorda, Alireza Rohani, Hans G. Kerkhoff	On the maximization of the sustained switching activity in a processor.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Nektarios Kranitis, Antonis Tsigkanos, George Theodorou, Ioannis Sideris, Antonis M. Paschalis	A single chip dependable and adaptable payload Data Processing Unit.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Jacob A. Abraham, Ravishankar K. Iyer, Dimitris Gizopoulos, Dan Alexandrescu, Yervant Zorian	The future of fault tolerant computing.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Suvadeep Banerjee, Md Imran Momtaz, Abhijit Chatterjee	Concurrent error detection in nonlinear digital filters using checksum linearization and residue prediction.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Dan Alexandrescu, Adrian Evans, Enrico Costenaro, Maximilien Glorieux	A call for cross-layer and cross-domain reliability analysis and management.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Vasileios Gerakis, Leonidas Katselas, Alkis A. Hatzopoulos	Fault modeling and testing of through silicon via interconnections.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Amir Charif, Nacer-Eddine Zergainoh, Michael Nicolaidis	MUGEN: A high-performance fault-tolerant routing algorithm for unreliable Networks-on-Chip.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Panagiota Papavramidou, Michael Nicolaidis	Low-power memory repair for high defect densities.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael	Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria	Efficient multilevel formal analysis and estimation of design vulnerability to Single Event Transients.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Mohammad Ashraful Anam, Yiannis Andreopoulos	Failure mitigation in linear, sesquilinear and bijective operations on integer data streams via numerical entanglement.	IOLTS	2015	DBLP DOI BibTeX RDF
1	Dan Alexandrescu, Nematollah Bidokhti, Andy Yu, Adrian Evans, Enrico Costenaro	Managing SER costs of complex systems through Linear Programming.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Kim Petersén, Dimitar Nikolov, Urban Ingelsson, Gunnar Carlsson, Farrokh Ghani Zadegan, Erik Larsson	Fault injection and fault handling: An MPSoC demonstrator using IEEE P1687.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero	A novel methodology to increase fault tolerance in autonomous FPGA-based systems.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Tiago A. O. Alves, Sandip Kundu, Leandro A. J. Marzulo, Felipe Maia Galvão França	Online error detection and recovery in dataflow execution.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena	A new solution to on-line detection of Control Flow Errors.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Samuel N. Pagliarini, Dhiraj K. Pradhan	A placement strategy for reducing the effects of multiple faults in digital circuits.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Christian Badack, Thomas Kern, Michael Gössel	Modified DEC BCH codes for parallel correction of 3-bit errors comprising a pair of adjacent errors.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Antonio Sanchez-Clemente, Luis Entrena, Mario García-Valderas	Error masking with approximate logic circuits using dynamic probability estimations.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Vanessa Vargas, Pablo Ramos, Wassim Mansour, Raoul Velazco, Nacer-Eddine Zergainoh, Jean-François Méhaut	Preliminary results of SEU fault-injection on multicore processors in AMP mode.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Christelle Hobeika, Simon Pichette, M. A. Leonard, Claude Thibeault, Jean-François Boland, Yves Audet	Multi-abstraction level signature generation and comparison based on radiation single event upset.	IOLTS	2014	DBLP DOI BibTeX RDF
1	George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos	Power-aware optimization of software-based self-test for L1 caches in microprocessors.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	Customized cell detector for laser-induced-fault detection.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner	Comparative study of defect-tolerant multiplexers for FPGAs.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Gulay Yalcin, Emrah Islek, Oyku Tozlu, Pedro Reviriego, Adrián Cristal, Osman S. Unsal, Oguz Ergin	Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Antonio González 0001, Ramon Canal, Riccardo Mariani, M. Pipponzi, Arnaud Grasset, Philippe Bonnot 0001, Frank Reichenbach, Gulzaib Rafiq, Trond Loekstad	Cross-layer early reliability evaluation: Challenges and promises.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Hao Xie, Li Chen 0001, Rui Liu 0011, Adrian Evans, Dan Alexandrescu, Shi-Jie Wen, Rick Wong	New approaches for synthesis of redundant combinatorial logic for selective fault tolerance.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Nicholas Axelos, Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis 0001, Kostas Tsoumanis, Kiamal Z. Pekmestzi	FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia López-Ongil, Pedro Reviriego Vasallo	Dependable reconfigurable space systems: Challenges, new trends and case studies.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Sébastien Sarrazin, Samuel Evain, Ivan Miro Panades, Lirida Alves de Barros Naviner, Valentin Gherman	Flip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner, Dhiraj K. Pradhan	A hybrid reliability assessment method and its support of sequential logic modelling.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Jeff Tikkanen, Nik Sumikawa, Li-C. Wang, Magdy S. Abadir	Multivariate outlier modeling for capturing customer returns - How simple it can be.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Anna Vaskova, Marta Portela-García, Mario García-Valderas, Celia López-Ongil, Matteo Sonza Reorda	Permanent faults on LIN networks: On-line test generation.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Nasim Pour Aryan, A. Listl, Leonhard Heiß, Cenk Yilmaz, Georg Georgakos, Doris Schmitt-Landsiedel	From an analytic NBTI device model to reliability assessment of complex digital circuits.	IOLTS	2014	DBLP DOI BibTeX RDF
1		2014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014	IOLTS	2014	DBLP BibTeX RDF
1	Prakash Narayanan, Satish Ravichandran, Balaji Ramayanam	Novel self-test methods to reduce on-chip memory requirements and improved test coverage.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Phaninder Alladi, Spyros Tragoudas	Aging-aware critical paths in deep submicron.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Loic Welter, Philippe Dreux, Hassen Aziza, Jean-Michel Portal	An innovative standard cells remapping method for in-circuit critical parameters monitoring.	IOLTS	2014	DBLP DOI BibTeX RDF
1	David May 0003, Walter Stechele	Improving the significance of probabilistic circuit fault emulations.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Wassim Mansour, Miguel A. Aguirre, Hipólito Guzmán-Miranda, Javier Barrientos Rojas, Raoul Velazco	Two complementary approaches for studying the effects of SEUs on HDL-based designs.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Sophie Dupuis, Papa-Sidi Ba, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Luca Cassano, Hipólito Guzmán-Miranda, Miguel A. Aguirre	Early assessment of SEU sensitivity through untestable fault identification.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras	Pre-bond testing of weak defects in TSVs.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Raghavan Kumar, Philipp Jovanovic, Ilia Polian	Precise fault-injections using voltage and temperature manipulation for differential cryptanalysis.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Álvaro Gómez-Pau, Suvadeep Banerjee, Abhijit Chatterjee	Real-time transient error and induced noise cancellation in linear analog filters using learning-assisted adaptive analog checksums.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Nikos Foutris, Manolis Kaliorakis, Sotiris Tselonis, Dimitris Gizopoulos	Versatile architecture-level fault injection framework for reliability evaluation: A first report.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Honorio Martín, Anna Vaskova, Celia López-Ongil, Enrique San Millán, Marta Portela-García	Effect of ionizing radiation on TRNGs for safe telecommunications: Robustness and randomness.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Katerina Katsarou, Yiorgos Tsiatouhas	Double node charge sharing SEU tolerant latch design.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Sebastian Müller 0005, Tobias Koal, Mario Schölzel, Heinrich Theodor Vierhaus	Timing for virtual TMR in logic circuits.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel	Cost-efficient of a cluster in a mesh SRAM-based FPGA.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich	Area-efficient synthesis of fault-secure NoC switches.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Martin Andraud, Anthony Deluthault, Mouhamadou Dieng, Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Thibault Kervaon, Vincent Kerzerho, Salvador Mir, Paul-Henri Pugliesi-Conti, Michel Renovell, Fabien Soulier, Emmanuel Simeu, Haralampos-G. D. Stratigopoulos	Solutions for the self-adaptation of communicating systems in operation.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Gaurang Upasani, Xavier Vera, Antonio González 0001	Framework for economical error recovery in embedded cores.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Marco Desogus, Luca Sterpone, David Merodio Codinachs	Validation of a tool for estimating the effects of soft-errors on modern SRAM-based FPGAs.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Michael Frischke, Andreas J. Rohatschek, Walter Stechele	Towards low-cost fault detection strategy of FPGA configuration memory in real-time systems.	IOLTS	2014	DBLP DOI BibTeX RDF
1	M. De Carvalho, Davide Sabena, Matteo Sonza Reorda, Luca Sterpone, Paolo Rech, Luigi Carro	Fault injection in GPGPU cores to validate and debug robust parallel applications.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Milos Krstic, Stefan Weidling, Vladimir Petrovic, Michael Gössel	Improved circuitry for soft error correction in combinational logic in pipelined designs.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Yukiya Miura, Yoshihiro Ohkawa	A noise-tolerant master-slave flip-flop.	IOLTS	2014	DBLP DOI BibTeX RDF
1	Oscar Ballan, Paolo Bernardi, B. Yazdani, Ernesto Sánchez 0001	A software-based self-test strategy for on-line testing of the scan chain circuitries in embedded microprocessors.	IOLTS	2013	DBLP DOI BibTeX RDF
1	SinNyoung Kim, Akira Tsuchiya, Hidetoshi Onodera	Perturbation-immune radiation-hardened PLL with a switchable DMR structure.	IOLTS	2013	DBLP DOI BibTeX RDF
1	Yier Jin, Dzmitry Maliuk, Yiorgos Makris	A post-deployment IC trust evaluation architecture.	IOLTS	2013	DBLP DOI BibTeX RDF

Publications at "IOLTS"( http://dblp.L3S.de/Venues/IOLTS )