Search results for "IPS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
19	Pablo Cascón, Julio Ortega Lopera, Yan Luo, Eric Murray, Antonio F. Díaz, Ignacio Rojas	Improving IPS by network processors.	J. Supercomput.	2011	DBLP DOI BibTeX RDF
19	Guang Sun, Shijun Lin, Depeng Jin, Yong Li 0008, Li Su 0001, Yuanyuan Zhang, Lieguang Zeng	Performance-Aware Hybrid Algorithm for Mapping IPs onto Mesh-Based Network on Chip.	IEICE Trans. Inf. Syst.	2011	DBLP DOI BibTeX RDF
19	Nicola Bombieri, Franco Fummi, Graziano Pravadelli	Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF
19	Yehuda Lindell, Benny Pinkas, Eli Oxman	The IPS Compiler: Optimizations, Variants and Concrete Efficiency.	IACR Cryptol. ePrint Arch.	2011	DBLP BibTeX RDF
19	Abdelkader Lahmadi, Emmanuel Nataf, Olivier Festor	YANG-based configuration modeling - The SecSIP IPS case study -.	Integrated Network Management	2011	DBLP DOI BibTeX RDF
19	Moustafa Alzantot, Reem Elkhouly, Amal Lotfy, Moustafa Youssef 0001	POSTER IPS: A Ubiquitous Indoor Positioning System.	MobiQuitous	2011	DBLP DOI BibTeX RDF
19	Hossein Karimiyan, Andrea Calimera, Alberto Macii, Enrico Macii, Massimo Poncino	An On-Chip All-Digital PV-Monitoring Architecture for Digital IPs.	PATMOS	2011	DBLP DOI BibTeX RDF
19	Fateh Boutekkouk, Zakaria Tolba, Mustapha Okab	Automatic Interface Generation between Incompatible Intellectual Properties (IPs) from UML Models.	ACC (2)	2011	DBLP DOI BibTeX RDF
19	Ki Joon Kim, S. Shyam Sundar	Does Panel Type Matter for LCD Monitors? A Study Examining the Effects of S-IPS, S-PVA, and TN Panels in Video Gaming and Movie Viewing.	INTERACT (2)	2011	DBLP DOI BibTeX RDF
19	Yehuda Lindell, Eli Oxman, Benny Pinkas	The IPS Compiler: Optimizations, Variants and Concrete Efficiency.	CRYPTO	2011	DBLP DOI BibTeX RDF
19	Jianrong Xi	A Design and Implement of IPS Based on Snort.	CIS	2011	DBLP DOI BibTeX RDF
19	Lazar Bizumic, Rachid Cherkaoui, Fortunato Villella, Anna Arestova, Andrey Grobovoy, Ulf Häger	Advanced control of Hybrid HVAC/HVDC interconnection interface for the interconnected ENTSO-E - IPS/UPS systems.	ISGT Europe	2011	DBLP DOI BibTeX RDF
19	Chengmo Yang, Mingjing Chen, Alex Orailoglu	Squashing code size in microcoded IPs while delivering high decompression speed.	Des. Autom. Embed. Syst.	2010	DBLP DOI BibTeX RDF
19	Muhammad Imran Shafi, Muhammad Akram, Sikandar Hayat, Imran Sohail	Effectiveness of Intrusion Prevention Systems (IPS) in Fast Networks	CoRR	2010	DBLP BibTeX RDF
19	Farshad Ahdi, Wei Wang 0002, Vikram Srinivasan, Kee Chaing Chua	IPS-MAC: an informative preamble sampling MAC protocol for wireless sensor networks.	Wirel. Networks	2010	DBLP DOI BibTeX RDF
19	Zhiyi Qu, Lili Li, Jianxu Li	Design and Implementation on the P2P VOD System Based on the RF-IPS Algorithm.	Int. J. Commun. Netw. Syst. Sci.	2010	DBLP DOI BibTeX RDF
19	Nicola Bombieri, Franco Fummi, Valerio Guarnieri	Model checking on TLM-2.0 IPs through automatic TLM-to-RTL synthesis.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
19	Nicola Bombieri, Franco Fummi, Valerio Guarnieri	Automatic synthesis of OSCI TLM-2.0 models into RTL bus-based IPs.	HLDVT	2010	DBLP DOI BibTeX RDF
19	Yizi Xing, Liquan Fang	Design-for-Test of Digitally-Assisted Analog IPs for Automotive SoCs.	Asian Test Symposium	2010	DBLP DOI BibTeX RDF
19	Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz	Complete Verification of Weakly Programmable IPs against Their Operational ISA Model.	FDL	2010	DBLP BibTeX RDF
19	Nicola Bombieri, Franco Fummi, Graziano Pravadelli	Abstraction of RTL IPs into embedded software.	DAC	2010	DBLP DOI BibTeX RDF	RTL IP reuse, embedded software generation
19	Flavien Flandrin	Rate based IPS for DDoS.		2010	RDF
19	Angelo Biscotti, Gianluca Capuzzi, Egidio Cardinale, Francesco Pagliarecci, Luca Spalazzi	An IPS for Web Applications.	J. Comput.	2009	DBLP BibTeX RDF
19	Colin Pattinson, Kemal Hajdarevic	Trojan detection using MIB-based IDS / IPS system.	ICAT	2009	DBLP DOI BibTeX RDF
19	Eduardo Ribeiro da Silva, F. Costa, Frank Herman Behrens, Remerson Stein Kickhofel, Ricardo Maltione	Analog test bus architecture for small die size and limited pin count devices with internal IPs testability emphasis.	LATW	2009	DBLP DOI BibTeX RDF
19	Farakh Javid, Ramy Iskander, Marie-Minerve Louërat	Simulation-based hierarchical sizing and biasing of analog firm IPs.	BMAS	2009	DBLP DOI BibTeX RDF
19	Kshitij Bhardwaj, Rabindra Ku Jena	Energy and bandwidth aware mapping of IPs onto regular NoC architectures using Multi-Objective Genetic Algorithms.	SoC	2009	DBLP DOI BibTeX RDF
19	Deepak Mathaikutty, Sandeep K. Shukla	Mining metadata for composability of IPs from SystemC IP library.	Des. Autom. Embed. Syst.	2008	DBLP DOI BibTeX RDF
19	Elaine Anderson, Masud Husain, Petroc Sumner	Human intraparietal sulcus (IPS) and competition between exogenous and endogenous saccade plans.	NeuroImage	2008	DBLP DOI BibTeX RDF
19	Thomas J. Steenburgh	The Invariant Proportion of Substitution Property (IPS) of Discrete-Choice Models.	Mark. Sci.	2008	DBLP DOI BibTeX RDF
19	Sacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz	Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking.	SASP	2008	DBLP DOI BibTeX RDF
19	Feng Ji, Lijun Fu, Hongwei Zhu	Combined Application of EMTDC and Simulink for Hybrid Simulation of IPS.	ISCSCT (2)	2008	DBLP DOI BibTeX RDF
19	Francesco D'Ascoli	Design of integrated mixed-signal IPs for automotive applications.		2008	RDF
19	Kazutami Arimoto, Fukashi Morishita, Isamu Hayashi, Katsumi Dosaka, Hiroki Shimano, Takashi Ipposhi	A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs.	IEEE J. Solid State Circuits	2007	DBLP DOI BibTeX RDF
19	Santanu Dutta	Recent Trends in the Design of Video Signal Processing IPS and Multimedia SoCs.	SECRYPT	2007	DBLP BibTeX RDF
19	Hakam Mheidat, Murat Uysal	Impact of receive diversity on the performance of amplify-and-forward relaying under APS and IPS power constraints.	IEEE Commun. Lett.	2006	DBLP DOI BibTeX RDF
19	Deepak Mathaikutty, Sandeep K. Shukla	Mining Metadata for Composability of IPs from SystemC IP Library.	FDL	2006	DBLP BibTeX RDF
19	Willem de Bruijn, Asia Slowinska, Kees van Reeuwijk, Tomás Hrubý, Li Xu, Herbert Bos	SafeCard: A Gigabit IPS on the Network Card.	RAID	2006	DBLP DOI BibTeX RDF
19	Eui Bong Jung, Han Wook Cho, Neungsoo Park, Yong Ho Song	SONA: An On-Chip Network for Scalable Interconnection of AMBA-Based IPs.	International Conference on Computational Science (4)	2006	DBLP DOI BibTeX RDF
19	Mansoor Alicherry, Muthusrinivasan Muthuprasanna, Vijay Kumar	High Speed Pattern Matching for Network IDS/IPS.	ICNP	2006	DBLP DOI BibTeX RDF
19	Jeremy Lee, Mohammad Tehranipoor, Jim Plusquellic	A Low-Cost Solution for Protecting IPs Against Scan-Based Side-Channel Attacks.	VTS	2006	DBLP DOI BibTeX RDF
19	Andreas Tomek	Review of "Intrusion Prevention and Active Response: Deploying Network and Host IPS by Michael Rash, Angela D. Orebaugh, Graham Clark, Becky Pinkard, and Jake Babbin".	ACM Queue	2005	DBLP DOI BibTeX RDF
19	Marco Ajmone Marsan, Michela Meo	Selected papers from the Second Internet Performance Symposium of GLOBECOM 2002 (IPS 2002).	Perform. Evaluation	2004	DBLP DOI BibTeX RDF
19	Antoine Fraboulet, Tanguy Risset	Efficient On-Chip Communications for Data-Flow IPs.	ASAP	2004	DBLP DOI BibTeX RDF	SoC simulation, system on chip, High level synthesis, interface generation
19	Samy Meftali, Jean-Luc Dekeyser	SoCP2P: A Peer-to-Peer IPS Based SoC Design and Simulation Tool.	Virtual Enterprises and Collaborative Networks	2004	DBLP DOI BibTeX RDF
19	Uwe Schläger, Oliver Stutz	ips - Das Datenschutz-Zertifikat für Online-Dienste.	Datenschutz und Datensicherheit	2003	DBLP BibTeX RDF
19	Robertas Damasevicius, Vytautas Stuikys	Wrapping of Soft IPs for Interface-based Design Using Heterogeneous Metaprogramming.	Informatica	2003	DBLP BibTeX RDF
19	Ilija Cosic, Zoran Anisic, Bojan Lalic	IPS-DFA Methodology Toward Increasing the Mass Customization of the Circular Pump Program Variety.	MCPC	2003	DBLP BibTeX RDF
19	Jian Liu, Meigen Shen, Li-Rong Zheng 0001, Hannu Tenhunen	System level interconnect design for network-on-chip using interconnect IPs.	SLIP	2003	DBLP DOI BibTeX RDF	interconnect IP, network on chip, interconnect, bandwidth optimization
19	Eric Dupont, Michael Nicolaidis, Peter Rohr	Embedded Robustness IPs for Transient-Error-Free ICs.	IEEE Des. Test Comput.	2002	DBLP DOI BibTeX RDF
19	Eric Dupont, Michael Nicolaidis, Peter Rohr	Embedded Robustness Ips.	DATE	2002	DBLP DOI BibTeX RDF
19	Bruce G. Buchanan, Wendy W. Chapman, Gregory F. Cooper, Paul Hanbury, Mehmet Kayaalp 0002, Manoj Ramachandran, Melissa I. Saul	Creating a Software Tool for the Clinical Researcher - the IPS System.	AMIA	2002	DBLP BibTeX RDF
19	Wei Li, Dian Zhou, Haksu Kim, Xuan Zeng 0001	Automatic clock tree design with IPs in the system.	ISCAS (5)	2001	DBLP DOI BibTeX RDF
19	Régis Leveugle	A Low-Cost Hardware Approach to Dependability Validation of Ips.	DFT	2001	DBLP DOI BibTeX RDF	VHDL, emulation, fault injection, dependability analysis
19	Gregory F. Cooper, Bruce G. Buchanan, Wendy W. Chapman, Paul Hanbury, Mehmet Kayaalp 0002, Melissa I. Saul	IPS: A System That Uses Machine Learning to Help Locate Patient Records for Clinical Research.	AMIA	2001	DBLP BibTeX RDF
19	S. V. Narasimhan	Improved instantaneous power spectrum (IPS) performance: A group delay approach.	Signal Process.	2000	DBLP DOI BibTeX RDF
19	C. Buchholz, Wolfgang Rosenstiel	A Constraint-Based Design Methodology for Automated Composition with IPs.	MBMV	2000	DBLP BibTeX RDF
19	Edoardo Charbon, Ilhami Torunoglu	Copyright protection of designs based on multi source IPs.	ICCAD	1999	DBLP DOI BibTeX RDF
19	Marjan Gusev, David J. Evans 0001	VLSI processor array IPS cells (Short communication).	Parallel Comput.	1992	DBLP DOI BibTeX RDF
19	Stephen L. Samson	MVS/ESA SP4.2: IPS and OPT From Scratch.	Int. CMG Conference	1992	DBLP BibTeX RDF
19	Eric Wehrli	The IPS System.	COLING	1992	DBLP BibTeX RDF
19	Ralph D. Hippenstiel, Paulo M. Oliveira	Time-varying spectral estimation using the instantaneous power spectrum (IPS).	IEEE Trans. Acoust. Speech Signal Process.	1990	DBLP DOI BibTeX RDF
19	Ralph D. Hippenstiel, Paulo M. Oliveira	Contributions to time varying spectrum estimation using the instantaneous power spectrum (IPS).	ICASSP	1989	DBLP DOI BibTeX RDF
19	J. William Mullen	MVS/XA Installation Performance Specifications(IPS): Design Considerations.	Int. CMG Conference	1988	DBLP BibTeX RDF
19	K. A. Pocock	Education and training in Robotics edited by Professor T. M. Husband, IPS (Publications) Ltd, Bedford, 1986 (£34.).	Robotica	1987	DBLP DOI BibTeX RDF
19	Barton P. Miller, Cui-Qing Yang	IPS: An Interactive and Automatic Performance Measurement Tool for Parallel and Distributed Programs.	ICDCS	1987	DBLP BibTeX RDF
19	Alan G. Konheim, Marian H. Mack, Robert K. McNeill, Bryant Tuckerman, Gerald Waldbaum	The IPS Cryptographic Programs.	IBM Syst. J.	1980	DBLP DOI BibTeX RDF
11	Santanu S. Dey, Jean-Philippe P. Richard, Yanjun Li, Lisa A. Miller	On the extreme inequalities of infinite group problems.	Math. Program.	2010	DBLP DOI BibTeX RDF	Mathematics Subject Classification (2000) 90C11, 90C57
11	Daniel Gajski, Todd M. Austin, Steve Svoboda	What input-language is the best choice for high level synthesis (HLS)?	DAC	2010	DBLP DOI BibTeX RDF
11	Max Thalmaier, Minh D. Nguyen, Markus Wedler, Dominik Stoffel, Jörg Bormann, Wolfgang Kunz	Analyzing k-step induction to compute invariants for SAT-based property checking.	DAC	2010	DBLP DOI BibTeX RDF	k-step induction, symbolic traversal, invariants, IPC
11	Fang-Yie Leu, Chia-Chi Pai	Detecting DoS and DDoS Attacks Using Chi-Square.	IAS	2009	DBLP DOI BibTeX RDF
11	Xinyu Li, Omar Hammami	Small scale multiprocessor soft IP (SSM IP): single FPGA chip area and performance evaluation.	FPGA	2009	DBLP DOI BibTeX RDF	fpga, multiprocessor, network on chip
11	Katalin Popovici, Ahmed Amine Jerraya	Flexible and abstract communication and interconnect modeling for MPSoC.	ASP-DAC	2009	DBLP DOI BibTeX RDF
11	Tatsuya Kamei, Tetsuhiro Yamada, Takao Koike, Masayuki Ito, Takahiro Irita, Kenichi Nitta, Toshihiro Hattori, Shinichi Yoshioka	A 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management.	ASP-DAC	2009	DBLP DOI BibTeX RDF
11	Jing Cao, Albert Nymeyer	Formally Synthesising a Protocol Converter: A Case Study.	CIAA	2009	DBLP DOI BibTeX RDF
11	Florian Mansmann, Fabian Fischer 0001, Daniel A. Keim, Stephen C. North	Visual support for analyzing network traffic and intrusion detection events using TreeMap and graph representations.	CHIMIT	2009	DBLP DOI BibTeX RDF
11	Andreas Hansson 0001, Kees Goossens	An on-chip interconnect and protocol stack for multiple communication paradigms and programming models.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	system on chip, network on chip, programming model, protocol stack
11	Pradip A. Thaker	Holistic verification: myth or magic bullet?	DAC	2009	DBLP DOI BibTeX RDF	SoC verification, mixed-signal verification, power management verification, emulation
11	Mahesh Balakrishnan 0001, Iqbal Mohomed, Venugopalan Ramasubramanian	Where's that phone?: geolocating IP addresses on 3G networks.	Internet Measurement Conference	2009	DBLP DOI BibTeX RDF	smartphones, geolocation, 3g networks
11	Praveen Bhojwani, Rabi N. Mahapatra	Robust Concurrent Online Testing of Network-on-Chip-Based SoCs.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
11	Anthony Leroy, Dragomir Milojevic, Diederik Verkest, Frédéric Robert, Francky Catthoor	Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF
11	Minyoung Kim, Sudarshan Banerjee, Nikil D. Dutt, Nalini Venkatasubramanian	Energy-aware cosynthesis of real-time multimedia applications on MPSoCs using heterogeneous scheduling policies.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	cosynthesis, energy, Real-time scheduling, MPSoC
11	Markus Behle	On threshold BDDs and the optimal variable ordering problem.	J. Comb. Optim.	2008	DBLP DOI BibTeX RDF	Threshold BDD, 0/1 integer programming, Optimal variable ordering, Variable ordering spectrum, Binary decision diagram, Knapsack
11	Edith Beigné, Fabien Clermidy, Sylvain Miermont, Pascal Vivet	Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC.	NOCS	2008	DBLP DOI BibTeX RDF	Pausable clock, Vdd Hopping, Network-on-Chip, power, DVFS, GALS
11	Maryam Moazeni, Alireza Vahdatpour, Karthik Gururaj, Majid Sarrafzadeh	Communication bottleneck in hardware-software partitioning.	FPGA	2008	DBLP DOI BibTeX RDF	FPGA, communication, hardware-software codesign
11	Michel Vasilevski, François Pêcheux, Nicolas Beilleau, Hassan Aboushady, Karsten Einwich	Modeling and Refining Heterogeneous Systems With SystemC-AMS: Application to WSN.	DATE	2008	DBLP DOI BibTeX RDF
11	Nitin 0001, Durg Singh Chauhan, Vivek Kumar Sehgal, Ankit Mahanot, Pallavi Singh, Sohit Ahuja, Utkarsh Shrivastava, Manisha Rana, Vineet Punjabi, Shivam Vinay, Nakul Sharma	Finite-State Modeling and Testing of Image Based Authentication System.	ACIS-ICIS	2008	DBLP DOI BibTeX RDF	Image based authentication system, Completed finite state automata, Legal interaction pairs, Faulty interaction pairs, Regular expression
11	Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader Bagherzadeh	A Generic Network Interface Architecture for a Networked Processor Array (NePA).	ARCS	2008	DBLP DOI BibTeX RDF	Networked Processor Array (NePA), Multiprocessor System-on-Chip (MPSoC), Interconnection Network, Network Interface, Network-on-Chip (NoC)
11	Giovanni Beltrame, Cristiana Bolchini, Luca Fossati, Antonio Miele, Donatella Sciuto	ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration.	ASP-DAC	2008	DBLP DOI BibTeX RDF
11	Rafael Tornero, Juan M. Orduña, Maurizio Palesi, José Duato	A Communication-Aware Topological Mapping Technique for NoCs.	Euro-Par	2008	DBLP DOI BibTeX RDF
11	Rajat Subhra Chakraborty, Swarup Bhunia	Hardware protection and authentication through netlist level obfuscation.	ICCAD	2008	DBLP DOI BibTeX RDF	IP piracy, design for security, hardware authentication, hardware obfuscation, hardware protection
11	Gaël Manson, Sid-Ahmed Berrani	An Inductive Logic Programming-Based Approach for TV Stream Segment Classification.	ISM	2008	DBLP DOI BibTeX RDF
11	Omar Hammami, Zhoukun Wang, Virginie Fresse, Dominique Houzet	A quantitative evaluation of C-based synthesis on heterogeneous embedded systems design.	ISCAS	2008	DBLP DOI BibTeX RDF
11	Chang Wu, Yubai Li, Song Chai, Zhongming Yang	Lottery Router: A Customized Arbitral Priority NOC Router.	CSSE (3)	2008	DBLP DOI BibTeX RDF
11	Sung-Kwan Ku, Han-Sam Jung, Ki-Seok Chung	A unified power measurement and management platform for pipelined MPSoC executions.	SoCC	2008	DBLP DOI BibTeX RDF
11	Jean-Pierre Dérutin, Lionel Damez, Alexis Landrault	Embedding of a Real Time Image Stabilization Algorithm on SoPC Platform, a Chip Multi-processor Approach.	ACIVS	2008	DBLP DOI BibTeX RDF
11	Sukumar Jairam, Navakanta Bhat	GyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes.	VLSI Design	2008	DBLP DOI BibTeX RDF
11	Imran Rafiq Quadri, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser	Using an MDE Approach for Modeling of Interconnection Networks.	ISPAN	2008	DBLP DOI BibTeX RDF	UML2 Templates, SoC, MINs, NoC, MDE, MARTE, Delta Networks
11	Charles Pak	The near real time statistical asset priority driven (nrtsapd) risk assessment methodology.	SIGITE Conference	2008	DBLP DOI BibTeX RDF	risk assessment, asset management
11	Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger	An 8x8 run-time reconfigurable FPGA embedded in a SoC.	DAC	2008	DBLP DOI BibTeX RDF	FPGA, RTR