The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Publications at "MBMV"( http://dblp.L3S.de/Venues/MBMV )

URL (DBLP): http://dblp.uni-trier.de/db/conf/mbmv

Publication years (Num. hits)
1998 (20) 1999 (20) 2000 (32) 2001-2002 (29) 2003 (28) 2004 (34) 2006 (44) 2007 (30) 2008 (20) 2009 (29) 2010 (25) 2011 (32) 2012 (18) 2013 (26) 2014 (24) 2015 (20) 2016 (18) 2017 (19) 2018-2019 (23) 2020-2021 (19) 2022-2023 (17)
Publication types (Num. hits)
inproceedings(502) proceedings(25)
Venues (Conferences, Journals, ...)
MBMV(527)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
No Growbag Graphs found.

Results
Found 527 publication records. Showing 527 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Marco Beyer, Hans-Ulrich Post VHDL-Hardware/Software-Board-Level-Simulation innerhalb eines FPGA/DSP-Entwicklungssystems. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Michael Payer A Platform for Construction and Integration of Digital IP Blocks. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Roberto Ziller, Klaus Schneider 0001 A μ-Calculus Approach to Supervisor Synthesis. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Jürgen Ruf, Prakash Mohan Peranandam Bounded Property Checking with Symbolic Simulation. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Hans-Jürgen Brand Verifikation von Prozessorplattformen -- Probleme und Trends aus Sicht der Chipentwicklung. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Carsten Gremzow, E. Hansen, Nico Moser, Hans-Ulrich Post Datapath constrained High-Level Synthesis of Central Memory Architectures. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Klaus Winkelmann, Hans-Joachim Trylus, Dominik Stoffel, Görschwin Fey Cost-efficient Formal Block Verification for ASIC Design. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Ilia Polian, Wolfgang Günther 0001, Bernd Becker 0001 The Case for 2-POF. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Martin Zambaldi, Matthias Bauer 0003, Wolfgang Ecker, Renate Henftling, Andreas Zinn An Enhanced Environment for Multi-Level Simulation. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Viktor K. Sabelfeld, Kai Kapp Arithmetic in Formal Synthesis. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Jan Peleska 0001 Automated Test Suites for Modern Aircraft Controllers. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Rolf Drechsler (eds.) Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Bremen, Germany, February 24-25, 2003 Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Joachim Haase Regeln für die Erstellung von VHDL-AMS-Modellen. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Markus Wedler, Dominik Stoffel, Wolfgang Kunz Towards the impact of state encoding on induction-based property checking. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Christoph Jaeschke, Bodo Hoppe, Wolfram Sauer A Universal Disassembler using Table Based Formal Architectural Specification. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Marco Fischer, Stefan Förster, André Windisch, Burkhard Balser, Dieter Monjau A New Process-Algebraic Specification Methodology for Integrated Modular Avionic Systems. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Alexander Krupp, Wolfgang Müller 0003 Formale Verfeinerung und Modelchecking von zeitbehafteten endlichen Automaten. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Stefan Ihmor, Markus Visarius, Wolfram Hardt Modeling of Configurable HW/SW-Interfaces. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Mathias Sporer, Dieter Monjau Datenbanken zur konsistenten Speicherung von Entwurfsdaten für eingebettete Systeme. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Kai Kapp, Viktor K. Sabelfeld Dead Code Elimination in Formal Synthesis. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Christian Meise, Christoph Grimm 0001 Konzept einer Klassensammlung zur Verhaltensmodellierung hybrider Systeme am Beispiel der Leistungselektronik. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Daniel Große, Rolf Drechsler Formale Verifikation von LTL-Formeln für SystemC-Beschreibungen. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Marek Jersak, Kai Richter 0001, Rolf Ernst, Jörn-Christian Braam, Zheng-Yu Jiang, Fabian Wolf Certifiable Software-Integration for Engine Electronics. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Marc Herbstritt, Bernd Becker 0001 Conflict-based Selection of Branching Rules in SAT-Algorithms. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Michael Kersten, Ramon Biniasch, Wolfgang Nebel, Frank Oppenheimer Erweiterung der UML um Zeitannotationen zur Analyse des Zeitverhaltens reaktiver Systeme. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Eva Fordran, Matthias Fruth, Ulrich Hensel, Hu Shaoyu, Madabhushi Srinivasan Model Checking in an Industrial Environment. Search on Bibsonomy MBMV The full citation details ... 2003 DBLP  BibTeX  RDF
1Rolf Drechsler, Jochen Römmler Implementation and Visualization of a BDD Package in JAVA. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Jürgen Ruf, Thomas Kropf Combination of Simulation and Formal Verification. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Sven Verdenhalven, Holger Kühl Interfacing Concept for Different Levels of Abstraction in IP-based SoC Design. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Oliver Kraus, Martin Padeffke Entwurfsumgebung für asynchrone Burst-Mode Automaten. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Thomas Kumpf, Carsten Müller-Schwanneke, Björn Jelonnek, Armin Splett, Albrecht Rothermel Schnelle Simulation analoger Sigma-Delta-Modulatoren durch Abstraktion von Transistorschaltungen. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Cordula Hansen, Wolfgang Rosenstiel High Level Testbench Transformation for Pipelined Components. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Roberto Ziller Finding Bad States during Symbolic Supervisor Synthesis. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Christoph Scholl 0001, Bernd Becker 0001 Equivalence Checking in the Presence of Incompletely Specified Boxes. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Kolja Sulimma, Ingmar Neumann, Lukas P. P. P. van Ginneken, Wolfgang Kunz Improving Placement under the Constant Delay Model. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Michael Schlegel, Göran Herrmann, Dietmar Müller 0001 "Multi-Architecture-Modeling" Entwurfsmethode für Mixed-Signal- und Multi-Domain-Systemsimulation. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Thomas Lehmann 0001, Mauro Cesar Zanella Modeling and Software Synthesis of Interrupt Systems. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Jürgen Frößl Synthese großer Schaltungen. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Olga Fengler, Thorsten Hummel, Wolfgang Fengler 0001 Modellierung kooperierender Prozesse mit gefärbten Sequenzdiagrammen. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Christian Haubelt, Jürgen Teich, Kai Richter 0001, Rolf Ernst Modellierung rekonfigurierbarer Systemarchitekturen. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Tobias Schuele, Klaus Schneider 0001 Symbolic Model Checking by Automata Based Set Representation. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Mathias Schmalisch, Hagen Ploog, Dirk Timmermann Laufzeitoptimierte VHDL Bibliothek zur Verifikation und Simulation Kryptographischer Prozessoren. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Matthias Menge, Irenäus Schoppa Hardwaresynthese von Programmiermodellen. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Klaus-Jürgen Englert, Bernd Becker 0001, Rolf Drechsler Symbolic Simulation of Algorithms Specified in HDL. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Jürgen Ruf (eds.) Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Tübingen, Germany, February 25-27, 2002 Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Christoph Grimm 0001, Christian Meise, Wilhelm Heupke, Klaus Waldschmidt Entwurf analog/digitaler Systeme mit SystemC. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Klaus-Dieter Schubert Formal Verification versus Simulation in Functional Verification -- An Industry Perspective. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Werner Haas 0003, Stefan Gossens, Ulrich Heinkel Behavioural Specification for Advanced Design and Verification of ASICs (ADeVA). Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Jens Bastian, Joachim Haase, Sven Reitz Verhaltensbeschreibung von Systemen mit verteilten Parametern durch Ordnungsreduktion. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Carsten Gremzow, E. Hansen, Nico Moser, Hans-Ulrich Post Integration einer Datenpfad-orientierten Ablaufplanung und Bindung in die High-Level-Synthese. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Jörg Schneider, Maik Boden, Steffen Rülke Eine wiederverwendungsgerechte Entwurfsmethodik für rekonfigurierbare SoC-Architekturen. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Kai Richter 0001, Rolf Ernst, Wayne H. Wolf Local Constraint Derivation for Platform-Based Design. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Wolfgang Rosenstiel Struktur und Aufgaben des edacentrums. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Dieter Monjau, Mathias Sporer Analyse dynamischer Eigenschaften eingebetteter Systeme mit GPSS. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
1Dieter Monjau (eds.) Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Meißen, Germany, February 19-21, 2001 Search on Bibsonomy MBMV The full citation details ... 2001 DBLP  BibTeX  RDF
1Wolfgang Günther 0001, Nicole Drechsler, Rolf Drechsler, Bernd Becker 0001 Verification of Designs Containing Black Boxes. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Gunter Haug, Udo Kebschull, Wolfgang Rosenstiel Emulation synthetisierter Verhaltensbeschreibungen mit VLIW-Prozessoren. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Heinz-Josef Schlebusch C-based Design of Systems-on-Chip: An EDA Perspective. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Wolfgang Boßung, Sorin A. Huss, Michael Stini xCDM -- Ein interaktives Werkzeug zur graphenbasierten Systemmodellierung. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Stephan Flake, Wolfgang Müller 0003, Jürgen Ruf Structured English for Model Checking Specification. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Jens Schönherr, Bernd Straube Formale Verifikation auf höheren Entwurfsebenen mittels symbolischer Traversierung unendlicher Automaten. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Michael Payer Industrial Experience with Formal Verification. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Michael Kropf Automotive Electronics: European Challenges in Circuit and System Design. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Wolfgang Fey System Simulation: A Basic Tool for Modern System Development. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Claudia Blank, Gerd Ritter, Holger Hinrichsen, Hans Eveking Formale Verifikation der Register-Allokation. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek, Jörg Schneider, S. Rülke Experimenteller Vergleich verschiedener Entwurfsmethoden für FPGA-basierte Entwurfsabläufe. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Wolfgang Ecker, Mike Heuchling, Jochen Mades, Thomas Schneider 0006, André Windisch, Ke Yang VXML: VHDL Hardware Design Representation in XML. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Frank-Michael Renner, Jürgen Becker 0001, Manfred Glesner Communication Performance Estimation and Communication Synthesis for Architecture-precise Prototyping of Real-time Embedded Systems. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Frank Heuschen, Christoph Grimm 0001, Klaus Waldschmidt Modellierung des Implementierungsraumes im Analog/Digital Co-Design. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Thomas Ringler Entwicklung und Analyse von verteilten zeitgesteuerten Systemen. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Jürgen Kampe Die formale Beschreibung des Strukturentwurfs analoger Systemkomponenten. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Daniel Kröning, Wolfgang J. Paul, Silvia M. Müller Proving the Correctness of Pipelined Micro-Architectures. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Jürgen Koehl, Jürgen Schietke Platzierungsbasierte Logikoptimierung komplexer VLSI Chips. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Riccardo Forth, Paul Molitor Permutation Independent Comparison of Pseudo Boolean Functions. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Dirk Bierbaum, Reimund Wittmann, Michael Buchmann, Mohsen Darianian A 2k High Speed CMOS Embedded Dual Port SRAM Using an Advanced Generator Concept. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Klaus Waldschmidt, Christoph Grimm 0001 (eds.) Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28 - March 1, 2000 Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Andreas Hett, Christoph Scholl 0001, Bernd Becker 0001 State Traversal guided by Hamming Distance Profiles. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Andreas Wassatsch, Dirk Timmermann Untersuchung zum Einfluß der speziellen Anforderungen dynamischer Schaltungstechnik auf den Systementwurf. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Matthias Bauer 0003, Wolfgang Ecker, Andreas Zinn Graphische Spezifikation und Analyse funktionaler Testabläufe mit MSCs der UML. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Jürgen Haase, Peter Schwarz, Peter Trappe, Wolfgang Vermeiren Erfahrungen mit VHDL-AMS bei der Simulation heterogener Systeme. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Jürgen Ruf A Toolset for the Symbolic Examination of Finite State Transition Systems. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1C. Buchholz, Wolfgang Rosenstiel A Constraint-Based Design Methodology for Automated Composition with IPs. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Christoph Grimm 0001, Thomas Stauner Übersetzung von HyCharts in HDFG. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Michael Mrva, Rainer Kress 0002 Role-Centered Conceptual Modeling in System Design. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Christine Bauer 0002, Peter Zipf, Hans Wojtkowiak Integration und Fehlertoleranz im Codesign. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Andreas Bauer, Wolfgang Schwarz Volterra Kernel for Automatic Analysis and Optimization of Nonlinear Analogue Circuits. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Jens Schönherr, Bernd Straube Induction based Equivalence Check at Register Transfer Level. Search on Bibsonomy MBMV The full citation details ... 2000 DBLP  BibTeX  RDF
1Heiko Henkelmann, C. Bruennlein, Walter Anheier Effiziente Methoden zum Zahlenvergleich und zur Vorzeichenerkennung in Restklassensystemen. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Christian Blumenröhr A Formal Approach to Specify and Synthesize at the System Level. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Bernd Stöhr, Utz G. Baitinger Eine neue Methode zur Spezifikation von komplexen Steuerwerken unter der Randbedingung der Synthese und eines kurzen Entwurfszyklus. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Matthias Mutz, Sebastian Steibl Formale Verifikation der Architekturverbesserung eines Viterbi Decoder IP Blocks. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Tom Barthel, Dietmar Müller 0001, Jan Pauliuk Beschreibungsmittel und Werkzeuge für Spezifikationen heterogener Systeme. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Tommy Kuhn, Wolfgang Rosenstiel, Udo Kebschull Beschreibung und Simulation von Hardware/Software-Systemen mit Java. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Holger Hinrichsen, Gerd Ritter, Hans Eveking Automatische Synthese und Verifikation von RISC-Prozessoren. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Matthias Meixner, Jürgen Becker 0001, Thomas Hollstein, Manfred Glesner Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Rolf Drechsler, Marc Herbstritt, Bernd Becker 0001 Grouping Heuristics for Word-Level Decision Diagrams. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Klaus Schneider 0001, George Logothetis Abstraction of Systems with Counters for Symbolic Model Checking. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Jürgen Ruf, Thomas Kropf Modeling Real-Time Systems with I/O-Interval Structures. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Cristina Barna, Wolfgang Rosenstiel Description and Classification of VHDL Objects in the Reuse Management System. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
1Joachim Gerlach, Thilo Klöpfer, Wolfgang Rosenstiel Algorithmischer Ansatz zur automatisierten Entwurfsraum-Exploration auf hoher Abstraktionsebene. Search on Bibsonomy MBMV The full citation details ... 1999 DBLP  BibTeX  RDF
Displaying result #401 - #500 of 527 (100 per page; Change: )
Pages: [<<][1][2][3][4][5][6][>>]
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by L3S.
Previously maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license