Search results for "MEMOCODE"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Gaurav Singh 0006, Sandeep K. Shukla	Low-power hardware synthesis from TRS-based specifications.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Hiren D. Patel, Sandeep K. Shukla, E. Mednick, Rishiyur S. Nikhil	A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Shobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu	Automatic decomposition for sequential equivalence checking of system level and RTL descriptions.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	E. Czeck, Ravi Nanavati, Joseph E. Stoy	Reliable design with multiple clock domains.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Qi Zhu 0002, Abhijit Davare, Alberto L. Sangiovanni-Vincentelli	A semantic-driven synthesis flow for platform-based design.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Niloofar Razavi, Marjan Sirjani	Using Reo for formal specification and verification of system designs.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Rajeev Alur	Games for formal design and verification of reactive systems.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Masahiro Fujita, Subash Shankar, Sasaki Shunsuke	Equivalence checking: a rule-based approach.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Íñigo Ugarte, Pablo Sanchez	Assertion checking of control dominated systems with nonlinear solvers.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Myla Archer, Hongping Lim, Nancy A. Lynch, Sayan Mitra, Shinya Umeno	Specifying and proving properties of timed I/O automata in the TIOA toolkit.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Alistair A. McEwan, Steve A. Schneider	A verified development of hardware using CSP∥B.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Klaus Schneider 0001, Jens Brandt 0001, Eric Vecchié	Efficient code generation from synchronous programs.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1		4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 27-29 July 2006, Embassy Suites, Napa, California, USA	MEMOCODE	2006	DBLP BibTeX RDF
1	M. Hsiao, Sandeep K. Shukla, Maya B. Gokhale, Alvin R. Lebeck	Panel: Nano-computing - do we need new formal approaches?	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Olivier Tardieu, Stephen A. Edwards	R-SHIM: deterministic concurrency with recursion and shared variables.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen Voeten, Stefan Valentin Gheorghita, Sander Stuijk	A scenario-aware data flow model for combined long-run average and worst-case performance analysis.	MEMOCODE	2006	DBLP DOI BibTeX RDF
1	Tevfik Bultan, Constance L. Heitmeyer, John O'Leary	Panel on design for verification.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Xingwen Xu, Shinji Kimura, Kazunari Horikawa, Takehiko Tsuchiya	Extended abstract: transition traversal coverage estimation for symbolic model checking.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1		3rd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2005), 11-14 July 2005, Verona, Italy, Proceedings	MEMOCODE	2005	DBLP BibTeX RDF
1	Stefano Brait, Franco Fummi, Graziano Pravadelli	On the use of a high-level fault model to analyze logical consequence of properties.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Nicola Bombieri, Andrea Fedeli, Franco Fummi	Extended abstract: on the property-based verification in SoC design flow founded on transaction level modeling.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Shuqing Zhao, Daniel D. Gajski	Structural operational semantics for supporting multi-cycle operations in RTL HDLs.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Wolfgang Pree	From bold idea to product - a case study.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Françoise Bellegarde, Samir Chouali, Jacques Julliand	Refinemant verification of fair transition systems can contribute to PLTL model checking.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Daniel Gajski	System design extreme makeover.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Fei Xie, Xiaoyu Song, Haera Chung, Ranajoy Nandi	Translation-based co-verification.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Masahiro Fujita	Extended abstract: a formal design approach from software oriented UML descriptions to hardware oriented RTL.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Peter Poplavko, Twan Basten, Milan Pastrnak, Jef L. van Meerbergen, Marco Bekooij, Peter H. N. de With	Extended abstract: estimation times of on-chip multiprocessor stream-oriented applications.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Tuba Yavuz-Kahveci, Tevfik Bultan	Verification of parameterized hierarchical state machines using action language verifier.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Gustaf Naeser, Johan Furunäs	Extended abstract: evaluation of delay queues for a Ravenscar HW kernel.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Nirav Dave, Man Cheuk Ng, Arvind	Automatic synthesis of cache-coherence protocol processors using Bluespec.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Greg Hoover, Forrest Brewer	PyPBS design and methodologies.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Manfred Broy	Automotive software and systems engineering (Panel).	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Myla Archer	Making PVS do what you want.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Panagiotis Manolios, Sudarshan K. Srinivasan	A computationally ef~cient method based on commitment re~nement maps for verifying pipelined machines.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Daniel Kroening, Natasha Sharygina	Formal verification of SystemC by automatic hardware/software partitioning.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Christos Kloukinas	Thunderstriking constraints with JUPITER.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Nicolas Halbwachs	A synchronous language at work: the story of Lustre.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Michael Pellauer, Mieszko Lis, Don Baltus, Rishiyur S. Nikhil	Synthesis of synchronous assertions with guarded atomic actions.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Stephen A. Edwards, Olivier Tardieu	Deterministic receptive processes are Kahn processes.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Ralph D. Jeffords, Ramesh Bharadwaj	Extended abstract: formal verification of architectural patterns in support of dependable distributed systems.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Tobias Schüle, Klaus Schneider 0001	Three-valued logic in bounded model checking.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede	Extended abstract: a race-free hardware modeling language.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Ali Sezgin, Ganesh Gopalakrishnan	On the decidability of shared memory consistency verification.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita	Synchronization verification in system-level design with ILP solvers.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Íñigo Ugarte, Pablo Sanchez	Extended abstract: polynomial model-based evaluation of the branch coverage metric for functional verification of hardware systems.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Felice Balarin, Roberto Passerone, Alessandro Pinto, Alberto L. Sangiovanni-Vincentelli	A formal approach to system level design: metamodels and unified design environments.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Nicolae Savoiu, Sandeep K. Shukla, Rajesh K. Gupta 0001	Improving SystemC simulation through Petri net reductions.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Ingolf Krüger	Service-oriented software and systems engineering - a vision for the automotive domain.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Klaus Rothbart, Ulrich Neffe, Christian Steger, Reinhold Weiss, Edgar Rieger, Andreas Mühlberger	Extended abstract: an environment for design verification of smart card systems using attack simulation in SystemC.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Jan Jürjens	Verification of low-level crypto-protocol implementations using automated theorem proving.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Elizabeth I. Leonard, Myla Archer	Extended abstract: organizing automaton specifications to achieve faithful representation.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Lars Pareto	Extended abstract: requirements modeling within iterative, incremental processes.	MEMOCODE	2005	DBLP DOI BibTeX RDF
1	Sagar Chaki, Edmund M. Clarke, Joël Ouaknine, Natasha Sharygina	Automated, compositional and iterative deadlock detection.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1		2nd ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004), 23-25 June 2004, San Diego, California, USA, Proceedings	MEMOCODE	2004	DBLP BibTeX RDF
1	Ahmed Sobeih, Mahesh Viswanathan 0001, Jennifer C. Hou	Check and simulate: a case for incorporating model checking in network simulation.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Cagkan Erbas, Selin C. Erbas, Andy D. Pimentel	Static priority scheduling of event triggered real time embedded systems.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Dag Björklund	Efficient code synthesis from synchronous dataflow graphs.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	David L. Dill	The battle of accountable voting systems.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Tobias Schüle, Klaus Schneider 0001	Bounded model checking of infinite state systems: exploiting the automata hierarchy.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Rishiyur S. Nikhil	Bluespec System Verilog: efficient, correct RTL from high level specifications.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Daniel L. Rosenband	The ephemeral history register: flexible scheduling for rule-based designs.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Christel Baier, Frank Ciesinski, Marcus Größer	PROBMELA: a modeling language for communicating probabilistic processes.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Stephen Neuendorffer, Edward A. Lee	Hierarchical reconfiguration of dataflow models.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Himanshu Jain, Daniel Kroening, Edmund M. Clarke	Verification of SpecC using predicate abstraction.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Gerard J. Holzmann	Formal methods and software reliability.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Vladimir Levin	Static driver verifier, a formal verification tool for Windows device drivers.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Yamine Aït Ameur, Remi Delmas, Virginie Wiels	A framework for heterogeneous formal modeling and compositional verification of avionics systems.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Ralph D. Jeffords, Elizabeth I. Leonard	Using invariants to optimize formal specifications before code synthesis.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Nirav Dave	Designing a reorder buffer in Bluespec.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Bhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti 0001	The BUSpec platform for automated generation of verification aids for standard bus protocols.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Randal E. Bryant	System modeling and verification with UCLID.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Robert P. Kurshan	Formal verification as a technology transfer problem.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Olivier Tardieu, Robert de Simone	Curing schizophrenia by program rewriting in Esterel.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Sandeep K. Shukla, Tevfik Bultan, Constance L. Heitmeyer	Panel: given that hardware verification has been an uphill battle, what is the future of software verification?	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Carl Pixley, D. Meyers, S. McMaster, A. Chittor	Designers want proofs - but show me the money.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Grace Nordin, James C. Hoe	Synchronous extensions to operation centric hardware description languages.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Edward A. Lee, Stephen Neuendorffer	Classes and subclasses in actor-oriented design.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Krishnamani Kalyanasundaram, R. K. Shyamasundar	Formal verification of pipelined processors with precise exceptions.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Brian Bailey	Is formal being squeezed out of functional verification?	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	John O'Leary	Formal verification in Intel CPU design.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Christoph Sprenger 0001, Dilian Gurov, Marieke Huisman	Compositional verification for secure loading of smart card applets.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Daniel Große, Rolf Drechsler	Checkers for SystemC designs.	MEMOCODE	2004	DBLP DOI BibTeX RDF
1	Thierry J.-F. Omnés, Gerard Postuma, Jos Verhaegh, Marleen Boonen, Nick Gatherer	Using SSDE for USB2.0 conformance co-verification.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Manfred Broy	Modular Hierarchies of Models for Embedded Systems.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, Richard Hersemeule, Jean-Philippe Cousin	LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Arvind	Bluespec: A language for hardware design, simulation, synthesis and verification Invited Talk.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	William B. Gardner	Bridging CSP and C++ with Selective Formalism and Executable Specifications.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Julio A. de Oliveira Filho, Manoel Eusébio de Lima, Paulo Romero Martins Maciel	Petri Net Based Interface Analysis for Fast IP-Core Integration.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Franco Fummi, Graziano Pravadelli, Andrea Fedeli, Umberto Rossi, Franco Toto	On the Use of a High-Level Fault Model to Check Properties Incompleteness.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Jan Romberg, Oscar Slotosch, Gabor Hahn	MoDe: A Method for System-Level Architecture Evaluation.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Giovanni De Micheli	Robust System Design with Uncertain Information.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Roberto Ziller, Klaus Schneider 0001	A Generalised Approach to Supervisor Synthesis.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu, Masahiro Fujita	Engineering Changes in Field Modifiable Architectures.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Christoph Sprenger 0001, Krzysztof Worytkiewicz	A Verification Methodology for Infinite-State Message Passing Systems.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Islam A. M. El-Maddah, T. S. E. Maibaum	Goal-Oriented Requirements Analysis for Process Control Systems Design.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Margot Bittner, Florian Kammüller	Translating Fusion/UML to Object-Z.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Luís Gomes 0001, Anikó Costa	From Use Cases to System Implementation: Statechart Based Co-design.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	Magali Contensin, Laurence Pierre	Combining ACL2 and a v-calculus Model-Checker to Verify System-Level Designs.	MEMOCODE	2003	DBLP DOI BibTeX RDF
1	David Cachera, Katell Morin-Allory	Verification of Control Properties in the Polyhedral Model.	MEMOCODE	2003	DBLP DOI BibTeX RDF

Publications at "MEMOCODE"( http://dblp.L3S.de/Venues/MEMOCODE )