Search results for "SBCCI"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Mayler G. A. Martins, Felipe S. Marranghello, Joseph S. Friedman, Alan V. Sahakian, Renato P. Ribas, André Inácio Reis	Spin diode network synthesis using functional composition.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Fernando Paixão Cortes, Guilherme Freitas, Henrique Luiz Andrade Pimentel, Juan Pablo Martinez Brito, Fernando Chávez	Low-Power/Low-Voltage analog front-end for LF passive RFID tag systems.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Iuri A. C. Gomes, Fernanda Gusmão de Lima Kastensmidt	Reducing TMR overhead by combining approximate circuit, transistor topology and input permutation approaches.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Vinicius N. Possani, Vinicius Callegaro, André Inácio Reis, Renato P. Ribas, Felipe S. Marques 0001, Leomar S. da Rosa Jr.	Improving the methodology to build non-series-parallel transistor arrangements.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Juan Pablo Martinez Brito, Alain Rabaeijs	CMOS smart temperature sensors for RFID applications.	SBCCI	2013	DBLP DOI BibTeX RDF
1	SungHa Jung, Myoung-Seob Lim, Yihu Xu, Dae Hyun Jo	Implementation of split-radix FFT pruning for the reduction of computational complexity in OFDM based cognitive radio system.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum	An evolutive approach for designing thermal and performance-aware heterogeneous 3D-NoCs.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Christoph Roth, Harald Bucher, Simon Reder, Florian Buciuman, Oliver Sander, Jürgen Becker 0001	A SystemC modeling and simulation methodology for fast and accurate parallel MPSoC simulation.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Pedro F. G. da Silva, Eduardo Gonçalves de Lima	Design of crest factor reduction techniques based on clipping and filtering for wireless communications systems.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Ruhan A. Conceição, J. Claudio de Souza, Ricardo Jeske, Marcelo Schiavon Porto, Júlio C. B. de Mattos, Luciano Volcan Agostini	Hardware design for the 32×32 IDCT of the HEVC video coding standard.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Ismael Seidel, Bruno George de Moraes, André Beims Bräscher, José Luís Güntzel	On the impacts of pel decimation and High-Vt/Low-Vdd on SAD calculation.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Cicero Nunes, Paulo F. Butzen, André Inácio Reis, Renato P. Ribas	A methodology to evaluate the aging impact on flip-flops performance.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Lucas C. Severo, Alessandro Girardi	A methodology for the automatic design of operational amplifiers including yield optimization.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Hamilton Klimach, Arthur Liraneto Torres Costa, Moacir Fernandes Cortinhas Monteiro, Sergio Bampi	A resistorless switched bandgap voltage reference with offset cancellation.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Leandro Zafalon Pieper, Eduardo A. C. da Costa, José C. Monteiro 0001	Combination of radix-2m multiplier blocks and adder compressors for the design of efficient 2's complement 64-bit array multipliers.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Caio G. P. Alegretti, Vinícius Dal Bem, Renato P. Ribas, André Inácio Reis	Analytical logical effort formulation for minimum active area under delay constraints.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Fernando de Souza Campos, José Alfredo Covolan Ulson, Jacobus W. Swart, M. Jamal Deen, Ognian Marinov, Dib Karam	Temporal noise analysis and measurements of CMOS active pixel sensor operating in time domain.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Tony Forzley, Ralph Mason	A 14b threshold configurable dynamically latched comparator for SAR ADCs.	SBCCI	2013	DBLP DOI BibTeX RDF
1	Cecil Accetti R. de A. Melo, Ricardo E. de Souza	FPGA-based digital direct-conversion transceiver for Nuclear Magnetic Resonance Systems.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Matheus T. Moreira, Ricardo A. Guazzelli, Ney Laert Vilar Calazans	Return-to-one protocol for reducing static power in C-elements of QDI circuits employing m-of-n codes.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Thiago R. da Rosa, Vivian Larrea, Ney Calazans, Fernando Gehm Moraes	Power consumption reduction in MPSoCs through DFS.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Fabiane Rediess, Luciano Volcan Agostini, Cassio Cristani, Pargles Dall'Oglio, Marcelo Schiavon Porto	High throughput hardware design for the Adaptive Loop Filter of the emerging HEVC video coding.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Carlos Augusto de Moraes Cruz, Israel L. Marinho, Davies William de Lima Monteiro	Extended use of pseudo-flash reset technique for an active pixel with logarithmic compressed response.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Thiago N. C. Cardoso, Edna Barros, Bruno O. Prado, Andre Aziz	Communication software synthesis from UML-ESL models.	SBCCI	2012	DBLP DOI BibTeX RDF
1	João Bispo, João M. P. Cardoso, José Monteiro 0001	Hardware pipelining of runtime-detected loops.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Henrique Luiz Andrade Pimentel, Sergio Bampi	A 50MHz-lGHz wideband low noise amplifier in 130nm CMOS technology.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Zubair Wadood Bhatti, Narasinga Rao Miniskar, Davy Preuveneers, Roel Wuyts, Yolande Berbers, Francky Catthoor	Memory and communication driven spatio-temporal scheduling on MPSoCs.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Jones Yudi Mori, Carlos H. Llanos, Pedro A. Berger	Kernel analysis for architecture design trade off in convolution-based image filtering.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Edgar Mauricio Camacho-Galeano, Alfredo Olmos, Andre Vilas Boas	A very low power area efficient CMOS only bandgap reference.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Zia Abbas, Marat Yakupov, Mauro Olivieri, Andreas Ripp, Gunter Strube	Yield optimization for low power current controlled current conveyor.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Vinicius N. Possani, Felipe S. Marques 0001, Leomar S. da Rosa Jr., Vinicius Callegaro, André Inácio Reis, Renato P. Ribas	NSP kernel finder - A methodology to find and to build non-series-parallel transistor arrangements.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Yuri Gonzaga Gonçalves da Costa, José Antônio Gomes de Lima, Guilherme Navarro	A low complexity lossless data compressor IP-core for satellite images.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Jefferson Daniel de Barros Soldera, Julio Cesar Saldana, Cesar Giacomini Penteado, Hugo Daniel Hernández, Raul Acosta Hernandez, Fernando Chavez Porras, Marcos A. Valerio, Angelica dos Anjos, Paulo H. Trevisan	On-chip 4to20mA reconfigurable current loop transmitter for smart sensor applications.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Ygo N. Batista, Cristiano C. de Araújo, Abel G. Silva-Filho	FPGA design for real time flaw detection on edges using the LEDges technique.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Ricardo Vanni Dallasen, Gilson Inácio Wirth, Thiago Hanna Both	A PLL for clock generation with automatic frequency control under TID effects.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Seyed-Hosein Attarzadeh-Niaki, Gilmar S. Beserra, Nikolaj Andersen, Mathias Verdon, Ingo Sander	Heterogeneous system-level modeling for small and medium enterprises.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Renato Coral Sampaio, Pedro de Azevedo Berger, Ricardo Pezzuol Jacobi	Hardware and software co-design for the AAC audio decoder.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Tuhina Samanta, Hafizur Rahaman 0001, Parthasarathi Dasgupta	Partitioning-based wirelength estimation technique for Y-routing.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Sophie Drean, Nathalie Deltimple, Eric Kerherve, Baudouin Martineau, Didier Belot	A 65nm CMOS 60 GHz class F-E power amplifier for WPAN applications.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Hugo Daniel Hernández, Jonathan Scott, Wilhelmus A. M. Van Noije	DPA insensitive voltage regulator for contact smart cards.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Felipe S. Marranghello, André Inácio Reis, Renato P. Ribas	Design-oriented delay model for CMOS inverter.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Paulo Sérgio B. do Nascimento, Francisco A. S. Neves, Helber E. P. de Souza, Marco A. O. Domingues	FPGA design methodology for DSP industrial applications - A case study of a three-phase positive-sequence detector.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Abdulaziz Alhussien, Nader Bagherzadeh, Freek Verbeek, Bernard van Gastel, Julien Schmaltz	A formally verified deadlock-free routing function in a fault-tolerant NoC architecture.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Jefferson B. D. Soldera, Michael Todd Berens, Alfredo Olmos	A temperature compensated CMOS relaxation oscillator for low power applications.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Cristiano Santos, Ricardo Reis 0001, Guilherme Godoi, Marcos Barros, Fabio Duarte	Multi-bit flip-flop usage impact on physical synthesis.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Fernanda D. V. R. Oliveira, Hugo de Lemos Haas, José Gabriel Rodríguez Carneiro Gomes, Antonio Petraglia	Current-mode analog integrated circuit for focal-plane image compression.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Omer Malik, Ahmed Hemani	A pragma based approach for mapping MATLAB applications on a coarse grained reconfigurable architecture.	SBCCI	2012	DBLP DOI BibTeX RDF
1		25th Symposium on Integrated Circuits and Systems Design, SBCCI 2012, Brasilia, Brazil, August 30 - September 2, 2012	SBCCI	2012	DBLP BibTeX RDF
1	Frank Sill Torres, Rodrigo Possamai Bastos	Robust modular Bulk Built-in Current Sensors for detection of transient faults.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Yan Ghidini, Thais Webber, Edson I. Moreno, Ivan Quadros, Rubem Dutra Ribeiro Fagundes, César A. M. Marcon	Topological impact on latency and throughput: 2D versus 3D NoC comparison.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Bo Huang, Song Chen 0001, Wei Zhong, Takeshi Yoshimura	Application-Specific Network-on-Chip synthesis with topology-aware floorplanning.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Heiner Alarcon Cubas, Joao Navarro Soares Jr.	Top-down design for Low power Multi-bit Sigma-Delta Modulator.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum	Hybrid-on-chip communication architecture for dynamic MP-SoC protection.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Everson Martins, Matheus A. Alejandro, Thais V. Fogaca	Differential mixer with NMOS/PMOS stack at switching stage.	SBCCI	2012	DBLP DOI BibTeX RDF
1	Saulo Finco, Wilmar Bueno de Moraes, Cristian O. Hamanaka, Claudionor Pereira Santos, José Carlos da Silva 0002, Ricardo Maltione	Linear AGC for conditioning applications with adaptive time constant and frequency dependency.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Luciano Ost, Marcelo Mandelli, Gabriel Marchesan Almeida, Leandro Soares Indrusiak, Leandro Möller, Manfred Glesner, Gilles Sassatelli, Michel Robert, Fernando Moraes 0001	Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework.	SBCCI	2011	DBLP DOI BibTeX RDF
1	José Rodrigo Azambuja, Samuel Pagliarini, Maurício Altieri, Fernanda Lima Kastensmidt, Michael Hübner 0001, Jürgen Becker 0001	Using dynamic partial reconfiguration to detect sees in microprocessors through non-intrusive hybrid technique.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, Jiang Chau Wang, Marius Strum	Dynamic NoC-based architecture for MPSoC security implementation.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Antonio Carlos Cavalcanti, Elmar U. K. Melcher, Jürgen Becker 0001 (eds.)	24th Symposium on Integrated Circuits and Systems Design, SBCCI '11, João Pessoa, Brazil, August 30 - September 2, 2011	SBCCI	2011	DBLP BibTeX RDF
1	Jones Yudi Mori, Daniel M. Muñoz Arboleda, Janier Arias-Garcia, Carlos Humberto Llanos Quintero, Jose M. Motta	FPGA-based image processing for omnidirectional vision on mobile robots.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Alexandre M. Amory, Cristiano Lazzari, Marcelo Lubaszewski, Fernando Gehm Moraes	Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Claudius Feger	Packaging issues for 22nm and beyond.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Alba Sandyra Bezerra Lopes, Ivan Saraiva Silva, Luciano Volcan Agostini	An efficient memory hierarchy for full search motion estimation on high definition digital videos.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Tales Marchesan Chaves, Everton Alceu Carara, Fernando Gehm Moraes	Energy-efficient cache coherence protocol for NoC-based MPSoCs.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Renato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov	Ring oscillators for functional and delay test of latches and flip-flops.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Fernando Paixão Cortes, Rafael Schmidt, Laurent Courcelle, Murilo Pilon Pessatti	Low-frequency passive RFID systems implementation in CMOS technology: design considerations and tradeoffs.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Bruno O. Prado, Edna Barros, Thiago Figueiredo, Andre Aziz	HdSC: a fast and preemptive modeling for on host HdS development.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Marcelo Mandelli, Alexandre M. Amory, Luciano Ost, Fernando Gehm Moraes	Multi-task dynamic mapping onto NoC-based MPSoCs.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Vinicius S. Livramento, Bruno George de Moraes, Brunno Abner Machado, José Luís Almada Güntzel	An energy-efficient FDCT/IDCT configurable IP core for mobile multimedia platforms.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Guilherme Flach, Marcelo O. Johann, Ricardo Reis 0001	Quadratic placement with single-iteration linear system solver.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Vinicius Torres dos Reis, Ilan Schnitman Souza	A 65nm VLSI implementation for the LTE turbo decoder.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Purushothaman Srinivasan	Noise and reliability in advanced CMOS devices for low power applications.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Matthias Kühnle, André Wagner, Jürgen Becker 0001	A statistical power estimation methodology embedded in a SystemC code translator.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Raymond Quéré	Key issues for the design of high power RF amplifiers.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Marcelo Schiavon Porto, Gustavo Sanchez, Diego Noble, Luciano Volcan Agostini, Sergio Bampi	An efficient ME architecture for high definition videos using the new MPDS algorithm.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Anelise Kologeski, Caroline Concatto, Fernanda Lima Kastensmidt, Luigi Carro	AdNoC case-study for Mpeg4 benchmark: improving performance and saving energy with an adaptive NoC.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Flávio Queiroz de Souza, Nobuo Oki	Bandgap voltage reference with low susceptibility to electromagnetic interference (EMI).	SBCCI	2011	DBLP DOI BibTeX RDF
1	Angelo G. da Luz, Eduardo A. C. da Costa, Marilton S. de Aguiar	Exploring the use of heuristic-based algorithms for the ordering and partitioning of coefficients for power efficient fir filters realization.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Ricardo Almeida Araújo da Silva, Ana Isabela Araújo Cunha, Luciana Martinez	Optimized sizing of analog circuits using the interior-point method for nonconvex nonlinear functions under MATLAB.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Vinícius Dal Bem, Paulo F. Butzen, Carlos Eduardo Klock, Vinicius Callegaro, André Inácio Reis, Renato P. Ribas	Area impact analysis of via-configurable regular fabric for digital integrated circuit design.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Daniel Eduardo Silva Piovani, Márcio Cherem Schneider	Design of a temperature-compensated voltage reference based on the MOSFET threshold voltage.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Jose Lasa, Alfredo Arnaud, Joel Gak, Matías R. Miguez	On the design of micro power practical GmC filters for biomedical applications.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Augusto Ronchini Ximenes, Jacobus W. Swart	A CMOS continuous variable gain low-noise amplifier(LNA) for WLAN applications.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Alexander Thomas, Michael Rückauer, Jürgen Becker 0001	HoneyComb: an application-driven online adaptive reconfigurable hardware architecture.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Thiago R. da Rosa, Guilherme Montez Guindani, Douglas de O. Cardoso, Ney Laert Vilar Calazans, Fernando Gehm Moraes	A self-adaptable distributed DFS scheme for NoC-based MPSoCs.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Christoph Roth, Oliver Sander, Jürgen Becker 0001	Flexible and efficient co-simulation of networked embedded devices.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Wilmar Carvajal Ossa, Wilhelmus A. M. Van Noije	Time-interleaved pipeline ADC design: a reconfigurable approach supported by optimization.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Daniel Palomino 0001, Guilherme Corrêa 0001, Cláudio Machado Diniz, Sergio Bampi, Luciano Volcan Agostini, Altamiro Amadeu Susin	Algorithm and hardware design of a fast intra-frame mode decision module for h.264/AVC encoders.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Sandro A. P. Haddad, Ivan Nascimento	A high-speed low-power CMOS comparator using auto-zero offset cancellation technique.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Ronaldo Husemann, Altamiro Amadeu Susin, Valter Roesler, José Valdeni de Lima	Efficient hardware solution for practical intra h.264/SVC video encoder implementation.	SBCCI	2011	DBLP DOI BibTeX RDF
1	André Borin Soares, Alexsandro Cristovão Bonatto, Altamiro Amadeu Susin	Integration issues on the development of an h.264/AVC video decoder SoC for SBTVD set top box.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Fabricio G. S. Silva, Robson Nunes de Lima, Samy M. Nascimento, Raimundo Carlos Silvério Freire	A concurrent dualband distributed impedance-matching network.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Daniel Pasti Mioni, William Prodanov, Pedro Miguel Luis Aboim, Paulo Augusto Dal Fabbro, Murilo Pilon Pessatti	An ultra low power low voltage linear PMU for portable applications.	SBCCI	2011	DBLP DOI BibTeX RDF
1	João Navarro Jr., Gustavo Campos Martins	Design of high speed digital circuits with E-TSPC cell library.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Felipe S. Marranghello, Vinícius Dal Bem, André Inácio Reis, Francesc Moll, Renato P. Ribas	Transistor sizing in lithography-aware regular fabrics.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Tiago Oliveira Weber, Wilhelmus A. M. Van Noije	Analog design synthesis method using simulated annealing and particle swarm optimization.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Daniel P. Volpato, Alexandre Keunecke Ignácio Mendonça, José Luís Almada Güntzel, Luiz Cláudio Villar dos Santos	Cache-tuning-aware scratchpad allocation from binaries.	SBCCI	2011	DBLP DOI BibTeX RDF
1	Denis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner	On evaluating the signal reliability of self-checking arithmetic circuits.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Thaísa Leal da Silva, Luís Alberto da Silva Cruz, Luciano Volcan Agostini	A novel macroblock-level filtering upsampling architecture for H.264/AVC scalable extension.	SBCCI	2010	DBLP DOI BibTeX RDF
1	Shaahin Haddadi Nejad, Ziaaddin Daie Kouzekanani, Jafar Sobhi, Iman Salami Fard, Kuresh Ghanbari	A high speed, highly linear CMOS fully differential track and hold circuit.	SBCCI	2010	DBLP DOI BibTeX RDF

Publications at "SBCCI"( http://dblp.L3S.de/Venues/SBCCI )