Search results for "SEU"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
13	Quming Zhou, Mihir R. Choudhury, Kartik Mohanram	Design Optimization for Robustness to Single Event Upsets.	VTS	2006	DBLP DOI BibTeX RDF
13	Navid Azizi, Farid N. Najm	A family of cells to reduce the soft-error-rate in ternary-CAM.	DAC	2006	DBLP DOI BibTeX RDF	soft-error rate, content-addressable memory
13	Abdelaziz Ammari, K. Hadjiat, Régis Leveugle	Combined Fault Classification and Error Propagation Analysis to Refine RT-Level Dependability Evaluation.	J. Electron. Test.	2005	DBLP DOI BibTeX RDF	RT-level VHDL, 8051, fault injection, VLSI design, dependability analysis, digital circuits
13	Marco Ottavi, Luca Schiano, Fabrizio Lombardi, Salvatore Pontarelli, Gian Carlo Cardarilli	Evaluating the Data Integrity of Memory Systems by Configurable Markov Models.	ISVLSI	2005	DBLP DOI BibTeX RDF
13	Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano	On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories.	DATE	2005	DBLP DOI BibTeX RDF
13	Carlos Arthur Lang Lisbôa, Erik Schüler, Luigi Carro	Going beyond TMR for protection against multiple faults.	SBCCI	2005	DBLP DOI BibTeX RDF	future technologies, simultaneous transient faults, fault tolerance, design techniques
13	Monica Alderighi, A. Candelori, Fabio Casini, Sergio D'Angelo, Marcello Mancini, Alessandro Paccagnella, Sandro Pastore, Giacomo R. Sechi	Heavy Ion Effects on Configuration Logic of Virtex FPGAs.	IOLTS	2005	DBLP DOI BibTeX RDF
13	Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano	A Self Checking Reed Solomon Encoder: Design and Analysis.	DFT	2005	DBLP DOI BibTeX RDF
13	Teng Ma, Junzhou Luo	Optimizing Large File Transfer on Data Grid.	GCC	2005	DBLP DOI BibTeX RDF
13	Abdelaziz Ammari, K. Hadjiat, Régis Leveugle	On Combining Fault Classification and Error Propagation Analysis in RT-Level Dependability Evaluation.	IOLTS	2004	DBLP DOI BibTeX RDF
13	Daniel Barros Jr., Fabian Vargas 0001, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001	Modeling and Simulation of Time Domain Faults in Digital Systems.	IOLTS	2004	DBLP DOI BibTeX RDF
13	Carlos Arthur Lang Lisbôa, Luigi Carro	Arithmetic Operators Robust to Multiple Simultaneous Upsets.	DFT	2004	DBLP DOI BibTeX RDF
13	Ghazanfar Asadi, Seyed Ghassem Miremadi, Hamid R. Zarandi, Ali Reza Ejlali	Evaluation of Fault-Tolerant Designs Implemented on SRAM-Based FPGAs.	PRDC	2004	DBLP DOI BibTeX RDF
13	Gian Carlo Cardarilli, A. Leandri, P. Marinucci, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano	Design of a fault tolerant solid state mass memory.	IEEE Trans. Reliab.	2003	DBLP DOI BibTeX RDF
13	Régis Leveugle, K. Hadjiat	Multi-Level Fault Injections in VHDL Descriptions: Alternative Approaches and Experiments.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	VHDL, fault injection, VLSI design, dependability analysis, digital circuits
13	Gloria Gonzales-Dholakia	Computing competencies: ensuring student success.	SIGUCCS	2003	DBLP DOI BibTeX RDF	Knowles' Andragogy Theory, andragogy assumptions, computer competency, constructivist theory, computer education, online training, computer training
13	André K. Nieuwland, Richard P. Kleihorst	The positive effect on IC yield of embedded Fault Tolerance for SEUs.	IOLTS	2003	DBLP DOI BibTeX RDF
13	Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto	A Watchdog Processor to Detect Data and Control Flow Errors.	IOLTS	2003	DBLP DOI BibTeX RDF
13	Régis Leveugle, K. Hadjiat	Multi-Level Fault Injection Experiments Based on VHDL Descriptions: A Case Study.	IOLTW	2002	DBLP DOI BibTeX RDF	VHDL, fault injection, VLSI design, dependability analysis
13	Akihiko Machizawa, Kazunori Sugiura, Takahiro Komine, Haruo Okazawa, Shin-ichi Nakagawa	On the Delay and Quality of DV Transmission Systems Using ATM Networks.	ICOIN	2001	DBLP DOI BibTeX RDF
13	Fannie Chen, Loring Craymer, Jeff Deifik, Alvin J. Fogel, Daniel S. Katz, Alfred G. Silliman Jr., Raphael R. Some, Sean A. Upchurch, Keith Whisnant	Demonstration of the Remote Exploration and Experimentation (REE) Fault-Tolerant Parallel-Processing Supercomputer for Spacecraft Onboard Scientific Data Processing.	DSN	2000	DBLP DOI BibTeX RDF	Application-Based Fault Tolerance, Fault-Tolerant, Parallel-Processing, MPI, Fault Injection, Software-Implemented Fault Tolerance
13	Fabian Vargas 0001, Alexandre M. Amory, Raoul Velazco	Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL.	IOLTW	2000	DBLP DOI BibTeX RDF
13	Monica Alderighi, Sergio D'Angelo, Giacomo R. Sechi, Vincenzo Piuri	Implementing a Self-Checking Neural System for Photon Event Identification by SRAM-Based FPGAs.	DFT	1999	DBLP DOI BibTeX RDF	Self-checking systems, Field Programmable Gate Arrays, Artificial neural networks, Space applications
13	Rolf Johansson 0002	On Single Event Upset Error Manifestation.	EDCC	1994	DBLP DOI BibTeX RDF