Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Hao-Yu Yang, Shih-Hua Kuo, Tzu-Hsuan Huang, Chi-Hung Chen, Chris Lin, Mango Chia-Tso Chao |
Random pattern generation for post-silicon validation of DDR3 SDRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Manuel J. Barragán, Gildas Léger, Florence Azaïs, Ronald D. Blanton, Adit D. Singh, Stephen Sunter |
Special session: Hot topics: Statistical test methods. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-2, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Xuanle Ren, Mitchell Martin, Ronald D. Blanton |
Improving accuracy of on-chip diagnosis via incremental learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ran Wang 0002, Guoliang Li 0004, Rui Li 0084, Jun Qian, Krishnendu Chakrabarty |
ExTest scheduling for 2.5D system-on-chip integrated circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mehdi Sadi, LeRoy Winemberg, Mark M. Tehranipoor |
A robust digital sensor IP and sensor insertion flow for in-situ path timing slack monitoring in SoCs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Rajit Karmakar, Aditya Agarwal, Santanu Chattopadhyay |
Testing of 3D-stacked ICs with hard- and soft-dies - a Particle Swarm Optimization based approach. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Li Xu, Yan Duan, Degang Chen 0001 |
A low cost jitter separation and characterization method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-5, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Nathan DeBardeleben, Sean Blanchard, David R. Kaeli, Paolo Rech |
Field, experimental, and analytical data on large-scale HPC systems and evaluation of the implications for exascale system design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-2, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sule Ozev, Linda Milor |
Panel: Analog/RF BIST: Are we there yet? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sreekumar Vadakke Kodakara, Mehul V. Sagar, Joel Yuen |
Extracting effective functional tests from commercial programs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Andres F. Gomez, Leticia B. Poehls, Fabian Vargas 0001, Víctor H. Champac |
An early prediction methodology for aging sensor insertion to assure safe circuit operation due to NBTI aging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Shahrzad Mirkhani, Balavinayagam Samynathan, Jacob A. Abraham |
In-depth soft error vulnerability analysis using synthetic benchmarks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Mike Ricchetti |
Innovative practices session 3C: Advances in silicon debug & diagnosis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sushmita Kadiyala Rao, Bharath Shivashankar, Ryan W. Robucci, Nilanjan Banerjee, Chintan Patel |
Scalability study of PSANDE: Power supply analysis for noise and delay estimation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Claude Thibeault |
Foreword. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Michele Portolan, K. Huang |
Special session 8C: E.J. McCluskey doctoral thesis award semi-final. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-2, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Sreekumar V. Kodakara, Suriya Natarajan |
Special session 12B: Panel: IOT - Reliable? Secure? Or death by a billion cuts? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Halil Kukner, Pieter Weckx, Praveen Raghavan, Francky Catthoor |
Integral impact of BTI and voltage temperature variation on SRAM sense amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Reza Sharafinejad, Bijan Alizadeh, Masahiro Fujita |
UPF-based formal verification of low power techniques in modern processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Rob Aitken, Ethan H. Cannon, Mondira Pant, Mehdi Baradaran Tahoori |
Resiliency challenges in sub-10nm technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
A definition of the number of detections for faults with single tests in a compact scan-based test set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Paul Tracey |
Innovative practices session 1C: New technologies, new challenges - 1 [3 presentations]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Janusz Rajski, Nilanjan Mukherjee 0001 |
Innovative practices session 11C: Advanced scan methodologies [3 presentations]. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Kai Hu 0003, Bhargab B. Bhattacharya, Krishnendu Chakrabarty |
Fault diagnosis for flow-based microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Test vector omission with minimal sets of simulated faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Chang Hao, Huaguo Liang |
Pulse shrinkage based pre-bond through silicon vias test in 3D IC. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Jennifer Dworak, Al Crouch |
A call to action: Securing IEEE 1687 and the need for an IEEE test Security Standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | |
33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015 ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![IEEE Computer Society, 978-1-4799-7597-6 The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP BibTeX RDF |
|
1 | Fengchao Zhang, Andrew Hennessy, Swarup Bhunia |
Robust counterfeit PCB detection exploiting intrinsic trace impedance variations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Anthony Coyette, Baris Esen, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen |
Automated testing of mixed-signal integrated circuits by topology modification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Christopher Jaress, Philip Brisk, Daniel T. Grissom |
Rapid online fault recovery for cyber-physical digital microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Valeria Bertacco |
Panel: When will the cost of dependability end innovation in computer design? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Test compaction by test cube merging for four-way bridging faults. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Dominique Drouin, Mohamed Amine-Bounouar, Gabriel Droulers, M. Labalette, Michel Pioro-Ladriere, A. Souifi, Serge Ecoffey |
3D microelectronic with BEOL compatible devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Fatemeh Refan, Bijan Alizadeh, Zainalabedin Navabi |
Signature oriented model pruning to facilitate multi-threaded processors debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Andreas Riefert, Matthias Sauer 0002, Sudhakar M. Reddy, Bernd Becker 0001 |
Improving diagnosis resolution of a fault detection test set. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Tao Chen 0006, Degang Chen 0001 |
Ultrafast stimulus error removal algorithm for ADC linearity test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-5, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Yankin Tanurhan |
Keynote address: New opportunities in the internet of things. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Woongrae Kim, Chang-Chih Chen, Soonyoung Cha, Linda Milor |
MBIST and statistical hypothesis test for time dependent dielectric breakdowns due to GOBD vs. BTDDB in an SRAM array. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Richun Fei, Jocelyn Moreau, Salvador Mir, Alexis Marcellin, C. Mandier, E. Huss, G. Palmigiani, P. Vitrou, Thomas Droniou |
Horizontal-FPN fault coverage improvement in production test of CMOS imagers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Suriya Natarajan |
Innovative practices session 7C: Mixed signal test and debug. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Navankur Beohar, Priyanka Bakliwal, Sidhanto Roy, Debashis Mandal, Philippe Adell, Bert Vermeire, Bertan Bakkaloglu, Sule Ozev |
Disturbance-free BIST for loop characterization of DC-DC buck converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Harry H. Chen, Shih-Hua Kuo, Jonathan Tung, Mango Chia-Tso Chao |
Statistical techniques for predicting system-level failure using stress-test data. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Hsunwei Hsiung, Sandeep K. Gupta 0001 |
A multi-layered methodology for defect-tolerance of datapath modules in processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Michael Nicolaidis, Panagiota Papavramidou |
Memory repair for high defect densities. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Improving the accuracy of defect diagnosis by considering reduced diagnostic information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | M. Enamul Amyeen |
Innovative practices session 5C: Advancements in test -keeping moore moving! ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Xian Wang 0003, Debashis Banerjee, Abhijit Chatterjee |
Low cost high frequency signal synthesis: Application to RF channel interference testing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Da Cheng, Sandeep K. Gupta 0001 |
PPB: Partially-working processors binning for maximizing wafer utilization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Doohwang Chang, Bertan Bakkaloglu, Sule Ozev |
Enabling unauthorized RF transmission below noise floor with no detectable impact on primary communication performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-4, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Ben Niewenhuis, Ronald D. Blanton |
Efficient built-in self test of regular logic characterization vehicles. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Kelson Gent, Michael S. Hsiao |
Abstraction-based relation mining for functional test generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, CA, USA, April 27-29, 2015, pp. 1-6, 2015, IEEE Computer Society, 978-1-4799-7597-6. The full citation details ...](Pics/full.jpeg) |
2015 |
DBLP DOI BibTeX RDF |
|
1 | Tao Liu, Chao Fu, Sule Ozev, Bertan Bakkaloglu |
A built-in self-test technique for load inductance and lossless current sensing of DC-DC converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Charutosh Dixit, Ramesh C. Tekumalla, Wei Zhao, Nilanjan Mukherjee 0001, Vivek Chickermane |
Innovative practices session 1C: Existing/emerging low power techniques. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Anne Gattiker |
Unstructured text: Test analysis techniques applied to non-test problems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-4, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Hao-Yu Yang, Chen-Wei Lin, Chao-Ying Huang, Ching-Ho Lu, Chen-An Lai, Mango Chia-Tso Chao, Rei-Fu Huang |
Testing methods for a write-assist disturbance-free dual-port SRAM. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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1 | Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen |
Quality versus cost analysis for 3D Stacked ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Hakim Zimouche |
Built-in self-test for manufacturing TSV defects before bonding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Manolis Kaliorakis, Mihalis Psarakis, Nikos Foutris, Dimitris Gizopoulos |
Accelerated online error detection in many-core microprocessor architectures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Pasquale Ranone, Giovanna Turvani, Fabrizio Riente, Mariagrazia Graziano, Massimo Ruo Roch, Maurizio Zamboni |
Fault tolerant nanoarray circuits: Automatic design and verification. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Cheng-Hung Wu, Kuen-Jong Lee, Wei-Cheng Lien |
An efficient diagnosis method to deal with multiple fault-pairs simultaneously using a single circuit model. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Lu Wang, Xutao Wang, Milad Maleki, Bao Liu 0001 |
Power/ground supply voltage variation-aware delay test pattern generation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Thomas Moon, Hyun Woo Choi, David C. Keezer, Abhijit Chatterjee |
Multi-channel testing architecture for high-speed eye-diagram using pin electronics and subsampling monobit reconstruction algorithms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Yongquan Fan, Anant Verma, David S. Trager, Ramin K. Poorfard, John Janney, Sandeep Kumar |
Accelerating capture of infrequent errors on ATE for silicon TV tuners. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Ran Wang 0002, Krishnendu Chakrabarty, Sudipta Bhawmik |
At-speed interconnect testing and test-path optimization for 2.5D ICs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Suriya Natarajan, Amitava Majumdar 0002, Jeyavijayan Rajendran |
Hot topic session 9C: Test and fault tolerance for emerging memory technologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Tengteng Zhang, Duncan M. Hank Walker |
Improved power supply noise control for pseudo functional test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Gurgen Harutyunyan, Grigor Tshagharyan, Valery A. Vardanian, Yervant Zorian |
Fault modeling and test algorithm creation strategy for FinFET-based memories. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Chao Han, Adit D. Singh |
Improving CMOS open defect coverage using hazard activated tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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1 | Ping-Lin Yang, Cheng-Chung Lin, Ming-Zhang Kuo, Sang-Hoo Dhong, Chien-Min Lin, Kevin Huang 0005, Ching-Nen Peng, Min-Jer Wang |
A 4-GHz universal high-frequency on-chip testing platform for IP validation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Kai Hu 0003, Tsung-Yi Ho, Krishnendu Chakrabarty |
Test generation and design-for-testability for flow-based mVLSI microfluidic biochips. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Yen-Tzu Lin, Brady Benware, Brian Stine, Azeez Bhavnagarwala |
Innovative practices session 2C: Advanced in yield learning. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Abhishek Basak, Yu Zheng 0011, Swarup Bhunia |
Active defense against counterfeiting attacks through robust antifuse-based on-chip locks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Allan Ecker, Mani Soma |
A method for phase noise extraction from data communication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Jennifer Dworak |
Special session 4A: Elevator talks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Sule Ozev, Bertan Bakkaloglu |
Special session 4B: Panel: Testing and calibration for power management circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Ya-Ru Wu, Yi-Keng Hsieh, Po-Chih Ku, Liang-Hung Lu |
A built-in gain calibration technique for RF low-noise amplifiers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Mukesh Agrawal 0001, Krishnendu Chakrabarty |
Test-time optimization in NOC-based manycore SOCs using multicast routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Michele Portolan, Michail Maniatakos |
Special session 8A: E.J. McCluskey Doctoral Thesis Award semi-final. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Abdulazim Amouri, Jochen Hepp, Mehdi Baradaran Tahoori |
Self-heating thermal-aware testing of FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Alodeep Sanyal, Yanjing Li, Yervant Zorian |
Special session 12C: Young professionals in test - Town meeting. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Jae Woong Jeong, Sule Ozev, Friedrich Taenzler, Hui-Chuan Chao |
Development and empirical verification of an accuracy model for the power down leakage tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Jifeng Chen, LeRoy Winemberg, Mohammad Tehranipoor |
Identification of testable representative paths for low-cost verification of circuit performance during manufacturing and in-field tests. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Irith Pomeranz |
Fault simulation with test switching for static test compaction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | John Kim, Wolfgang Meyer, T. M. Mak, Amitava Majumdar 0002 |
Innovative practices session 3C: Solving today's test challenges. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Fangming Ye, Farshad Firouzi, Yang Yang, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori |
On-chip voltage-droop prediction using support-vector machines. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Mohamed Metwally, Nicholai L'Esperance, Tian Xia 0005, Mustapha Slamani |
Continuous wave radar circuitry testing using OFDM technique. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Zhiqiang Liu, You Li 0002, Randall L. Geiger, Degang Chen 0001 |
Auto-identification of positive feedback loops in multi-state vulnerable circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-5, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Xian Wang 0003, Blanchard Kenfack, Estella Silva, Abhijit Chatterjee |
Alternative "safe" test of hysteretic power converters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Terri S. Fiez, Mike Peng Li |
Special session 8C: Hot topic: Designers' and test researchers' roles in analog design-for-test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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1 | |
32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014 ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![IEEE Computer Society, 978-1-4799-2611-4 The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP BibTeX RDF |
|
1 | John M. Carulli |
Special session 11B: ITRS adaptive test update. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Franco Stellari, Peilin Song, Herschel A. Ainspan |
Functional block extraction for hardware security detection using time-integrated and time-resolved emission measurements. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Sen-Wen Hsiao, Chung-Chun Chen, Randy Caplan, Jeff Galloway, Blake Gray, Abhijit Chatterjee |
Phase-locked loop design with SPO detection and charge pump trimming for reference spur suppression. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Dean Collins, Ramesh Karri |
Hot topic session 12A: Split manufacturing - IARPA's TIC program. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-2, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Stephen K. Sunter, Steve Comen, Paul Berndt, Ram Rajamani |
Innovative practices session 7C: Reduced pin-count testing - How low can we go? ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Bozena Kaminska, Bernard Courtois, Mary Ann Maher |
New topic session 7B: Challenges and opportunities in test and design for test (DFT) of MEMS sensors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Sabyasachi Deyati, Barry John Muldrey, Aritra Banerjee, Abhijit Chatterjee |
Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Sounil Biswas, John M. Carulli, Dragoljub Gagi Drmanac, Arpan Bhattacherjee |
Innovative practices session 5C: Machine learning and data analysis in test. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
|
1 | Woongrae Kim, Linda Milor |
Built-in self test methodology for diagnosis of backend wearout mechanisms in SRAM cells. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 32nd IEEE VLSI Test Symposium, VTS 2014, Napa, CA, USA, April 13-17, 2014, pp. 1-6, 2014, IEEE Computer Society, 978-1-4799-2611-4. The full citation details ...](Pics/full.jpeg) |
2014 |
DBLP DOI BibTeX RDF |
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