Search results for "cpu"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
15	Kimming So, Rudolph N. Rechtschaffen	Cache Operations by MRU Change.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	MRU change, most recently used, prefetch algorithms, performance evaluation, performance, storage management, CPU, content-addressable storage, virtual storage, replacement algorithms, memory access, cache simulation, set associative caches
14	Hayden Kwok-Hay So, Junying Chen, Billy Y. S. Yiu, Alfred C. H. Yu	Medical Ultrasound Imaging: To GPU or Not to GPU?	IEEE Micro	2011	DBLP DOI BibTeX RDF	medical ultrasound imaging, hybrid CPU-GPU, SA imaging, performance, GPU, power, synthetic aperture
14	Martin Weigel 0002	The GPU Revolution at Work [review of "GPU Computing Gems: Emerald Edition" (Hwu, W.-m.W., Ed; 2011)].	Comput. Sci. Eng.	2011	DBLP DOI BibTeX RDF	hybrid CPU/GPU systems, applications, Graphics processing units, GPU, high-performance computing, scientific computing, GPGPU
14	Chun-Yi Shih, Ming-Chih Li, Chao-Sheng Lin, Pao-Ann Hsiung, Chih-Hung Chang, William C. Chu, Nien-Lin Hsueh, Chihhsiong Shih, Chao-Tung Yang, Chorng-Shiuh Koong	Adaptive Performance Monitoring for Embedded Multicore Systems.	ICPP Workshops	2011	DBLP DOI BibTeX RDF	embedded multicore system, monitor overhead, IO/CPU-bound task, monitor accuracy, monitor immediacy
14	John Nickolls, William J. Dally	The GPU Computing Era.	IEEE Micro	2010	DBLP DOI BibTeX RDF	scalable parallel computing, heterogeneous CPU+GPU coprocessing, Tesla GPU architecture, Fermi GPU architecture, NVIDIA, CUDA, GPU computing
14	Francesc Alted	Why Modern CPUs Are Starving and What Can Be Done about It.	Comput. Sci. Eng.	2010	DBLP DOI BibTeX RDF	CPU performance, memory speed, I/O bottleneck, multlicore computing, processor speed
14	Jiao-fang Shi, Jian Wang	On Chip Temperature Sensors' Layout for Future Thermal Management.	MVHI	2010	DBLP DOI BibTeX RDF	CPU chip, management, sensor, layout, temperature
14	Adarsh Krishnamurthy, Sara McMains	Accurate moment computation using the GPU.	Symposium on Solid and Physical Modeling	2010	DBLP DOI BibTeX RDF	hybrid CPU/GPU algorithms, GPU, NURBS, moments, geometric algorithms, volume
14	Pascal Junod, Marco Macchetti	Revisiting the IDEA Philosophy.	FSE	2009	DBLP DOI BibTeX RDF	IDEA block cipher, WIDEA compression function, Intel Core2 CPU, wordslice implementation
14	Camillo Bruni, Toon Verwaest	PyGirl: Generating Whole-System VMs from High-Level Prototypes Using PyPy.	TOOLS (47)	2009	DBLP DOI BibTeX RDF	PyPy, RPython, whole-system virtual machine, translation toolchain, compile-time meta-programming Game Boy, 8-bit CPU, Python, high-level language
14	Franz Franchetti, Frédéric de Mesmay, Daniel S. McFarlin, Markus Püschel	Operator Language: A Program Generation Framework for Fast Kernels.	DSL	2009	DBLP DOI BibTeX RDF	Library generation, high performance software, multicore CPU, program generation, automatic performance tuning
14	Adarsh Krishnamurthy, Sara McMains, Kirk Haller	Accelerating geometric queries using the GPU.	Symposium on Solid and Physical Modeling	2009	DBLP DOI BibTeX RDF	clearance analysis, hybrid CPU/GPU algorithms, silhouette curves, GPU, NURBS, minimum distance, closest point
14	Di Xie, Ruofeng Tong 0001, Hongsen Wu	Multi-channel video-based parallel fire detection acceleration method using multi-cores.	ICIS	2009	DBLP DOI BibTeX RDF	CPU acceleration, fire detection, parallelization, wavelet transform, Fourier transform
14	Lanjia Wang, Hai-Xin Duan, Xing Li 0001	Dynamic emulation based modeling and detection of polymorphic shellcode at the network level.	Sci. China Ser. F Inf. Sci.	2008	DBLP DOI BibTeX RDF	polymorphic shellcode, CPU emulation, intrusion detection
14	Selim Gurun, Chandra Krintz, Richard Wolski	NWSLite: A general-purpose, nonparametric prediction utility for embedded systems.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	CPU availability estimation, network performance estimation, embedded systems, prediction algorithms, Computation offloading
14	Kenneth Holmström	An adaptive radial basis algorithm (ARBF) for expensive black-box global optimization.	J. Glob. Optim.	2008	DBLP DOI BibTeX RDF	Expensive function, CPU-intensive, Costly function, Derivative-free, Software, Global optimization, Radial basis functions, Splines, Black-box, Surrogate model, Response surface, Response surface, Nonconvex, Mixed-integer
14	Mehmet H. Suzer, Kyoung-Don Kang	Adaptive Fuzzy Control for Utilization Management.	ISORC	2008	DBLP DOI BibTeX RDF	CPU Utilization, Real-Time Systems, Adaptive Fuzzy Control
14	Abdullah Kayi, Edward Kornkven, Tarek A. El-Ghazawi, Gregory B. Newby	Application Performance Tuning for Clusters with ccNUMA Nodes.	CSE	2008	DBLP DOI BibTeX RDF	cpu affinity, high-performance computing, application performance, ccNUMA
14	Zeeshan Patoli, Michael Gkion, Abdullah Al-Barakati, Wei Zhang 0030, Paul F. Newbury, Martin White	How to Build an Open Source Render Farm Based on Desktop Grid Computing.	IMTIC	2008	DBLP DOI BibTeX RDF	CPU scavenging, Desktop Grid computing, Render farm, Blender Render Farm, Open Source
14	Alexander A. Moldovyan, Nick A. Moldovyan, Peter A. Moldovyanu	Architecture Types of the Bit Permutation Instruction for General Purpose Processors.	IF&GIS	2007	DBLP DOI BibTeX RDF	fast software encryption, controlled bit permutation, new CPU instruction, Cryptography
14	Hema Prem, N. R. Srinivasa Raghavan	A Support Vector Machine Based Approach for Forecasting of Network Weather Services.	J. Grid Comput.	2006	DBLP DOI BibTeX RDF	available CPU, network weather services, support vector machines, forecasting, performance metrics, network bandwidth
14	Xiaotong Zhuang, Santosh Pande	Effective thread management on network processors with compiler analysis.	LCTES	2006	DBLP DOI BibTeX RDF	real-time scheduling, compiler optimizations, network processors, CPU scheduling
14	Luca Necchi, Luciano Lavagno, Davide Pandini, Laura Vanzago	An ultra-low energy asynchronous processor for Wireless Sensor Networks.	ASYNC	2006	DBLP DOI BibTeX RDF	lowenergy, low EMI, AVR CPU, Wireless sensor networks, low-power, desynchronization
14	Ahmed Abdelkhalek 0002, Angelos Bilas, Andreas Moshovos	Behavior and Performance of Interactive Multi-Player Game Servers.	Clust. Comput.	2003	DBLP DOI BibTeX RDF	CPU event counters, scalability, benchmark, multi-player game, Quake
14	José Ignacio Gómez, Luis Piñuel, Manuel Prieto 0001, Francisco Tirado	Analysis of simulation-adapted SPEC 2000 benchmarks.	SIGARCH Comput. Archit. News	2002	DBLP DOI BibTeX RDF	Reduced input datasets, Spec CPU 2000, Execution-driven simulation, Fast-forwarding, Hardware counters
14	Nathan T. Slingerland, Alan Jay Smith	Cache performance for multimedia applications.	ICS	2001	DBLP DOI BibTeX RDF	CPU caches, mulitmedia, simulation, cache, trace driven simulation
14	Virginie Galtier, Kevin L. Mills, Yannick Carlinet, Stefan Leigh, Andrew L. Rukhin	Expressing meaningful processing requirements among heterogeneous nodes in an active network.	Workshop on Software and Performance	2000	DBLP DOI BibTeX RDF	CPU usage, resource management, active networks
14	David K. Y. Yau, Simon S. Lam	Migrating sockets-end system support for networking with quality of service guarantees.	IEEE/ACM Trans. Netw.	1998	DBLP DOI BibTeX RDF	bandwidth scheduling, packet demultiplexing, user level protocol, TCP/IP, quality of service guarantees, CPU scheduling
14	David K. Y. Yau, Simon S. Lam	Adaptive rate-controlled scheduling for multimedia applications.	IEEE/ACM Trans. Netw.	1997	DBLP DOI BibTeX RDF	adaptive rate control, end system support, rate reservation, QoS guarantee, continuous media, protocol processing, CPU scheduling
14	Paul F. Stelling, Vojin G. Oklobdzija	Implementing Multiply-Accumulate Operation in Multiplication Time.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	multiply-accumulate operation, multiplication time, optimal delays, instruction time, optimal multiply-accumulate circuit, RISC CPU, partial product reduction tree, final adder, digital signal processing, power savings, multiplying circuits, circuit design, VLSI circuits, parallel multiplier, processor performance, video applications, graphics applications, clock speed
14	Luddy Harrison	Examination of a Memory Access Classification Scheme for Pointer-Intensive and Numeric Programs.	International Conference on Supercomputing	1996	DBLP DOI BibTeX RDF	CPU architecture, instruction profiling, memory access pattern classification, memory latency tolerance, data cache
14	Shiyi Xu, Gercy P. Dias	Testability forecasting for sequential circuits.	Asian Test Symposium	1995	DBLP DOI BibTeX RDF	testability forecasting, transitive closure algorithm, number of test patterns, computational complexity, fault diagnosis, logic testing, logic testing, statistical analysis, design for testability, sequential circuits, sequential circuits, logic CAD, fault coverage, regression models, automatic test software, CPU time, test generation algorithms
14	Kun-Lung Wu, W. Kent Fuchs	Rapid Transaction-Undo Recovery Using Twin-Page Storage Management.	IEEE Trans. Software Eng.	1993	DBLP DOI BibTeX RDF	rapid transaction-undo recovery, twin-page storage management, aborted transaction identifiers, CPU overhead, database management systems, transaction processing, storage management, disk I/O, TWIST
14	Herman Lam, Chiang Lee, Stanley Y. W. Su	A Special Function Unit for Database Operations (SFU-DB): Design and Performance Evaluation.	IEEE Trans. Computers	1991	DBLP DOI BibTeX RDF	special function unit, SFU-DB, hardware sorting module, automatic retrieval memory, nonnumeric operations, host CPU, special processing unit, distribution-based sort algorithm, main memory size, fundamental sort algorithm, CMOS gate arrays, performance evaluation, performance evaluation, parallel algorithms, computational complexity, database management systems, sorting, execution time, coprocessor, special purpose computers, fabrication, worst case complexity, Turbo Pascal, parallel processing system, duplicates elimination, database operations, set intersection, set union, set difference, relational join
14	J. Richard Burke, Chienhua Chen, Tsung-Ying Lee, Dharma P. Agrawal	Performance Analysis of Single Stage Interconnection Networks.	IEEE Trans. Computers	1991	DBLP DOI BibTeX RDF	single stage interconnection networks, recirculation, analytical probability model, simulation, performance evaluation, routing, performance analysis, multiprocessor interconnection networks, queueing theory, conflict resolution, buffers, switches, processors, loading, CPU time
14	Arvin Park, Matthew K. Farrens	Address compression through base register caching.	MICRO	1990	DBLP BibTeX RDF	CPU performance, microprocessor systems, locality, bandwidth
14	Bohdan L. Bodnar, A. C. Liu	Modeling and Performance Analysis of Single-Bus Tightly-Coupled Multiprocessors.	IEEE Trans. Computers	1989	DBLP DOI BibTeX RDF	global performance metrics, single-bus tightly-coupled multiprocessors, hierarchical stochastic queuing model, single queue/server pair, probabilistic task migration, CPU sensitivity analysis, performance evaluation, modelling, performance analysis, shared memory, multiprocessing systems, processing elements
14	Keisuke Okamura, Yoshihiro Oyama	Load-based covert channels between Xen virtual machines.	SAC	2010	DBLP DOI BibTeX RDF	covert channels, virtual machine monitors
14	Nadathur Satish, Changkyu Kim, Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, Daehyun Kim 0001, Pradeep Dubey	Fast sort on CPUs and GPUs: a case for bandwidth oblivious SIMD sort.	SIGMOD Conference	2010	DBLP DOI BibTeX RDF	merge network, tlp, performance, databases, sorting, buffer, merge, many-core, simd, radix
14	Jin-Tai Yan, Chung-Wei Ke, Zhi-Wei Chen	Ordered escape routing via routability-driven pin assignment.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	pcb design, routability, escape routing, pin assignment
14	Rahul Garg 0003, José Nelson Amaral	Compiling Python to a hybrid execution environment.	GPGPU	2010	DBLP DOI BibTeX RDF
14	François Deliège, Torben Bach Pedersen	Position list word aligned hybrid: optimizing space and performance for compressed bitmaps.	EDBT	2010	DBLP DOI BibTeX RDF
14	Sander van der Maar, Kees Joost Batenburg, Jan Sijbers	Experiences with Cell-BE and GPU for Tomography.	SAMOS	2009	DBLP DOI BibTeX RDF
14	Efraim Rotem, Avi Mendelson, Ran Ginosar, Uri C. Weiser	Multiple clock and voltage domains for chip multi processors.	MICRO	2009	DBLP DOI BibTeX RDF	clock domains, voltage domain, power management, DVFS, chip multi processor
14	Bowen Zhang 0008, Cornelis W. Oosterlee	Option pricing with COS method on graphics processing units.	IPDPS	2009	DBLP DOI BibTeX RDF
14	Daniele G. Spampinato, Anne C. Elster	Linear optimization on modern GPUs.	IPDPS	2009	DBLP DOI BibTeX RDF
14	Patrício Domingues, Filipe Araújo, Luís Moura Silva	Evaluating the performance and intrusiveness of virtual machines for desktop grid computing.	IPDPS	2009	DBLP DOI BibTeX RDF
14	Cong Xu, Yuebin Bai, Cheng Luo, Xiang Ni	PVC: A novel personal virtual cluster based on multi-core platform.	ISCIS	2009	DBLP DOI BibTeX RDF
14	Xiaohua Shi, Chuang Li, Xu Wang, Kang Li	A Practical Approach of Curved Ray Prestack Kirchhoff Time Migration on GPGPU.	APPT	2009	DBLP DOI BibTeX RDF	General Purpose GPU, Prestack Kirchhoff Time Migration, CUDA
14	Ahron Yang, Minseok Song 0001	Aggressive dynamic voltage scaling for energy-aware video playback based on decoding time estimation.	EMSOFT	2009	DBLP DOI BibTeX RDF	media players, dynamic voltage scaling, real-time embedded systems, low-power systems
14	Joseph M. Cavanagh, Thomas E. Potok, Xiaohui Cui	Parallel latent semantic analysis using a graphics processing unit.	GECCO (Companion)	2009	DBLP DOI BibTeX RDF	text mining, latent semantic indexing, gpu
14	Da Qi Ren, Reiji Suda	Power Efficient Large Matrices Multiplication by Load Scheduling on Multi-core and GPU Platform with CUDA.	CSE (1)	2009	DBLP DOI BibTeX RDF
14	Snaider Carrillo, Jakob Siegel, Xiaoming Li	A control-structure splitting optimization for GPGPU.	Conf. Computing Frontiers	2009	DBLP DOI BibTeX RDF	optimizations, gpgpu, cuda
14	Luke J. Gosink, Kesheng Wu, E. Wes Bethel, John D. Owens, Kenneth I. Joy	Data Parallel Bin-Based Indexing for Answering Queries on Multi-core Architectures.	SSDBM	2009	DBLP DOI BibTeX RDF
14	John E. Stone, Jan Saam, David J. Hardy, Kirby L. Vandivort, Wen-mei W. Hwu, Klaus Schulten	High performance computation and interactive display of molecular orbitals on GPUs and multi-core CPUs.	GPGPU	2009	DBLP DOI BibTeX RDF	molecular orbital, GPGPU, CUDA, GPU computing
14	Di Yang, Elke A. Rundensteiner, Matthew O. Ward	Neighbor-based pattern detection for windows over streaming data.	EDBT	2009	DBLP DOI BibTeX RDF
14	Fadi N. Sibai	Evaluating the performance of single and multiple core processors with PCMARK®05 and benchmark analysis.	SIGMETRICS Perform. Evaluation Rev.	2008	DBLP DOI BibTeX RDF	performance benchmark, single and dual core processors, workload characterization
14	Abhishek Chandra, Prashant J. Shenoy	Hierarchical Scheduling for Symmetric Multiprocessors.	IEEE Trans. Parallel Distributed Syst.	2008	DBLP DOI BibTeX RDF	Scheduling, Multiprocessor Systems, Hierarchical design
14	Peter A. Boncz, Martin L. Kersten, Stefan Manegold	Breaking the memory wall in MonetDB.	Commun. ACM	2008	DBLP DOI BibTeX RDF
14	Han-Young Jang, JungHyun Han	Fast collision detection using the A-buffer.	Vis. Comput.	2008	DBLP DOI BibTeX RDF	Real-time collision detection, A-buffer, Deformable object
14	Kun Zhou 0001, Qiming Hou, Rui Wang 0004, Baining Guo	Real-time KD-tree construction on graphics hardware.	ACM Trans. Graph.	2008	DBLP DOI BibTeX RDF	point cloud modeling, programable graphics hardware, ray tracing, kd-tree, photon mapping
14	Megumi Ito, Shuichi Oikawa	Lightweight Shadow Paging for Efficient Memory Isolation in Gandalf VMM.	ISORC	2008	DBLP DOI BibTeX RDF	Virtual Machine Monitors, System Software
14	Antonio Ruiz, Jun Kong, Manuel Ujaldon, Kim L. Boyer, Joel H. Saltz, Metin N. Gurcan	Pathological image segmentation for neuroblastoma using the GPU.	ISBI	2008	DBLP DOI BibTeX RDF
14	Norm Rubin	Issues and challenges in compiling for graphics processors.	CGO	2008	DBLP DOI BibTeX RDF	compilers, graphics
14	Nima Mehdizadeh, Mohammad Shokrollah-Shirazi, Seyed Ghassem Miremadi	Analyzing fault effects in the 32-bit OpenRISC 1200 microprocessor.	ARES	2008	DBLP DOI BibTeX RDF
14	Jiri Barnat, Lubos Brim, Petr Rockai	DiVinE Multi-Core - A Parallel LTL Model-Checker.	ATVA	2008	DBLP DOI BibTeX RDF
14	Wei Chen 0009, Hongyi Lu, Li Shen 0007, Zhiying Wang 0003, Nong Xiao, Dan Chen 0001	A Novel Hardware Assisted Full Virtualization Technique.	ICYCS	2008	DBLP DOI BibTeX RDF
14	Jack Whitham, Neil C. Audsley	Forming Virtual Traces for WCET Analysis and Reduction.	RTCSA	2008	DBLP DOI BibTeX RDF
14	Michael Gschwind	Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor.	ICCD	2008	DBLP DOI BibTeX RDF
14	Bernd Becker 0001, Marc Herbstritt, Natalia Kalinnik, Matthew Lewis 0004, Juri Lichtner, Tobias Nopper, Ralf Wimmer 0001	Propositional approximations for bounded model checking of partial circuit designs.	ICCD	2008	DBLP DOI BibTeX RDF
14	Joseph Euzebe Tate, Thomas J. Overbye	Contouring for Power Systems Using Graphical Processing Units.	HICSS	2008	DBLP DOI BibTeX RDF
14	K. Vimala Devi, K. M. Mehata	A priority based resource allocation with max-min fairness in active sensor networks.	ICON	2008	DBLP DOI BibTeX RDF
14	Allen C. Cheng	A Software-to-Hardware Self-Mapping Technique to Enhance Program Throughput for Portable Multimedia Workloads.	DELTA	2008	DBLP DOI BibTeX RDF	Instruction Fusion, Mobile Embedded SoC, Portable Multimedia, Energy Efficiency
14	Haipeng Cheng, Zheng Chen, Bei Hua, Xinan Tang	Scalable packet classification using interpreting: a cross-platform multi-core solution.	PPoPP	2008	DBLP DOI BibTeX RDF	architecture, multithreading, network processor, packet classification, thread-level parallelism, embedded system design
14	Osmar Marchi dos Santos, Andy J. Wellings	Cost enforcement in the real-time specification for Java.	Real Time Syst.	2007	DBLP DOI BibTeX RDF	Fault-tolerance, Model checking, Real-time specification for Java, Java programming language
14	Haisang Wu, Binoy Ravindran, E. Douglas Jensen	Utility Accrual Real-Time Scheduling Under the Unimodal Arbitrary Arrival Model with Energy Bounds.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Real-time systems, energy-efficient scheduling, time/utility functions, utility accrual scheduling
14	Alexandra Fedorova, Margo I. Seltzer, Michael D. Smith 0001	Improving Performance Isolation on Chip Multiprocessors via an Operating System Scheduler.	PACT	2007	DBLP DOI BibTeX RDF
14	Teruaki Sakata, Teppei Hirotsu, Hiromichi Yamada, Takeshi Kataoka	A Cost-Effective Dependable Microcontroller Architecture with Instruction-Level Rollback for Soft Error Recovery.	DSN	2007	DBLP DOI BibTeX RDF
14	Andrew Lines	The Vortex: A Superscalar Asynchronous Processor.	ASYNC	2007	DBLP DOI BibTeX RDF
14	Jahyun J. Koo, Alan C. Evans, Warren J. Gross	Accelerating a Medical 3D Brain MRI Analysis Algorithm using a High-Performance Reconfigurable Computer.	FPL	2007	DBLP DOI BibTeX RDF
14	José A. Gámez 0001, Juan L. Mateo, José Miguel Puerta	A Fast Hill-Climbing Algorithm for Bayesian Networks Structure Learning.	ECSQARU	2007	DBLP DOI BibTeX RDF
14	Allison L. Holloway, Vijayshankar Raman, Garret Swart, David J. DeWitt	How to barter bits for chronons: compression and bandwidth trade offs for database scans.	SIGMOD Conference	2007	DBLP DOI BibTeX RDF	bandwidth trade offs, difference coding, compression, Huffman coding
14	Liang Liang, Xuegong Zhou, Ying Wang 0032, Chenglian Peng	Online Hybrid Task Scheduling in Reconfigurable Systems.	CSCWD	2007	DBLP DOI BibTeX RDF
14	Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh, Hong Wang 0003	EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system.	PLDI	2007	DBLP DOI BibTeX RDF	GPU, openMP, heterogeneous multi-cores
14	Onur Aciiçmez, Jean-Pierre Seifert	Cheap Hardware Parallelism Implies Cheap Security.	FDTC	2007	DBLP DOI BibTeX RDF
14	Vincenzo De Florio, Chris Blondia	Reflective and Refractive Variables: A Model for Effective and Maintainable Adaptive-and-Dependable Software.	EUROMICRO-SEAA	2007	DBLP DOI BibTeX RDF
14	Gérard Dethier, Cyril Briquet, Pierre Marchot, Pierre-Arnoul de Marneffe	A Grid-Enabled Lattice-Boltzmann-Based Modelling System.	PPAM	2007	DBLP DOI BibTeX RDF
14	Toshiya Nakajima, Tetsuya Izu, Tsuyoshi Takagi	Reduction Optimal Trinomials for Efficient Software Implementation of the etaT Pairing.	IWSEC	2007	DBLP DOI BibTeX RDF	reduction optimal trinomial, finite field, pairing, irreducible polynomial, software implementation, characteristic three
14	Fabian Vargas 0001, Leonardo Piccoli 0001, Juliano Benfica, Antonio A. de Alecrim Jr., Marlon Moraes	Time-Sensitive Control-Flow Checking for Multitask Operating System-Based SoCs.	IOLTS	2007	DBLP DOI BibTeX RDF
14	Sanghoon Baek, Suyong Ahn, Se-Young Oh	Fast Localization Algorithm for The Cleaning Robot By Using Self-Organization Map.	CIRA	2007	DBLP DOI BibTeX RDF
14	Hiroto Kurita, Kenji Hatano, Jun Miyazaki, Shunsuke Uemura	Efficient Query Processing for Large XML Data in Distributed Environments.	AINA	2007	DBLP DOI BibTeX RDF
14	Krzysztof Niski, Budirijanto Purnomo, Jonathan D. Cohen 0001	Multi-grained level of detail using a hierarchical seamless texture atlas.	SI3D	2007	DBLP DOI BibTeX RDF	level of detail, parametrization, out-of-core, geometry image, texture atlas
14	Yoav Etsion, Dan Tsafrir, Dror G. Feitelson	Process prioritization using output production: Scheduling for multimedia.	ACM Trans. Multim. Comput. Commun. Appl.	2006	DBLP DOI BibTeX RDF	Multimedia, resource management
14	Cristian Coarfa, Peter Druschel, Dan S. Wallach	Performance analysis of TLS Web servers.	ACM Trans. Comput. Syst.	2006	DBLP DOI BibTeX RDF	RSA accelerator, secure Web servers, Internet, e-commerce, TLS
14	Michel Morneau, Abdelhakim Khouas	TBSA: Threshold-Based Simulation Accuracy Method for Fast Analog DC Fault Simulation.	J. Electron. Test.	2006	DBLP DOI BibTeX RDF	DC fault simulation, analog fault detection, Newton-Raphson algorithm, analog testing
14	Shahrooz Feizabadi, Godmar Back	Automatic Memory Management in Utility Accrual Scheduling Environments.	ISORC	2006	DBLP DOI BibTeX RDF
14	Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf	Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications.	ICSAMOS	2006	DBLP DOI BibTeX RDF
14	Julius Fabian Ohmer, Frédéric Maire, Ross Brown 0001	Real-Time Tracking with Non-Rigid Geometric Templates Using the GPU.	CGIV	2006	DBLP DOI BibTeX RDF
14	Behnaz Pourebrahimi, Koen Bertels, G. M. Kandru, Stamatis Vassiliadis	Market-Based Resource Allocation in Grids.	e-Science	2006	DBLP DOI BibTeX RDF
14	Carsten Kutzner, David van der Spoel, Martin Fechner, Erik Lindahl, Udo W. Schmitt, Bert L. de Groot, Helmut Grubmüller	Improved GROMACS Scaling on Ethernet Switched Clusters.	PVM/MPI	2006	DBLP DOI BibTeX RDF