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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 164 occurrences of 122 keywords
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Results
Found 422 publication records. Showing 421 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Kenneth L. Shepard, Zhong Tian |
Return-limited inductances: a practical approach to on-chipinductance extraction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(4), pp. 425-436, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Tong Xiao, Malgorzata Marek-Sadowska |
Worst Delay Estimation in Crosstalk Aware Static Timing Analysis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCD ![In: Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000, pp. 115-120, 2000, IEEE Computer Society, 0-7695-0801-4. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | J. L. Knighten, N. W. Smith, L. O. Hoeft, J. T. DiBene II |
EMI Common-Mode Current Dependence on Delay Skew Imbalance in High Speed Differential Transmission Lines Operating at 1 Gigabit/second Data Rates. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISQED ![In: 1st International Symposium on Quality of Electronic Design (ISQED 2000), 20-22 March 2000, San Jose, CA, USA, pp. 309-314, 2000, IEEE Computer Society, 0-7695-0525-2. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
radiated emissions, common-mode current, differential transmission line, skew, EMI |
12 | Rong Lin, Stephan Olariu, James L. Schwing, Biing-Feng Wang |
The Mesh with Hybrid Buses: An Efficient Parallel Architecture for Digital Geometry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 10(3), pp. 266-280, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
mesh with hybrid buses, cost-optimal algorithms, pattern recognition, image processing, broadcasting, VLSI architectures, digital geometry, cellular systems |
12 | Ki-Wook Kim, Sung-Mo Kang, TingTing Hwang, C. L. Liu 0001 |
Logic Transformation for Low Power Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DATE ![In: 1999 Design, Automation and Test in Europe (DATE '99), 9-12 March 1999, Munich, Germany, pp. 158-162, 1999, IEEE Computer Society / ACM, 0-7695-0078-1. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki |
Optimum nested Miller compensation for low-voltage low-power CMOS amplifier design. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 616-619, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Simona Brigati, Fabrizio Francesconi, Piero Malcovati, Davide Tonietto, Andrea Baschirotto, Franco Maloberti |
Modeling sigma-delta modulator non-idealities in SIMULINK(R). ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 384-387, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Hassan O. Elwan, Weinan Gao, Roberto Sadkowski, Mohammed Ismail 0001 |
A low voltage CMOS class AB operational transconductance amplifier. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30 - June 2, 1999, pp. 632-635, 1999, IEEE, 0-7803-5471-0. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Iyad Rayane, Jaime Velasco-Medina, Michael Nicolaidis |
A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VTS ![In: 17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA, pp. 304-310, 1999, IEEE Computer Society, 0-7695-0146-X. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Andrew B. Kahng, Sudhakar Muddu |
Improved Effective Capacitance Computations for Use in Logic and Layout Optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India, pp. 578-583, 1999, IEEE Computer Society, 0-7695-0013-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim |
Interleaving buffer insertion and transistor sizing into a single optimization. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(4), pp. 625-633, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | Tatsuya Hayashi, Koji Nakano, Stephan Olariu |
An O((log log n)2) Time Algorithm to Compute the Convex Hull of Sorted Points on Reconfigurable Meshes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Parallel Distributed Syst. ![In: IEEE Trans. Parallel Distributed Syst. 9(12), pp. 1167-1179, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
pattern recognition, mobile computing, image processing, Convex hulls, morphology, reconfigurable meshes |
12 | Saeid Sadeghi-Emamchaie, Graham A. Jullien, Vassil S. Dimitrov, William C. Miller |
Digital Arithmetic Using Analog Arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Great Lakes Symposium on VLSI ![In: 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 19-21 February 1998, Lafayette, LA, USA, pp. 202-207, 1998, IEEE Computer Society, 0-8186-8409-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
Cellular Neural Networks, Double-Base Number System, Analog VLSI |
12 | John Lillis, Premal Buch |
Table-Lookup Methods for Improved Performance-Driven Routing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DAC ![In: Proceedings of the 35th Conference on Design Automation, Moscone center, San Francico, California, USA, June 15-19, 1998., pp. 368-373, 1998, ACM Press, 0-89791-964-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
logic synthesis, gate-sizing, fanout optimization |
12 | Andrew R. Conn, Ruud A. Haring, Chandramouli Visweswariah, Chai Wah Wu |
Circuit optimization via adjoint Lagrangians. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 281-288, 1997, IEEE Computer Society / ACM, 0-8186-8200-0. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
Adjoint circuit, Optimization, Circuit simulation, Trust region, Augmented Lagrangian, Circuit tuning |
12 | Pradip Mandal, V. Visvanathan |
A Self-Biased High Performance Folded Cascode CMOS Op-Amp. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 429-434, 1997, IEEE Computer Society, 0-8186-7755-4. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
|
12 | Tatsuya Hayashi, Koji Nakano, Stephan Olariu |
Efficient List Ranking on the Reconfigurable Mesh, with Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISAAC ![In: Algorithms and Computation, 7th International Symposium, ISAAC '96, Osaka, Japan, December 16-18, 1996, Proceedings, pp. 326-335, 1996, Springer, 3-540-62048-6. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
|
12 | Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou |
A power modeling and characterization method for the CMOS standard cell library. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 400-404, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
power characterization, power consumption, power estimation |
12 | Daksh Lehther, Sachin S. Sapatnekar |
Clock tree synthesis for multi-chip modules. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ICCAD ![In: Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1996, San Jose, CA, USA, November 10-14, 1996, pp. 50-53, 1996, IEEE Computer Society / ACM, 0-8186-7597-7. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
Pade' approximants, Interconnect optimization |
12 | Sudhir Aggarwal |
An Enhanced Macromodel for a CMOS Operational Amplifier for HDL Implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
VLSI Design ![In: 9th International Conference on VLSI Design (VLSI Design 1996), 3-6 January 1996, Bangalore, India, pp. 331-332, 1996, IEEE Computer Society, 0-8186-7228-5. The full citation details ...](Pics/full.jpeg) |
1996 |
DBLP DOI BibTeX RDF |
VHDL-Analog, Non-linear model, Analog IC's, Operational Amplifier, Macromodel |
12 | Andrew T. Yang, Yu-Hsu Chang, Daniel G. Saab, Ibrahim N. Hajj |
Switch-level timing simulation of bipolar ECL circuits. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ![In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(4), pp. 516-530, 1993. The full citation details ...](Pics/full.jpeg) |
1993 |
DBLP DOI BibTeX RDF |
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