Search results for "Arithmetic"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
24	Ping Tak Peter Tang	Modular Multiplication using Redundant Digit Division.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF
24	Son Dao Trong, Martin S. Schmookler, Eric M. Schwarz, Michael Kroener	P6 Binary Floating-Point Unit.	IEEE Symposium on Computer Arithmetic	2007	DBLP DOI BibTeX RDF	denormal result handling, aggressive data forwarding, high-frequency design, data processing without stalls, Floating-point unit
24		17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 27-29 June 2005, Cape Cod, MA, USA	IEEE Symposium on Computer Arithmetic	2005	DBLP BibTeX RDF
24	Zhaojun Wo, Israel Koren	Synthesis of Saturating Counters Using Traditional and Non-Traditional Basic Counters.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Pavan Adharapurapu, Milos D. Ercegovac	A Linear-System Operator Based Scheme for Evaluation of Multinomials.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	David Money Harris, Ram Krishnamurthy 0001, Mark A. Anders 0001, Sanu Mathew, Steven Hsu	An Improved Unified Scalable Radix-2 Montgomery Multiplier.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Peter Kornerup, David W. Matula	Single Precision Reciprocals by Multipartite Table Lookup.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Naofumi Takagi, Shunsuke Kadowaki, Kazuyoshi Takagi	A Hardware Algorithm for Integer Division.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24		Dedication.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Roger A. Golliver, Silvia M. Müller, Stuart F. Oberman, Martin S. Schmookler, Debjit Das Sarma, Andrew Beaumont-Smith	Pain versus Gain in the Hardware Design of FPUs and Supercomputers.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Peter-Michael Seidel	High-Radix Implementation of IEEE Floating-Point Addition.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	E. Chaniotakis, Paraskevas Kalivas, Kiamal Z. Pekmestzi	Long Number Bit-Serial Squarers.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Damien Stehlé, Paul Zimmermann	Gal's Accurate Tables Method Revisited.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Mark G. Arnold	The Residue Logarithmic Number System: Theory and Implementation.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Vincent Lefèvre	New Results on the Distance between a Segment and Z2. Application to the Exact Rounding.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	David W. Matula, Alex Fit-Florea, Mitchell Aaron Thornton	Table Lookup Structures for Multiplicative Inverses Modulo 2k.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Sylvie Boldo, Jean-Michel Muller	Some Functions Computable with a Fused-Mac.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Stuart F. Oberman, Michael Y. Siu	A High-Performance Area-Efficient Multifunction Interpolator.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Khan Wahid, Vassil S. Dimitrov, Graham A. Jullien	Error-Free Computation of 8x8 2-D DCT and IDCT Using Two-Dimensional Algebraic Integer Quantization.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24		List of Referees.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Youngmoon Choi, Earl E. Swartzlander Jr.	Parallel Prefix Adder Design with Matrix Representation.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Dhananjay S. Phatak, Tom Goff	Fast Modular Reduction for Large Wordlengths via One Linear and One Cyclic Convolution.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF	fast modular reduction, large wordlength, FFT multiply, linear convolution, principle of separation, cryptography, elliptic-curve, number theoretic transforms, cyclic convolution
24	Marco Macchetti, Luigi Dadda	Quasi-Pipelined Hash Circuits.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Peter W. Markstein	A Fast-Start Method for Computing the Inverse Tangent.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	E. George Walters III, Michael J. Schulte	Efficient Function Approximation Using Truncated Multipliers and Squarers.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24		Steering Committee.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24		Forword.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Silvia M. Müller, Christian Jacobi 0002, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong	The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24		Symposium Committee.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Florent de Dinechin, Alexey V. Ershov, Nicolas Gast	Towards the Post-Ultimate libm.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Mark A. Erle, Eric M. Schwarz, Michael J. Schulte	Decimal Multiplication with Efficient Partial Product Generation.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Javier D. Bruguera, Tomás Lang	Floating-Point Fused Multiply-Add: Reduced Latency for Floating-Point Addition.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Elisardo Antelo, Julio Villalba	Low Latency Pipelined Circular CORDIC.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Bart R. Zeydel, Theo T. J. H. Kluter, Vojin G. Oklobdzija	Efficient Mapping of Addition Recurrence Algorithms in CMOS.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli	Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Merav Aharoni, Sigal Asaf, Ron Maharik, Ilan Nehama, Ilya Nikulshin, Abraham Ziv	Solving Constraints on the Invisible Bits of the Intermediate Result for Floating-Point Verification.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF
24	Colin D. Walter, David Samyde	Data Dependent Power Use in Multipliers.	IEEE Symposium on Computer Arithmetic	2005	DBLP DOI BibTeX RDF	EMA, smart card, Differential power analysis, DPA, multiplication, multiplier, RSA cryptosystem
24		16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 15-18 June 2003, Santiago de Compostela, Spain	IEEE Symposium on Computer Arithmetic	2003	DBLP BibTeX RDF
24	David W. Matula, Alex Fit-Florea	Prescaled Integer Division.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Vojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy 0001	Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Amir K. Daneshbeh, M. Anwarul Hasan	A Unidirectional Bit Serial Systolic Architecture for Double-Basis Division over GF(2m).	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Damien Stehlé, Vincent Lefèvre, Paul Zimmermann	Worst Cases and Lattice Reduction.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	John Harrison 0001	Isolating Critical Cases for Reciprocals Using Integer Factorization.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Christiane Frougny, Athasit Surarerks	On-Line Multiplication in Real and Complex Base.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Guenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess	High Performance Floating-Point Unit with 116 Bit Wide Divider.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Serdar Süer Erdem, Çetin Kaya Koç	A Less Recursive Variant of Karatsuba-Ofman Algorithm for Multiplying Operands of Size a Power of Two.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Peter Kornerup	Revisiting SRT Quotient Digit Selection.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Israel Koren, Yaron Koren, Bejoy G. Oomman	Saturating Counters: Application and Design Alternatives.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Dimitri Tan, Albert Danysh, Michael J. Liebelt	Multiple-Precision Fixed-Point Vector Multiply-Accumulator Using Shared Segmentation.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Ren-Cang Li, Sylvie Boldo, Marc Daumas	Theorems on Efficient Argument Reductions.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Avi Ziv, Merav Aharoni, Sigal Asaf	Solving Range Constraints for Binary Floating-Point Instructions.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Soonhak Kwon	A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over GF(2m) Using an Optimal Normal Basis of Type II.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Mark McCann, Nicholas Pippenger	SRT Division Algorithms as Dynamical Systems.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera	High-Radix Iterative Algorithm for Powering Computation.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Zhijun Huang, Milos D. Ercegovac	High-Performance Left-to-Right Array Multiplier Design.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Nicolas Boullis, Arnaud Tisserand	Some Optimizations of Hardware Multiplication by Constant Matrices.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Guy Even, Peter-Michael Seidel, Warren E. Ferguson	A Parametric Error Analysis of Goldschmidt?s Division Algorithm.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Jean-Claude Bajard, Laurent Imbert, Christophe Nègre, Thomas Plantard	Efficient Multiplication in GF(pk) for Elliptic Curve Cryptography.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Eric M. Schwarz, Martin S. Schmookler, Son Dao Trong	Hardware Implementations of Denormalized Numbers.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Neil Burgess	Scaling an RNS Number Using the Core Function.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Marcelo E. Kaihara, Naofumi Takagi	A VLSI Algorithm for Modular Multiplication/Division.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24	Peter W. Markstein	Accelerating Sine and Cosine Evaluation with Compiler Assistance.	IEEE Symposium on Computer Arithmetic	2003	DBLP DOI BibTeX RDF
24		15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 11-17 June 2001, Vail, CO, USA	IEEE Symposium on Computer Arithmetic	2001	DBLP BibTeX RDF
24	Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou	High Speed Parallel-Prefix Modulo 2n+1 Adders for Diminished-One Operands.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Naofumi Takagi	A Hardware Algorithm for Computing Reciprocal Square Root.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	José-Alejandro Piñeiro, Javier D. Bruguera, Jean-Michel Muller	Faithful Powering Computation Using Table Look-Up and a Fused Accumulation Tree.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Lee D. McFearin, David W. Matula	Generation and Analysis of Hard to Round Cases for Binary Floating Point Division.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Peter-Michael Seidel, Guy Even	On the Design of Fast IEEE Floating-Point Adders.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Vassil S. Dimitrov, Jonathan Eskritt, Laurent Imbert, Graham A. Jullien, William C. Miller	The Use of the Multi-Dimensional Logarithmic Number System in DSP Applications.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Alexandre F. Tenca, Syed Ubaid Hussaini	A Design of Radix-2 On-line Division Using LSA Organization.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Ajay Naini, Atul Dhablania, Warren James, Debjit Das Sarma	1-GHz HAL SPARC64 Dual Floating Point Unit with RAS Features.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Florent de Dinechin, Arnaud Tisserand	Some Improvements on Multipartite Table Methods .	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Cheol-Ho Jeong, Woo-Chan Park, Tack-Don Han, Moon Key Lee, Sang-Woo Kim	In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Tomás Lang, Elisardo Antelo	Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Peter-Michael Seidel, Lee D. McFearin, David W. Matula	Binary Multiplication Radix-32 and Radix-256.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Vincent Lefèvre, Jean-Michel Muller	Worst Cases for Correct Rounding of the Elementary Functions in Double Precision.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	David W. Matula	Improved Table Lookup Algorithms for Postscaled Division.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Jun Cao, Belle W. Y. Wei, Jie Cheng	High-Performance Architectures for Elementary Function Generation.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Martin S. Schmookler, Kevin J. Nowka	Leading Zero Anticipation and Detection-A Comparison of Methods.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Andrew Beaumont-Smith, Cheng-Chew Lim	Parallel Prefix Adder Design.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Tomás Lang, Jean-Michel Muller	Bounds on Runs of Zeros and Ones for Algebraic Functions.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	K'Andrea C. Bickerstaff, Earl E. Swartzlander Jr., Michael J. Schulte	Analysis of Column Compression Multipliers.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Javier D. Bruguera, Tomás Lang	Using the Reverse-Carry Approach for Double Datapath Floating-Point Addition.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Simon Knowles	A Family of Adders.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24	Mark G. Arnold, Colin D. Walter	Unrestricted Faithful Rounding is Good Enough for Some LNS Applications.	IEEE Symposium on Computer Arithmetic	2001	DBLP DOI BibTeX RDF
24		14th IEEE Symposium on Computer Arithmetic (Arith-14 '99), 14-16 April 1999, Adelaide, Australia	IEEE Symposium on Computer Arithmetic	1999	DBLP BibTeX RDF
24	Dhananjay S. Phatak, Israel Koren	Intermediate Variable Encodings that Enable Multiplexor-Based Implementations of Two Operand Addition.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Stuart F. Oberman	Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Eric M. Schwarz, Ronald M. Smith, Christopher A. Krygowski	The S/390 G5 Floating Point Unit Supporting Hex and Binary Architectures.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Naofumi Takagi, Seiji Kuwahara	Digit-Recurrence Algorithm for Computing Euclidean Norm of a 3-D Vector.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Alexandre F. Tenca, Milos D. Ercegovac	On the Design of High-Radix On-Line Division for Long Precision.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Simon Knowles	A Family of Adders.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Shane Story, Ping Tak Peter Tang	New Algorithms for Improved Transcendental Functions on IA-64.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Marc Daumas	Multiplications of Floating Point Expansions.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Martin S. Schmookler, Ramesh C. Agarwal, Fred G. Gustavson	Series Approximation Methods for Divide and Square Root in the Power3(TM) Processor.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Marius A. Cornea-Hasegan, Roger A. Golliver, Peter W. Markstein	Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Alberto Nannarelli, Tomás Lang	Low-Power Division: Comparison among Implementations of Radix 4, 8 and 16.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Guenter Gerwig, Michael Kroener	Floating-Point Unit in Standard Cell Design with 116 Bit Wide Dataflow.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Peter Kornerup	Necessary and Sufficient Conditions for Parallel, Constant Time Conversion and Addition.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Javier Hormigo, Julio Villalba, Emilio L. Zapata	Interval Sine and Cosine Functions Computation Based on Variable-Precision CORDIC Algorithm.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF