Search results for "Arithmetic"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
24	Elisardo Antelo, Tomás Lang, Javier D. Bruguera	Very-High Radix CORDIC Vectoring with Scalings and Selection by Rounding.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Cristina Iordache, David W. Matula	On Infinitely Precise Rounding for Division, Square Root, Reciprocal and Square Root Reciprocal.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Paolo Montuschi, Tomás Lang	Boosting Very-High Radix Division with Prescaling and Selection by Rounding.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Guy Even, Peter-Michael Seidel	A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24	Jeng-Jong J. Lue, Dhananjay S. Phatak	Area x Delay (A T) Efficient Multiplier Based on an Intermediate Hybrid Signed-Digit (HSD-1) Representation.	IEEE Symposium on Computer Arithmetic	1999	DBLP DOI BibTeX RDF
24		13th Symposium on Computer Arithmetic (ARITH-13 '97), 6-9 July 1997, Asilomar, CA, USA	IEEE Symposium on Computer Arithmetic	1997	DBLP BibTeX RDF
24	Ahmad A. Hiasat, Hoda S. Abdel-Aty-Zohdy	Design and Implementation of An RNS Division Algorithmm.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF
24	Paul F. Stelling, Vojin G. Oklobdzija	Implementing Multiply-Accumulate Operation in Multiplication Time.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	multiply-accumulate operation, multiplication time, optimal delays, instruction time, optimal multiply-accumulate circuit, RISC CPU, partial product reduction tree, final adder, digital signal processing, power savings, multiplying circuits, circuit design, VLSI circuits, parallel multiplier, processor performance, video applications, graphics applications, clock speed
24	Mircea R. Stan	Synchronous Up/Down Counter with Clock Period Independent of Counter Size.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	up/down counters, constant time counters, prescalers
24	Naofumi Takagi	Generating a Power of an Operand by a Table Look-up and a Multiplication.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	table method, Powering, square root, reciprocal, linear approximation
24	Colin D. Walter	Exponentiation using Division Chains.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF
24	Debjit Das Sarma, David W. Matula	Faithful Interpolation in Reciprocal Tables.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF
24	Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup	An IWS Montgomery Modular Multiplication Algorithm.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	RNS Montgomery modular multiplication algorithm, very large operands, mixed radix, processor ring, redundant high-radix implementation, residue number systems, residue number system, computation time, table look-up
24	Neil Burgess	Scaled and Unscaled Residue Number System to Binary Conversion Techniques using the Core Function.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	Scaled Conversion, Core Function, Conversion, Residue Number System
24	David Raymond Lutz, Doddaballapur Narasimha-Murthy Jayasimha	The Half-Adder Form and Early Branch Condition Resolution.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	half-adder form, branch conditions, early zero detection, carry generation detection, addition, subtraction
24	Thomas K. Callaway, Earl E. Swartzlander Jr.	Power-Delay Characteristics of CMOS Multipliers.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF
24	Andrew Beaumont-Smith, Neil Burgess	A GaAs 32-bit Adder.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	high speed adder, VLSI, low power, adder, GaAs, Gallium Arsenide
24	Douglas M. Priest	Fast Table-Driven Algorithms for Interval Elementary Functions.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF
24		12th Symposium on Computer Arithmetic (ARITH-12 '95), July 19-21, 1995, Bath, England, UK	IEEE Symposium on Computer Arithmetic	1995	DBLP BibTeX RDF
24	Debjit Das Sarma, David W. Matula	Faithful Bipartite ROM Reciprocal Tables.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Feng Zhou, Peter Kornerup	High Speed DCT/IDCT Using a Pipelined CORDIC Algorithm.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Gensoh Matsubara, Nobuhiro Ide, Haruyuki Tago, Seigo Suzuki, Nobuyuki Goto	30-ns 55-b Radix 2 Division and Square Root Using a Self-Timed Circuit.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	simulation, CMOS, division, square root, self-timed, SRT, on-the-fly
24	Chung Nan Lyu, David W. Matula	Redundant Binary Booth Recoding.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Hercule Kwan, Robert Leonard Nelson Jr., Earl E. Swartzlander Jr.	Cascaded Implementation of an Iterative Inverse--Square--Root Algorithm, with Overflow Lookahead.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Warren E. Ferguson	Exact Computation of a Sum or Difference with Applications to Argument Reduction.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Robert K. Yu, Gregory B. Zyner	167 MHz Radix-4 Floating Point Multiplier.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	J. Arjun Prabhu, Gregory B. Zyner	167 MHz Radix-8 Divide and Square Root Using Overlapped Radix-2 Stages.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Charles U. Martel, Vojin G. Oklobdzija, R. Ravi 0001, Paul F. Stelling	Design Strategies for Optimal Multiplier Circuits.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF	Algorithms, Circuit design, Partial product reduction, Multiplier design
24	Hannes Hassler, Naofumi Takagi	Function Evaluation by Table Look-up and Addition.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Holger Orup	Simplifying Quotient Determination in High-Radix Modular Multiplication.	IEEE Symposium on Computer Arithmetic	1995	DBLP DOI BibTeX RDF
24	Earl E. Swartzlander Jr., Mary Jane Irwin, Graham A. Jullien (eds.)	11th Symposium on Computer Arithmetic, 29 June - 2 July 1993, Windsor, Canada, Proceedings.	IEEE Symposium on Computer Arithmetic	1993	DBLP BibTeX RDF
24	Daniel Etiemble, Keivan Navi	Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Xavier Merrheim, Jean-Michel Muller, Hong-Jin Yeh	Fast evaluation of polynomials and inverses of polynomials.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Dan Zuras	On squaring and multiplying large integers.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Paolo Montuschi, Luigi Ciminiera	n × n carry-save multipliers without final addition.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Luigi Dadda, Vincenzo Piuri, Renato Stefanelli	Multi-parallel convolvers.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	S. E. Richardson	Exploiting trivial and redundant computation.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	James Demmel, Xiaoye S. Li	Faster numerical algorithms via exception handling.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	David Eisig, Josh Rotstain, Israel Koren	The design of a 64-bit integer multiplier/divider unit.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Mark Shand, Jean Vuillemin	Fast implementations of RSA cryptography.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Naofumi Takagi	A modular multiplication algorithm with triangle additions.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Thomas K. Callaway, Earl E. Swartzlander Jr.	Estimating the power consumption of CMOS adders.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	W. S. Briggs, David W. Matula	A 17 × 69 bit multiply and add unit with redundant binary feedback and single cycle latency.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Stephen E. McQuillan, John V. McCanny, Robert Hamill	New algorithms and VLSI architectures for SRT division and square root.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Tudor Jebelean	Comparing several GCD algorithms.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Debjit Das Sarma, David W. Matula	Measuring the accuracy of ROM reciprocal tables.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Werner Krandick, Jeremy R. Johnson	Efficient multiprecision floating point multiplication with optimal directional rounding.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Jordi Cortadella, Tomás Lang	Division with speculation of quotient digits.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Peter Kornerup	High-radix modular multiplication for cryptosystems.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Marc Daumas, David W. Matula	Design of a fast validated dot product operation.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Milos D. Ercegovac, Tomás Lang, Paolo Montuschi	Very high radix division with selection by rounding and prescaling.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Gerben J. Hekstra, Ed F. Deprettere	Floating point Cordic.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Sami S. Bizzan, Graham A. Jullien, Neil M. Wigley, William C. Miller	Integer mapping architectures for the polynomial ring engine.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Michael J. Schulte, Earl E. Swartzlander Jr.	Exact rounding of certain elementary functions.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24	Jean-Claude Bajard, Sylvanus Kla, Jean-Michel Muller	BKM: A new hardware algorithm for complex elementary functions.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
24		10th IEEE Symposium on Computer Arithmetic, ARITH 1991, Grenoble, France, June 26-28, 1991	IEEE Symposium on Computer Arithmetic	1991	DBLP BibTeX RDF
24	Christiane Frougny	Representation of numbers in nonclassical numeration systems.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Andreas Knöfel	Fast hardware units for the computation of accurate dot products.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Jen-Shiun Chiang, Mi Lu	A general division algorithm for residue number systems.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Alfons A. J. de Lange, Ed F. Deprettere	Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processing.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Jeong-A Lee, Tomás Lang	SVD by constant-factor-redundant-CORDIC.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Michael Müller 0002, Christine Rüb, Wolfgang Rülling	Exact accumulation of floating-point numbers.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Vitit Kantabutra	Designing optimum carry-skip adders.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Alain Guyot	OCAPI: architecture of a VLSI coprocessor for the GCD and the extended GCD of large numbers.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Hidetoshi Yokoo	Overflow/underflow-free floating-point number representations with self-delimiting variable-length exponent field.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Stanislaw J. Piestrak	Design of residue generators and multioperand modular adders using carry-save adders.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Derek C. Wong, Michael J. Flynn	Fast division using accurate quotient approximations to reduce the number of iterations.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Jean Duprat, Yvan Herreros, Sylvanus Kla	New redundant representations of complex numbers and vectors.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Dragan Gamberger	New approach to integer division in residue number systems.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Ping Tak Peter Tang	Table-lookup algorithms for elementary functions and their error analysis.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija	Delay optimization of carry-skip adders and block carry-lookahead adders.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Shrikant N. Parikh, David W. Matula	A redundant binary Euclidean GCD algorithm.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Thomas W. Lynch, Earl E. Swartzlander Jr.	The redundant cell adder.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Paolo Montuschi, Luigi Ciminiera	Simple radix 2 division and square root with skipping of some addition steps.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Robert Alverson	Integer division using reciprocals.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Naofumi Takagi	A radix-4 modular multiplication hardware algorithm efficient for iterative modular multiplications.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Mayur Mehta, Vijay Parmar, Earl E. Swartzlander Jr.	High-speed multiplier design using multi-input counter and compressor circuits.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Jean Vuillemin	Constant time arbitrary length synchronous binary counters.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Peter R. Turner	Implementation and analysis of extended SLI operations.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Shen-Fu Hsiao, Jean-Marc Delosme	The CORDIC Householder algorithm.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Holger Orup, Peter Kornerup	A high-radix hardware algorithm for calculating the exponential ME modulo N.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Michael S. Paterson, Uri Zwick	Shallow multiplication circuits.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Warren E. Ferguson, Tom Brightman	Accurate and monotone approximations of some transcendental functions.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Ted E. Williams, Mark A. Horowitz	A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Neil M. Wigley, Graham A. Jullien, Daniel Reaume, William C. Miller	Small moduli replications in the MRRNS.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Gerd Bohlender, Wolfgang Walter, Peter Kornerup, David W. Matula	Semantics for exact floating point operations.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	Lars Kühnel	Optimal purely systolic addition.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
24	George F. Corliss	Industrial Applications of Interval Techniques.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Hans J. Stetter	Validated Solution of Initial Value Problems for ODE.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Friedrich Goerisch, Zhiqing He	The Determination of Guaranteed Bounds to Eigenvalues with the Use of Variational Methods I.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Edgar Kaucher, Carsten W. Schulz-Rinne	Aspects of Self-Validating Numerics in Banach Spaces.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Götz Alefeld	Enclosure Methods.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Johann Schröder	Numerical Algorithms for Existence Proofs and Error Estimates for Two-Point Boundary Value Problems.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Christian P. Ullrich	Programming Languages for Enclosure Methods.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Louis B. Rall	Differentiation Arithmetics.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	E. Adams	Periodic Solutions: Enclosure, Verification, and Applications.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Henning Behnke	The Determination of Guaranteed Bounds to Eigenvalues with the Use of Variational Methods II.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24	Lothar Collatz	Guaranteed Inclusions of Solutions of some Types of Boundary Value Problems.	Computer Arithmetic and Self-Validating Numerical Methods	1990	DBLP DOI BibTeX RDF
24		9th Symposium on Computer Arithmetic, ARITH 1989, Santa Monica, CA, USA, September 6-8, 1989	IEEE Symposium on Computer Arithmetic	1989	DBLP BibTeX RDF
24	Alain Guyot, Yvan Herreros, Jean-Michel Muller	JANUS, an on-line multiplier/divider for manipulating large numbers.	IEEE Symposium on Computer Arithmetic	1989	DBLP DOI BibTeX RDF