Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Pedro Martín, Osmell Machado, Francisco J. Rodríguez 0001, Emilio José Bueno |
Design Space Exploration for the Implementation of a Predictive Current Controller Based on FPGA. |
ASAP |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Sven van Haastregt, Bart Kienhuis |
Enabling Automatic Pipeline Utilization Improvement in Polyhedral Process Network Implementations. |
ASAP |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Roto Le, Joseph L. Mundy, R. Iris Bahar |
High Performance Parallel JPEG2000 Streaming Decoder Using GPGPU-CPU Heterogeneous System. |
ASAP |
2012 |
DBLP DOI BibTeX RDF |
|
1 | Christian Banz, Carsten Dolar, Fabian Cholewa, Holger Blume |
Instruction set extension for high throughput disparity estimation in stereo image processing. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Michael J. Flynn |
More than 50 years of parallel processing and still no easy path to speedup. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Oliver Knodel, Thomas B. Preußer, Rainer G. Spallek |
Next-generation massively parallel short-read mapping on FPGAs. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Joseph R. Cavallaro, Milos D. Ercegovac, Frank Hannig, Paolo Ienne, Earl E. Swartzlander Jr., Alexandre F. Tenca (eds.) |
22nd IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2011, Santa Monica, CA, USA, Sept. 11-14, 2011 |
ASAP |
2011 |
DBLP BibTeX RDF |
|
1 | Jason Cong, Beayna Grigorian, Glenn Reinman, Marco Vitanza |
Accelerating vision and navigation applications on a customizable platform. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Ahmet Akkas, Michael J. Schulte |
A decimal floating-point fused multiply-add unit with a novel decimal leading-zero anticipator. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Luigi Pomante |
System-level design space exploration for dedicated heterogeneous multi-processor systems. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Ke Bai 0002, Aviral Shrivastava, Saleel Kudchadker |
Stack data management for Limited Local Memory (LLM) multi-core processors. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn |
A high-performance, low-power linear algebra core. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Rodolfo Redlich, Gonzalo Carvajal, Miguel E. Figueroa |
An FPGA-based real-time nonuniformity correction system for Infrared Focal Plane Arrays. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Samuel Neves, Filipe Araújo |
On the performance of GPU public-key cryptography. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | |
Message from the conference chairs. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Yanjie Peng, Kai Zhang 0025, Andrew G. Klein, Xinming Huang 0001 |
Design and implementation of a belief propagation detector for sparse channels. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | João Carlos Néto, Alexandre F. Tenca, Wilson Vicente Ruggiero |
A parallel k-partition method to perform Montgomery Multiplication. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Viktor K. Prasanna |
Architectures for Green routers. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Shobana Padmanabhan, Yixin Chen 0001, Roger D. Chamberlain |
Optimal design-space exploration of streaming applications. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Zheng Zhou 0002, Gang Qu 0001 |
An energy efficient adaptive event detection scheme for wireless sensor network. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Joseph M. Lancaster, E. F. Berkley Shands, Jeremy D. Buhler, Roger D. Chamberlain |
TimeTrial: A low-impact performance profiler for streaming data applications. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Ioannis Sourdis, Sri Harsha Katamaneni |
Longest Prefix Match and updates in Range Tries. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Alessandro Strano, Davide Bertozzi, Arnaud Grasset, Sami Yehia |
Exploiting structural redundancy of SIMD accelerators for their built-in self-testing/diagnosis and reconfiguration. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Abelardo Jara-Berrocal, Ann Gordon-Ross |
An integrated development toolset and implementation methodology for partially reconfigurable system-on-chips. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Florent de Dinechin, Jean-Michel Muller, Bogdan Pasca 0001, Alexandru Plesco |
An FPGA architecture for solving the Table Maker's Dilemma. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Shawn Singh, Seung hyun Pan, Milos D. Ercegovac |
Accelerating the photon mapping algorithm and its hardware implementation. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Mark G. Arnold, Ioannis Kouretas, Vassilis Paliouras |
A Residue Logarithmic Number System ALU using interpolation and cotransformation. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Muhammad Ali Shami, Ahmed Hemani |
Address generation scheme for a coarse grain reconfigurable architecture. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Razvan Nane, Sven van Haastregt, Todor P. Stefanov, Bart Kienhuis, Vlad Mihai Sima, Koen Bertels |
IP-XACT extensions for Reconfigurable Computing. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Oguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cüneyt F. Bazlamaçci |
Hybrid data structure for IP lookup in virtual routers using FPGAs. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte |
Energy-efficient floating-point arithmetic for software-defined radio architectures. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Stewart Denholm, Kuen Hung Tsoi, Peter R. Pietzuch, Wayne Luk |
CusComNet: A customisable network for reconfigurable heterogeneous clusters. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Mark Aldham, Jason Helge Anderson, Stephen Dean Brown, Andrew Canis |
Low-cost hardware profiling of run-time and energy in FPGA embedded processors. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Changsheng Zhou, Yunlong Ge, Xubin Chen, Yun Chen 0001, Xiaoyang Zeng |
An area-Efficient LDPC decoder for multi-standard with conflict resolution. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Guohui Wang, Yang Sun 0001, Joseph R. Cavallaro, Yuanbin Guo |
High-throughput Contention-Free concurrent interleaver architecture for multi-standard turbo decoder. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Peng Li 0028, David J. Lilja |
A low power fault-tolerance architecture for the kernel density estimation based image segmentation algorithm. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Marko Miklo, Carl R. Elks, Ronald D. Williams |
Design of a high performance FPGA based fault injector for real-time safety-critical systems. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Yunus Emre, Chaitali Chakrabarti |
Low energy motion estimation via selective aproximations. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Jason Cong, Karthik Gururaj, Muhuan Huang, Sen Li, Bingjun Xiao, Yi Zou |
Domain-specific processor with 3D integration for medical image processing. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Tobias Beisel, Tobias Wiersema, Christian Plessl, André Brinkmann |
Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Tomás Martínek, Matej Lexa |
Architecture model for approximate tandem repeat detection. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Jason Cong |
Era of customization and specialization. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Chenglong Xiao, Emmanuel Casseau |
Efficient custom instruction enumeration for extensible processors. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Vahid Lari, Andriy Narovlyanskyy, Frank Hannig, Jürgen Teich |
Decentralized dynamic resource management support for massively parallel processor arrays. |
ASAP |
2011 |
DBLP DOI BibTeX RDF |
|
1 | Jonathan Piat, Shuvra S. Bhattacharyya, Mickaël Raulet |
Loop transformations for interface-based hierarchies IN SDF graphs. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Turbo Majumder, Souradip Sarkar, Partha Pratim Pande, Ananth Kalyanaraman |
An optimized NoC architecture for accelerating TSP kernels in breakpoint median problem. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Tobias Beisel, Manuel Niekamp, Christian Plessl |
Using shared library interposing for transparent application acceleration in systems with heterogeneous hardware accelerators. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | David B. Thomas, Wayne Luk |
An FPGA-specific algorithm for direct generation of multi-variate Gaussian random numbers. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Guillermo Payá Vayá, Javier Martín-Langerwerf, Holger Blume, Peter Pirsch |
A forwarding-sensitive instruction scheduling approach to reduce register file constraints in VLIW architectures. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Heng Kuang, Olga Ormandjieva, Stan Klasa, Jamal Bentahar |
A formal specification of fault-tolerance in prospecting asteroid mission with Reactive Autonomie Systems Framework. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Emrah Tasdemir, Götz Kappen, Tobias G. Noll |
Potential of using block floating point arithmetic in ASIP-based GNSS-receivers. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Jakub Szefer, Yu-Yuan Chen, Ruby B. Lee |
General-purpose FPGA platform for efficient encryption and hashing. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Raymond Manley, Paul Magrath, David Gregg |
Code generation for hardware accelerated AES. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Peng Li, Kunal Agrawal, Jeremy Buhler, Roger D. Chamberlain, Joseph M. Lancaster |
Deadlock-avoidance for streaming applications with split-join structure: Two case studies. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Ünal Koçabas, Junfeng Fan, Ingrid Verbauwhede |
Implementation of binary edwards curves for very-constrained devices. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Gaetan Canivet, Paolo Maistri, Régis Leveugle, Frédéric Valette, Jessy Clédière, Marc Renaudin |
Dependability analysis of a countermeasure against fault attacks by means of laser shots onto a SRAM-based FPGA. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Kazeem Alagbe Gbolagade, George Razvan Voicu, Sorin Dan Cotofana |
Memoryless RNS-to-binary converters for the {2n+1 - 1, 2n, 2n - 1} moduli set. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Nicolas Louvet, Jean-Michel Muller, Adrien Panhaleux |
Newton-Raphson algorithms for floating-point division using an FMA. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Amelia W. Azman, Abbas Bigdeli, Yasir Mohd-Mustafah, Morteza Biglari-Abhari, Brian C. Lovell |
A Bayesian network-based framework with Constraint Satisfaction Problem (CSP) formulations for FPGA system design. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Jian Li 0004, David Dickin, Lesley Shannon |
Customizing controller instruction sets for application-specific architectures. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Mohamed N. Hassan, Mohammed Benaissa, Anastasios Kanakis |
Flexible hardware/software co-design for scalable elliptic curve cryptography for low-resource applications. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Yocheved Dotan, Orgad Chen, Gil Katz |
Comparing the robustness of fault-tolerant enhancements when applied to lookup tables and random logic for nano-computing. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Christophe Alias, Alain Darte, Alexandru Plesco |
Optimizing DDR-SDRAM communications at C-level for automatically-generated hardware accelerators an experience with the Altera C2H HLS tool. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Jo Vliegen, Nele Mentens, Jan Genoe, An Braeken, Serge Kubera, Abdellah Touhafi, Ingrid Verbauwhede |
A compact FPGA-based architecture for elliptic curve cryptography over prime fields. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Sujay Deb, Amlan Ganguly, Kevin Chang 0002, Partha Pratim Pande, Benjamin Belzer, Deuk Hyoun Heo |
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Shaoshan Liu, Richard Neil Pittman, Alessandro Form, Jean-Luc Gaudiot |
On energy efficiency of reconfigurable systems with run-time partial reconfiguration. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit |
A C++-embedded Domain-Specific Language for programming the MORA soft processor array. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Jie Tang 0003, Shaoshan Liu, Zhimin Gu, Xiao-Feng Li, Jean-Luc Gaudiot |
Hardware-assisted middleware: Acceleration of garbage collection operations. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Maisam Mansub Bassiri, Hadi Shahriar Shahhoseini |
A New approach in on-line task scheduling for reconfigurable computing systems. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Tung Thanh Hoang, Ulf Jalmbrant, Erik der Hagopian, Kasyab P. Subramaniyan, Magnus Själander, Per Larsson-Edefors |
Design space exploration for an embedded processor with flexible datapath interconnect. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Adrien Le Masle, Wayne Luk |
Design space exploration of parametric pipelined designs. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Sani R. Nassif |
The light at the end of the CMOS tunnel. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Stephen Wray, Wayne Luk, Peter R. Pietzuch |
Exploring algorithmic trading in reconfigurable hardware. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Wei Liu 0016, Alberto Nannarelli |
Power dissipation challenges in multicore floating-point units. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Weijia Che, Karam S. Chatha |
Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Elif Bilge Kavun, Tolga Yalçin |
A pipelined camellia architecture for compact hardware implementation. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Xiao Peng 0002, Zhixiang Chen 0002, Xiongxin Zhao, Fumiaki Maehara, Satoshi Goto |
High parallel variation Banyan network based permutation network for reconfigurable LDPC decoder. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Mehdi Kamal, Neda Kazemian Amiri, Arezoo Kamran, Seyyed Alireza Hoseini, Masoud Dehyadegari, Hamid Noori |
Dual-purpose custom instruction identification algorithm based on Particle Swarm Optimization. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Florent de Dinechin, Mioara Joldes, Bogdan Pasca 0001 |
Automatic generation of polynomial-based hardware architectures for function evaluation. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Seung Chul Jung, Aviral Shrivastava, Ke Bai 0002 |
Dynamic code mapping for limited local memory systems. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Samuel Antao, Jean-Claude Bajard, Leonel Sousa |
Elliptic Curve point multiplication on GPUs. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Oguzhan Atak, Abdullah Atalar |
An efficient computation model for coarse grained reconfigurable architectures and its applications to a reconfigurable computer. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Chunshu Li, Kai Huang 0002, Xiaolang Yan, Jiong Feng, De Ma, Haitong Ge |
A high efficient memory architecture for H.264/AVC motion compensation. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Bo Xiang, Dan Bao, Shuangqu Huang, Xiaoyang Zeng |
A fully-overlapped multi-mode QC-LDPC decoder architecture for mobile WiMAX applications. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Dhara Dave, Christos Strydis, Georgi Gaydadjiev |
ImpEDE: A multidimensional design-space exploration framework for biomedical-implant processors. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Keisuke Dohi, Khaled Benkrid, Cheng Ling, Tsuyoshi Hamada, Yuichiro Shibata |
Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Ahmed Amine Jerraya |
Convergence of design and fabrication technologies, a key enabler for HW-SW integration. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Xun Li 0001, Mohit Tiwari, Timothy Sherwood, Frederic T. Chong |
Function flattening for lease-based, information-leak-free systems. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Jimit Shah, K. S. Raghunandan 0001, Kuruvilla Varghese |
Area optimized H.264 Intra prediction architecture for 1080p HD resolution. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Xin Fan 0003, Milos Krstic, Christoph Wolf, Eckhard Grass |
A GALS FFT processor with clock modulation for low-EMI applications. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Hritam Dutta, Frank Hannig, Moritz Schmid, Joachim Keinert |
Modeling and synthesis of communication subsystems for loop accelerator pipelines. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Arpith C. Jacob, Jeremy D. Buhler, Roger D. Chamberlain |
Design of throughput-optimized arrays from recurrence abstractions. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Nicolas Brisebarre, Nicolas Louvet, Érik Martin-Dorel, Jean-Michel Muller, Adrien Panhaleux, Milos D. Ercegovac |
Implementing decimal floating-point arithmetic through binary: Some suggestions. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | François Charot, Frank Hannig, Jürgen Teich, Christophe Wolinski (eds.) |
21st IEEE International Conference on Application-specific Systems Architectures and Processors, ASAP 2010, Rennes, France, 7-9 July 2010 |
ASAP |
2010 |
DBLP BibTeX RDF |
|
1 | Kazuya Katahira, Kentaro Sano, Satoru Yamamoto |
FPGA-based lossless compressors of floating-point data streams to enhance memory bandwidth. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Florian Brandner |
Completeness of automatically generated instruction selectors. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Antoine Floch, Christophe Wolinski, Krzysztof Kuchcinski |
Combined scheduling and instruction selection for processors with reconfigurable cell fabric. |
ASAP |
2010 |
DBLP DOI BibTeX RDF |
|
1 | Abdulhadi Shoufan, Thorsten Wink, H. Gregor Molter, Sorin A. Huss, Falko Strenzke |
A Novel Processor Architecture for McEliece Cryptosystem and FPGA Platforms. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
1 | Cao Liang, Xinming Huang 0001 |
Mapping Parallel FFT Algorithm onto SmartCell Coarse-Grained Reconfigurable Architecture. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|
1 | Lucas Vespa, Mini Mathew, Ning Weng |
P3FSM: Portable Predictive Pattern Matching Finite State Machine. |
ASAP |
2009 |
DBLP DOI BibTeX RDF |
|