Search results for "CASES"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Massimo Baleani, Alberto Ferrari, Leonardo Mangeruca, Alberto L. Sangiovanni-Vincentelli, Maurizio Peri, Saverio Pezzini	Fault-tolerant platforms for automotive safety-critical applications.	CASES	2003	DBLP DOI BibTeX RDF	fault-tolerant, VLSI, system-on-a-chip, automotive, safety critical, multi-processor
1	Jeremy Lau, Stefan Schoenmackers, Timothy Sherwood, Brad Calder	Reducing code size with echo instructions.	CASES	2003	DBLP DOI BibTeX RDF	code size optimization, echo instructions, compression
1	Lin Zhong 0001, Niraj K. Jha	Graphical user interface energy characterization for handheld computers.	CASES	2003	DBLP DOI BibTeX RDF	energy characterization, low power, GUI, graphical user interface, low power design, handheld computers
1	Osvaldo Colavin, Davide Rizzo	A scalable wide-issue clustered VLIW with a reconfigurable interconnect.	CASES	2003	DBLP DOI BibTeX RDF	clustered VLIW, reconfigurable co-processor (RCP), modulo scheduling, IDCT
1	Sumit Mohanty, Viktor K. Prasanna	A hierarchical approach for energy efficient application design using heterogeneous embedded systems.	CASES	2003	DBLP DOI BibTeX RDF	energy efficiency, design space exploration, performance estimation, heterogeneous embedded systems
1	Jeffry T. Russell, Margarida F. Jacome	Scenario-based software characterization as a contingency to traditional program profiling.	CASES	2002	DBLP DOI BibTeX RDF	program profile, typical behavior, performance, embedded system, static analysis, constraint, profiling, scenario, control flow, predicate
1	Karim Ben Chehida, Michel Auguin	HW / SW partitioning approach for reconfigurable system design.	CASES	2002	DBLP DOI BibTeX RDF	genetic algorithm, clustering, dynamic reconfiguration, codesign, HW/SW partitioning
1	Hillery C. Hunter, Wen-mei W. Hwu	Code coverage and input variability: effects on architecture and compiler research.	CASES	2002	DBLP DOI BibTeX RDF	architecture, compiler, benchmarks, DSP, telecommunications, code coverage
1	Franco Gatti, Andrea Acquaviva, Luca Benini, Bruno Riccò	Low Power Control Techniques For TFT LCD Displays.	CASES	2002	DBLP DOI BibTeX RDF
1	Mukund Sivaraman, Shail Aditya	Cycle-time aware architecture synthesis of custom hardware accelerators.	CASES	2002	DBLP DOI BibTeX RDF	embedded hardware architecture synthesis, operator chaining, target clock period, timing during scheduling, high-level synthesis, timing analysis, delay analysis, clock frequency
1	Bengu Li, Rajiv Gupta 0001	Bit section instruction set extension of ARM for embedded applications.	CASES	2002	DBLP DOI BibTeX RDF	bit section operations, multimedia data, network processing
1	Sumant Kowshik, Dinakar Dhurjati, Vikram S. Adve	Ensuring code safety without runtime checks for real-time control systems.	CASES	2002	DBLP DOI BibTeX RDF	security, real-time, compiler, static analysis, control, programming language
1	Gokhan Memik, William H. Mangione-Smith	Increasing power efficiency of multi-core network processors through data filtering.	CASES	2002	DBLP DOI BibTeX RDF	chip multiprocessors, network processors, data locality, remote procedure call, power reduction
1	Ravindra Jejurikar, Rajesh K. Gupta 0001	Energy aware task scheduling with task synchronization for embedded real time systems.	CASES	2002	DBLP DOI BibTeX RDF	frequency/voltage scaling, task synchronization, real-time, power aware scheduling, priority ceiling protocol
1	Mladen Nikitovic, Mats Brorsson	An adaptive chip-multiprocessor architecture for future mobile terminals.	CASES	2002	DBLP DOI BibTeX RDF	chip-multiprocessor (CMP), power consumption, mobile terminals, energy-aware scheduling
1	Tao Zhang 0037, Santosh Pande, André L. M. dos Santos, Franz Josef Bruecklmayr	Leakage-proof program partitioning.	CASES	2002	DBLP DOI BibTeX RDF	multi-application smart card, mobile code, tamper-resistance, program partitioning
1	Alwyn Goodloe, Michael McDougall, Carl A. Gunter, Rajeev Alur	Predictable programs in barcodes.	CASES	2002	DBLP DOI BibTeX RDF	active barcodes, code delivery, programmability of embedded devices, formal verification
1	Michael Ward, Neil C. Audsley	Hardware implementation of the Ravenscar Ada tasking profile.	CASES	2002	DBLP DOI BibTeX RDF	FPGA, timing, hardware compilation
1	Anders Nilsson 0003, Torbjörn Ekman 0001, Klas Nilsson	Real Java for real time - gain and pain.	CASES	2002	DBLP DOI BibTeX RDF	rtj, embedded systems, real-time Java
1	Sung I. Park, Mani B. Srivastava	Dynamic battery state aware approaches for improving battery utilization.	CASES	2002	DBLP DOI BibTeX RDF	battery aware design, battery simulation, power management, battery, service curve
1	Jack Liu, Fred C. Chow	A near-optimal instruction scheduler for a tightly constrained, variable instruction set embedded processor.	CASES	2002	DBLP DOI BibTeX RDF	configurable code generation, variable instruction set, embedded processor, instruction scheduling, dictionary, enumeration, program representation, resource modeling
1	Jian-Liang Kuo, Tien-Fu Chen	Dynamic voltage leveling scheduling for real-time embedded systems on low-power variable speed processors.	CASES	2002	DBLP DOI BibTeX RDF	real-time systems, low power, dynamic voltage scaling
1	Davide Bruni, Luca Benini, Bruno Riccò	System lifetime extension by battery management: an experimental work.	CASES	2002	DBLP DOI BibTeX RDF	lifetime extension, power management, battery
1	Dirk Fischer 0001, Jürgen Teich, Michael Thies, Ralph Weper	Efficient architecture/compiler co-exploration for ASIPs.	CASES	2002	DBLP DOI BibTeX RDF	architecture/compiler codesign, multiobjective design space exploration, ASIP, retargetable compilation
1	Jinhwan Kim, Sungjoon Jung, Yunheung Paek, Gang-Ryung Uh	Experience with a retargetable compiler for a commercial network processor.	CASES	2002	DBLP DOI BibTeX RDF	non-orthogonal architecture, compiler, network processor
1	Jayaprakash Pisharath, Alok N. Choudhary	An integrated approach to reducing power dissipation in memory hierarchies.	CASES	2002	DBLP DOI BibTeX RDF	RDRAM, dynamic cache, energy-saver buffers (ESB), power, integrated approach, energy-delay product
1	Jinson Koppanalil, Prakash Ramrakhyani, Sameer Desai, Anu Vaidyanathan, Eric Rotenberg	A case for dynamic pipeline scaling.	CASES	2002	DBLP DOI BibTeX RDF	configurable pipeline, fetch gating, power and energy management, shallow and deep pipelines, variable-depth pipeline, dynamic voltage scaling, clock gating
1	Raya Leviathan, Amir Pnueli	Validating software pipelining optimizations.	CASES	2002	DBLP DOI BibTeX RDF	optimization, verification, compilers, pipeline processors, translation validation
1	Esther Salamí, Jesús Corbal, Carlos Álvarez 0001, Mateo Valero	Cost effective memory disambiguation for multimedia codes.	CASES	2002	DBLP DOI BibTeX RDF	multimedia, VLIW, run-time analysis, time-to-market, memory disambiguation
1	Thomas Genssler, Alexander Christoph, Michael Winter 0007, Oscar Nierstrasz, Stéphane Ducasse, Roel Wuyts, Gabriela Arévalo, Bastiaan Schönhage, Peter O. Müller, Christian Stich	Components for embedded software: the PECOS approach.	CASES	2002	DBLP DOI BibTeX RDF	field devices, embedded systems, component based software development
1	Jiang Xu 0001, Wayne H. Wolf	Wave pipelining for application-specific networks-on-chips.	CASES	2002	DBLP DOI BibTeX RDF	system-on-chip (SoC), interconnection, networks-on-chip (NoC), wave pipelining, coupling capacitance
1	Stephen W. Melvin, Yale N. Patt	Handling of packet dependencies: a critical issue for highly parallel network processors.	CASES	2002	DBLP DOI BibTeX RDF	memory synchronization, packet dependencies, parallel processing, network processors, processor architecture, thread level speculation, multithreaded processors, packet processing
1	Shuvra S. Bhattacharyya, Trevor N. Mudge, Wayne H. Wolf, Ahmed Amine Jerraya (eds.)	Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2002, Greenoble, France, October 8-11, 2002	CASES	2002	DBLP BibTeX RDF
1	Daniel Ménard, Daniel Chillet, François Charot, Olivier Sentieys	Automatic floating-point to fixed-point conversion for DSP code generation.	CASES	2002	DBLP DOI BibTeX RDF	digital signal processing systems, floating-point to fixed-point conversion, quantization noise, code generation, DSP, fixed-point
1	Zhijian Lu, Jason Hein, Marty Humphrey, Mircea R. Stan, John C. Lach, Kevin Skadron	Control-theoretic dynamic frequency and voltage scaling for multimedia workloads.	CASES	2002	DBLP DOI BibTeX RDF	control theoretic, frequency/voltage scaling, multimedia, real-time, high performance, feedback control, low energy, power aware
1	Afzal Malik, Bill Moyer, Roger Zhou	Embedded cache architecture with programmable write buffer support for power and performance flexibility.	CASES	2002	DBLP DOI BibTeX RDF	cache control, copyback, push buffer, writethrough, programmable, cache management, write buffer
1	Amol Bakshi, Jingzhao Ou, Viktor K. Prasanna	Towards automatic synthesis of a class of application-specific sensor networks.	CASES	2002	DBLP DOI BibTeX RDF	sensor networks, energy efficiency, design environments, automatic synthesis
1	Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee	PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations.	CASES	2002	DBLP DOI BibTeX RDF	FPGA, low-power, compiler, SoC, synthesis, pipelining, VHDL, IP, ASIC, high-performance, FSM, Verilog, HDL, levelization
1	Hongbo Yang, Guang R. Gao, Clement Leung	On achieving balanced power consumption in software pipelined loops.	CASES	2002	DBLP DOI BibTeX RDF	power-aware compilation, instruction level parallelism, software pipelining
1	Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar	An efficient technique for exploring register file size in ASIP synthesis.	CASES	2002	DBLP DOI BibTeX RDF	ASIP Synthesis, retargetable estimation, storage exploration, design space exploration, instruction scheduling, register file, global analysis, register spill, liveness analysis
1	Dae-Hwan Kim, Hyuk-Jae Lee	Iterative procedural abstraction for code size reduction.	CASES	2002	DBLP DOI BibTeX RDF	post-pass optimization, embedded systems, optimizing compiler, code size reduction, procedural abstraction
1	Mahmut T. Kandemir, Ismail Kadayif, Alok N. Choudhary, Joseph Zambreno	Optimizing inter-nest data locality.	CASES	2002	DBLP DOI BibTeX RDF	array-intensive codes, inter-nest optimization, data reuse, cache locality, embedded applications
1	Andreas Weissel, Frank Bellosa	Process cruise control: event-driven clock scaling for dynamic power management.	CASES	2002	DBLP DOI BibTeX RDF	clock scaling, event counters, scheduling, power management
1	Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh	Instruction generation and regularity extraction for reconfigurable processors.	CASES	2002	DBLP DOI BibTeX RDF	control data-flow graph, template, slack, hardware compiler
1	Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm	A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture.	CASES	2001	DBLP DOI BibTeX RDF
1	Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob	Transparent data-memory organizations for digital signal processors.	CASES	2001	DBLP DOI BibTeX RDF
1	Björn Franke, Michael F. P. O'Boyle	An empirical evaluation of high level transformations for embedded processors.	CASES	2001	DBLP DOI BibTeX RDF
1	Shail Aditya, Michael S. Schlansker	ShiftQ: a bufferred interconnect for custom loop accelerators.	CASES	2001	DBLP DOI BibTeX RDF
1	Alberto La Rosa, Luciano Lavagno, Claudio Passerone	A software development tool chain for a reconfigurable processor.	CASES	2001	DBLP DOI BibTeX RDF
1	Friedhelm Stappert, Andreas Ermedahl, Jakob Engblom	Efficient longest executable path search for programs with complex flows and pipeline effects.	CASES	2001	DBLP DOI BibTeX RDF	pipeline timing, program flow, embedded systems, WCET, hard real-time, path search
1	Adam Johnson, Kenneth Mackenzie	Pattern matching in reconfigurable logic for packet classification.	CASES	2001	DBLP DOI BibTeX RDF
1	Michael Ward, Neil C. Audsley	Hardware compilation of sequential Ada.	CASES	2001	DBLP DOI BibTeX RDF	Ada
1	Yann-Hang Lee, Yoonmee Doh, C. Mani Krishna 0001	EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems.	CASES	2001	DBLP DOI BibTeX RDF	dynamic reclaiming, energy and power optimization, scheduling, real-time systems, voltage scaling
1	Sungjoon Jung, Yunheung Paek	The very portable optimizer for digital signal processors.	CASES	2001	DBLP DOI BibTeX RDF
1	Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob	The performance and energy consumption of three embedded real-time operating systems.	CASES	2001	DBLP DOI BibTeX RDF
1	Jan Sjödin, Carl von Platen	Storage allocation for embedded processors.	CASES	2001	DBLP DOI BibTeX RDF
1	Guang R. Gao, Trevor N. Mudge, Krishna V. Palem (eds.)	Proceedings of the 2001 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2001, Atlanta, Georgia, USA, November 16-17, 2001	CASES	2001	DBLP DOI BibTeX RDF
1	Timothy Sherwood, Brad Calder	Patchable instruction ROM architecture.	CASES	2001	DBLP DOI BibTeX RDF
1	Lakshmi N. Chakrapani, Pinar Korkmaz, Vincent John Mooney III, Krishna V. Palem, Kiran Puttaswamy, Weng-Fai Wong	The emerging power crisis in embedded processors: what can a poor compiler do?	CASES	2001	DBLP DOI BibTeX RDF
1	Anil Seth, Ravindra B. Keskar, R. Venugopal	Algorithms for energy optimization using processor instructions.	CASES	2001	DBLP DOI BibTeX RDF
1	Zhiyuan Li 0001, Cheng Wang 0019, Rong Xu	Computation offloading to save energy on handheld devices: a partition scheme.	CASES	2001	DBLP DOI BibTeX RDF
1	Kenneth Mackenzie, Eric Hudson, Drew Maule, Sundaresan Jayaraman, Sungmee Park	A prototype network embedded in textile fabric.	CASES	2001	DBLP DOI BibTeX RDF
1	Heidi Pan, Krste Asanovic	Heads and tails: a variable-length instruction format supporting parallel fetch and decode.	CASES	2001	DBLP DOI BibTeX RDF
1	K. Schneider, M. Wenz	A new method for compiling schizophrenic synchronous programs.	CASES	2001	DBLP DOI BibTeX RDF	code generation, reactive systems, synchronous languages
1	Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin	Energy-efficient instruction cache using page-based placement.	CASES	2001	DBLP DOI BibTeX RDF
1	Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu 0001	Combined partitioning and data padding for scheduling multiple loop nests.	CASES	2001	DBLP DOI BibTeX RDF
1	Christopher T. Weaver, Rajeev Krishna, Lisa Wu 0001, Todd M. Austin	Application specific architectures: a recipe for fast, flexible and power efficient designs.	CASES	2001	DBLP DOI BibTeX RDF
1	Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu	Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads.	CASES	2001	DBLP DOI BibTeX RDF
1	Olaf Lüthje, Martin Coors, Holger Keding	A novel approach to code analysis of digital signal processing systems.	CASES	2001	DBLP DOI BibTeX RDF
1	Oren Avissar, Rajeev Barua, Dave Stewart	Heterogeneous memory management for embedded systems.	CASES	2001	DBLP DOI BibTeX RDF	embedded, memory, heterogeneous, storage
1	Dirk Fischer 0001, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies	Design space characterization for architecture/compiler co-exploration.	CASES	2001	DBLP DOI BibTeX RDF
1	Bilge Saglam Akgul, Jaehwan Lee 0002, Vincent John Mooney III	A system-on-a-chip lock cache with task preemption support.	CASES	2001	DBLP DOI BibTeX RDF	lock synchronization, multi-processor synchronization, SoC, shared memory, RTOS, preemption
1	Alberto L. Sangiovanni-Vincentelli, Grant Martin	A vision for embedded software.	CASES	2001	DBLP DOI BibTeX RDF
1	Sungmee Park, Sundaresan Jayaraman	Textiles and computing: background and opportunities for convergence.	CASES	2001	DBLP DOI BibTeX RDF
1	Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo	Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures.	CASES	2001	DBLP DOI BibTeX RDF
1	Harry Dwyer, John Fernando	Establishing a tight bound on task interference in embedded system instruction caches.	CASES	2001	DBLP DOI BibTeX RDF
1	Mohamed Shalan, Vincent John Mooney III	A dynamic memory management unit for embedded real-time system-on-a-chip.	CASES	2000	DBLP DOI BibTeX RDF	SoCDMMU, two-level memory management, real-time systems, embedded systems, system-on-a-chip, dynamic memory management
1	Jürgen Teich, Ralph Weper, Dirk Fischer 0001, Stefan Trinkert	A joined architecture/compiler design environment for ASIPs.	CASES	2000	DBLP DOI BibTeX RDF
1	Randall S. Janka, Linda M. Wills	Specification and synthesis of real-time embedded distributed and parallel multiprocessor-based signal processing systems.	CASES	2000	DBLP DOI BibTeX RDF	MPI/RT, VCC, VSIPL, specification and design methodology, virtual component co-design, real-time, middleware, parallel processing, MPI, embedded, COTS, multiprocessing, MAGIC
1	Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung	Flexible instruction processors.	CASES	2000	DBLP DOI BibTeX RDF	instruction processors, high-level synthesis, ASIP
1	Jeff Tsay, Christopher Hylands, Edward A. Lee	A code generation framework for Java component-based designs.	CASES	2000	DBLP DOI BibTeX RDF	autocoding, Java, compilers, generators, embedded software
1	Subramanian Rajagopalan, Manish Vachharajani, Sharad Malik	Handling irregular ILP within conventional VLIW schedulers using artificial resource constraints.	CASES	2000	DBLP DOI BibTeX RDF
1	Antti Takko, Marko Hännikäinen, Jarno Knuutila, Timo Hämäläinen 0001, Jukka Saarinen	Embedding SDL implemented protocols into DSP.	CASES	2000	DBLP DOI BibTeX RDF	SDL implementation, wireless LAN, MAC protocol
1	Hsien-Hsin S. Lee, Gary S. Tyson	Region-based caching: an energy-delay efficient memory architecture for embedded processors.	CASES	2000	DBLP DOI BibTeX RDF
1	Timothy J. Callahan, John Wawrzynek	Adapting software pipelining for reconfigurable computing.	CASES	2000	DBLP DOI BibTeX RDF
1	Prashant Arora, Rajesh K. Gupta 0001	Design and implementation of a hierarchical exception handling extension to systemC.	CASES	2000	DBLP DOI BibTeX RDF	exception handling, systemC
1	Shige Wang, Kang G. Shin	An architecture for embedded software integration using reusable components.	CASES	2000	DBLP DOI BibTeX RDF	component-based integration, reconfigurable software, embedded systems, software architecture
1	Greg Stitt, Frank Vahid, Tony Givargis, Roman L. Lysecky	A first-step towards an architecture tuning methodology for low power.	CASES	2000	DBLP DOI BibTeX RDF	parameterized architectures, embedded systems, low-power, system-on-a-chip, cores, tuning
1	Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee	Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB.	CASES	2000	DBLP DOI BibTeX RDF
1		Proceedings of the 2000 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2000, San Jose, California, USA, November 7-18, 2000	CASES	2000	DBLP DOI BibTeX RDF
1	Koen Danckaert, Francky Catthoor, Hugo De Man	A preprocessing step for global loop transformations for data transfer optimization.	CASES	2000	DBLP DOI BibTeX RDF
1	Benoît Dupont de Dinechin, François de Ferrière, Christophe Guillon, Artour Stoutchinin	Code generator optimizations for the ST120 DSP-MCU core.	CASES	2000	DBLP DOI BibTeX RDF
1	Afzal Malik, Bill Moyer, Dan Cermak	A programmable unified cache architecture for embedded applications.	CASES	2000	DBLP DOI BibTeX RDF
1	Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin	Energy-oriented compiler optimizations for partitioned memory architectures.	CASES	2000	DBLP DOI BibTeX RDF
1	Santosh G. Abraham, B. Ramakrishna Rau	Efficient design space exploration in PICO.	CASES	2000	DBLP DOI BibTeX RDF	design space decomposition, hierarchical evaluation, multiple criteria optimization, multi-objective optimization, automated design
1	Daniel Weil, Valérie Bertin, Etienne Closse, Michel Poize, Patrick Venier, Jacques Pulou	Efficient compilation of ESTEREL for real-time embedded systems.	CASES	2000	DBLP DOI BibTeX RDF	reactive applications, embedded systems, real-time, compilation, synchronous, automata, ESTEREL
1	Fridtjof Siebert	Eliminating external fragmentation in a non-moving garbage collector for Java.	CASES	2000	DBLP DOI BibTeX RDF
1	Michel Barreteau, Juliette Mattioli, Thierry Grandpierre, Christophe Lavarenne, Yves Sorel, Philippe Bonnot 0001, Philippe Kajfasz	PROMPT: a mapping environment for telecom applications on "system-on-a-chip".	CASES	2000	DBLP DOI BibTeX RDF	mapping environment, embedded systems, constraint, system-on-a-chip, heterogeneous multiprocessor
1	Yonghong Song, Yuan Lin	Unroll-and-jam for imperfectly-nested loops in DSP applications.	CASES	2000	DBLP DOI BibTeX RDF
1	B. Ramakrishna Rau	The era of embedded computing.	CASES	2000	DBLP DOI BibTeX RDF

Publications at "CASES"( http://dblp.L3S.de/Venues/CASES )