Search results for "DEBUG"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
16	Arnaldo Azevedo, Bart Vermeulen, Kees Goossens	Architecture and design flow for a debug event distribution interconnect.	ICCD	2012	DBLP DOI BibTeX RDF
16	Kishore Kollu, Trey Jackson, Farhad Kharas, Anant Adke	Unifying design data during verification: Implementing Logic-Driven Layout analysis and debug.	ICICDT	2012	DBLP DOI BibTeX RDF
16	Yoav Apter, David H. Lorenz, Oren Mishali	A debug interface for debugging multiple domain specific aspect languages.	AOSD	2012	DBLP DOI BibTeX RDF
16	Amir Masoud Gharehbaghi, Masahiro Fujita	Transaction-based post-silicon debug of many-core System-on-Chips.	ISQED	2012	DBLP DOI BibTeX RDF
16	Mohammad Hossein Neishaburi, Zeljko Zilic	An enhanced debug-aware network interface for Network-on-Chip.	ISQED	2012	DBLP DOI BibTeX RDF
16	Xiao Liu 0011, Qiang Xu 0001	On efficient silicon debug with flexible trace interconnection fabric.	ITC	2012	DBLP DOI BibTeX RDF
16	Srikanth Venkataraman, Nagesh Tamarapalli	Tutorial T3: DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.	VLSI Design	2012	DBLP DOI BibTeX RDF
16	Feng Yuan, Xiao Liu 0011, Qiang Xu 0001	X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug.	DAC	2012	DBLP DOI BibTeX RDF
16	Ho Fai Ko, Adam B. Kinsman, Nicola Nicolici	Design-for-Debug Architecture for Distributed Embedded Logic Analysis.	IEEE Trans. Very Large Scale Integr. Syst.	2011	DBLP DOI BibTeX RDF
16	Ehab Anis Daoud, Nicola Nicolici	Embedded Debug Architecture for Bypassing Blocking Bugs During Post-Silicon Validation.	IEEE Trans. Very Large Scale Integr. Syst.	2011	DBLP DOI BibTeX RDF
16	Iftikhar Ahmed Khan, Willem-Paul Brinkman, Robert M. Hierons	Do moods affect programmers' debug performance?	Cogn. Technol. Work.	2011	DBLP DOI BibTeX RDF
16	Ehab Anis Daoud, Nicola Nicolici	On Using Lossy Compression for Repeatable Experiments during Silicon Debug.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF
16	Preeti Ranjan Panda, M. Balakrishnan, Anant Vishnoi	Compressing Cache State for Postsilicon Processor Debug.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF
16	André V. Fidalgo, Manuel G. Gericota, Gustavo R. Alves, José M. Ferreira 0001	Real-time fault injection using enhanced on-chip debug infrastructures.	Microprocess. Microsystems	2011	DBLP DOI BibTeX RDF
16	François Hantry, Mohand-Said Hacid	Handling Conflicts in Depth-First Search for LTL Tableau to Debug Compliance Based Languages	FLACOS	2011	DBLP DOI BibTeX RDF
16	Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin	A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback	CoRR	2011	DBLP BibTeX RDF
16	Simon Schenk, Renata Queiroz Dividino, Steffen Staab	Using provenance to debug changing ontologies.	J. Web Semant.	2011	DBLP DOI BibTeX RDF
16	Bart Vermeulen, Kees Goossens	Interactive Debug of SoCs with Multiple Clocks.	IEEE Des. Test Comput.	2011	DBLP DOI BibTeX RDF
16	Keith A. Bowman, Carlos Tokunaga, James W. Tschanz, Arijit Raychowdhury, Muhammad M. Khellah, Bibiche M. Geuskens, Shih-Lien Lu, Paolo A. Aseron, Tanay Karnik, Vivek K. De	All-Digital Circuit-Level Dynamic Variation Monitor for Silicon Debug and Adaptive Clock Control.	IEEE Trans. Circuits Syst. I Regul. Pap.	2011	DBLP DOI BibTeX RDF
16	Ernesto Sánchez 0001, Giovanni Squillero, Alberto Paolo Tonda	Automatic Generation of Software-based Functional Failing Test for Speed Debug and On-silicon Timing Verification.	MTV	2011	DBLP DOI BibTeX RDF
16	Masaru Shiozuka, Naoyasu Ubayashi, Yasutaka Kamei	Debug Concern Navigator.	SEKE	2011	DBLP BibTeX RDF
16	Markus Winterholer	Embedded software debug and test: Needs and requirements for innovations in debugging.	DATE	2011	DBLP BibTeX RDF
16	Akitoshi Matsuda, Tohru Ishihara	Developing an integrated verification and debug methodology.	DATE	2011	DBLP DOI BibTeX RDF
16	Xiao Liu 0011, Qiang Xu 0001	On multiplexed signal tracing for post-silicon debug.	DATE	2011	DBLP DOI BibTeX RDF
16	Andreas G. Veneris, Brian Keng, Sean Safarpour	From RTL to silicon: The case for automated debug.	ASP-DAC	2011	DBLP DOI BibTeX RDF
16	Hratch Mangassarian, Andreas G. Veneris, Duncan Exon Smith, Sean Safarpour	Debugging with dominance: On-the-fly RTL debug solution implications.	ICCAD	2011	DBLP DOI BibTeX RDF
16	Debapriya Chatterjee, Calvin McCarter, Valeria Bertacco	Simulation-based signal selection for state restoration in silicon debug.	ICCAD	2011	DBLP DOI BibTeX RDF
16	Tsung-Yen Tsai, Gordon W. Roberts	Programmable phase/frequency generator for system debug and diagnosis using the IEEE 1149.1 test bus.	CICC	2011	DBLP DOI BibTeX RDF
16	Peng Liu, Lixin Yu, Qin Hui	An Improved On-chip Debug Architecture for SPARC Processor based on Shadow Scan Technique.	PECCS	2011	DBLP BibTeX RDF
16	Virendra Singh, Masahiro Fujita	Tutorial: "Post silicon debug of SOC designs".	SoCC	2011	DBLP DOI BibTeX RDF
16	Kuen-Jong Lee, Alan P. Su, Long-Feng Chen, Jia-Wei Jhou, Jiff Kuo, Mark Liu	A software/hardware co-debug platform for multi-core systems.	ASICON	2011	DBLP DOI BibTeX RDF
16	Mohammad Hossein Neishaburi, Zeljko Zilic	Debug Aware AXI-based Network Interface.	DFT	2011	DBLP DOI BibTeX RDF
16	Eddie Hung, Steven J. E. Wilton	On evaluating signal selection algorithms for post-silicon debug.	ISQED	2011	DBLP DOI BibTeX RDF
16	Kameshwar Chandrasekar, Surendra Bommu, Sanjay Sengupta	Low Coverage Analysis using dynamic un-testability debug in ATPG.	VTS	2011	DBLP DOI BibTeX RDF
16	Ruo Ando, Kuniyasu Suzaki	A Lightweight Access Log Filter of Windows OS Using Simple Debug Register Manipulation.	FGIT-SecTech	2011	DBLP DOI BibTeX RDF
16	Jing Zeng	Challenges and best practices in advanced silicon debug.	ITC	2011	DBLP DOI BibTeX RDF
16	Kuo-An Chen, Tsung-Wei Chang, Meng-Chen Wu, Mango Chia-Tso Chao, Jing-Yang Jou, Sonair Chen	Design-for-debug layout adjustment for FIB probing and circuit editing.	ITC	2011	DBLP DOI BibTeX RDF
16	M. Enamul Amyeen, Andal Jayalakshmi, Srikanth Venkataraman, Sundar V. Pathy, Ewe C. Tan	Logic BIST silicon debug and volume diagnosis methodology.	ITC	2011	DBLP DOI BibTeX RDF
16	Kanad Basu, Prabhat Mishra 0001, Priyadarsan Patra	Efficient combination of trace and scan signals for post silicon validation and debug.	ITC	2011	DBLP DOI BibTeX RDF
16	Sandesh Prabhakar, Rajamani Sethuram, Michael S. Hsiao	Trace Buffer-Based Silicon Debug with Lossless Compression.	VLSI Design	2011	DBLP DOI BibTeX RDF
16	Kanad Basu, Prabhat Mishra 0001	Efficient Trace Signal Selection for Post Silicon Validation and Debug.	VLSI Design	2011	DBLP DOI BibTeX RDF
16	Juan Carlos Acosta Guadarrama	Towards a Logic-programming System to Debug ASP Knowledge Bases.	LA-NMR	2011	DBLP BibTeX RDF
16	Cristian Zamfir, Gautam Altekar, George Candea	Debug Determinism: The Sweet Spot for Replay-Based Debugging.	HotOS	2011	DBLP BibTeX RDF
16	Zachary K. Baker, Mark E. Dunham, Keith Morgan, Michael Pigue, Matthew Stettler, Paul S. Graham, Eric N. Schmierer, John Power	Space-Based FPGA Radio Receiver Design, Debug, and Development of a Radiation-Tolerant Computing System.	Int. J. Reconfigurable Comput.	2010	DBLP DOI BibTeX RDF
16	Jianliang Gao, Yinhe Han 0001, Xiaowei Li 0001	A Novel Post-Silicon Debug Mechanism Based on Suspect Window.	IEICE Trans. Inf. Syst.	2010	DBLP DOI BibTeX RDF
16	Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Matteo Sonza Reorda	Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug.	IET Comput. Digit. Tech.	2010	DBLP DOI BibTeX RDF
16	Hratch Mangassarian, Andreas G. Veneris, Marco Benedetti	Robust QBF Encodings for Sequential Circuits with Applications to Verification, Debug, and Test.	IEEE Trans. Computers	2010	DBLP DOI BibTeX RDF	k-induction, sequential ATPG, SAT, QBF, design debugging, BMC
16	Robert S. Laramee	Using Visualization to Debug Visualization Software.	IEEE Computer Graphics and Applications	2010	DBLP DOI BibTeX RDF
16	Pierre-Marc Fournier, Michel R. Dagenais	Analyzing blocking to debug performance problems on multi-core systems.	ACM SIGOPS Oper. Syst. Rev.	2010	DBLP DOI BibTeX RDF
16	Brian Keng, Andreas G. Veneris, Sean Safarpour	An Automated Framework for Correction and Debug of PSL Assertions.	MTV	2010	DBLP DOI BibTeX RDF
16	Preeti Ranjan Panda, Anant Vishnoi, M. Balakrishnan	Enhancing post-silicon processor debug with Incremental Cache state Dumping.	VLSI-SoC	2010	DBLP DOI BibTeX RDF
16	Grant Martin, Albrecht Mayer	Panel 6.8: The challenges of heterogeneous multicore debug.	DATE	2010	DBLP BibTeX RDF
16	Mohammad Hossein Neishaburi, Zeljko Zilic	Enabling efficient post-silicon debug by clustering of hardware-assertions.	DATE	2010	DBLP DOI BibTeX RDF
16	Erik Larsson, Bart Vermeulen, Kees Goossens	A distributed architecture to check global properties for post-silicon debug.	ETS	2010	DBLP DOI BibTeX RDF
16	Jing Zeng, Ruifeng Guo, Wu-Tung Cheng, Michael Mateja, Jing Wang, Kun-Han Tsai, Ken Amstutz	Scan based speed-path debug for a microprocessor.	ETS	2010	DBLP DOI BibTeX RDF
16	Del Myers, Margaret-Anne D. Storey, Martin Salois	Utilizing Debug Information to Compact Loops in Large Program Traces.	CSMR	2010	DBLP DOI BibTeX RDF
16	Bart Vermeulen, Kees Goossens	Obtaining consistent global state dumps to interactively debug systems on chip with multiple clocks.	HLDVT	2010	DBLP DOI BibTeX RDF
16	Henri Heiskanen, Antti Jääskeläinen, Mika Katara	Debug Support for Model-Based GUI Testing.	ICST	2010	DBLP DOI BibTeX RDF
16	Richard Phillips, Bonnie Montalvo	Using emulation to debug control logic code.	WSC	2010	DBLP DOI BibTeX RDF
16	Michelangelo Grosso, Matteo Sonza Reorda, Marta Portela-García, Mario García-Valderas, Celia López-Ongil, Luis Entrena	An on-line fault detection technique based on embedded debug features.	IOLTS	2010	DBLP DOI BibTeX RDF
16	Nicola Nicolici	On improving real-time observability for in-system post-silicon debug.	LATW	2010	DBLP DOI BibTeX RDF
16	Yu-Shen Yang, Brian Keng, Nicola Nicolici, Andreas G. Veneris, Sean Safarpour	Automated silicon debug data analysis techniques for a hardware data acquisition environment.	ISQED	2010	DBLP DOI BibTeX RDF
16	Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aamodt	Accelerating trace computation in post-silicon debug.	ISQED	2010	DBLP DOI BibTeX RDF
16	Smriti Gupta	Innovative practices session 5C: Post-silicon debug.	VTS	2010	DBLP DOI BibTeX RDF
16	Nick Papoylias	High-Level Debugging Facilities and Interfaces: Design and Developement of a Debug-Oriented I.D.E. (PDF / PS)	OSS	2010	DBLP DOI BibTeX RDF
16	Loïc Lagadec, Damien Picard	Smalltalk debug lives in the matrix.	IWST	2010	DBLP DOI BibTeX RDF
16	Kypros Constantinides, Todd M. Austin	Using introspective software-based testing for post-silicon debug and repair.	DAC	2010	DBLP DOI BibTeX RDF
16	Ehab Anis Daoud, Nicola Nicolici	Real-Time Lossless Compression for Silicon Debug.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
16	Emilio Serrano, Jorge J. Gómez-Sanz, Juan A. Botía, Juan Pavón	Intelligent data analysis applied to debug complex software systems.	Neurocomputing	2009	DBLP DOI BibTeX RDF
16	Stefan Holst, Hans-Joachim Wunderlich	Adaptive Debug and Diagnosis Without Fault Dictionaries.	J. Electron. Test.	2009	DBLP DOI BibTeX RDF
16	Apostolos Syropoulos	Can we debug the Universe?	CoRR	2009	DBLP BibTeX RDF
16	Ishwar Parulkar, Babu Turumella	Comprehensive Approach to High-Performance Server Chipset Debug.	IEEE Des. Test Comput.	2009	DBLP DOI BibTeX RDF
16	Alberto de la Encina, Mercedes Hidalgo-Herrero, Pablo Rabanal, Fernando Rubio 0001	Applying Evolutionary Techniques to Debug Functional Programs.	IWANN (1)	2009	DBLP DOI BibTeX RDF
16	Byeongcheol Lee, Martin Hirzel, Robert Grimm 0001, Kathryn S. McKinley	Debug all your code: portable mixed-environment debugging.	OOPSLA	2009	DBLP DOI BibTeX RDF	composition, JNI, foreign function interface
16	Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishnan	Cache aware compression for processor debug support.	DATE	2009	DBLP DOI BibTeX RDF
16	Yu-Shen Yang, Nicola Nicolici, Andreas G. Veneris	Automated data analysis solutions to silicon debug.	DATE	2009	DBLP DOI BibTeX RDF
16	Raimund Ubar, Sergei Kostin, Jaan Raik	Block-Level Fault Model-Free Debug and Diagnosis in Digital Systems.	DSD	2009	DBLP DOI BibTeX RDF
16	Ruifeng Guo, Wu-Tung Cheng, Kun-Han Tsai	Speed-Path Debug Using At-Speed Scan Test Patterns.	ETS	2009	DBLP DOI BibTeX RDF
16	Nicola Nicolici, Ho Fai Ko	Design-for-debug for post-silicon validation: Can high-level descriptions help?	HLDVT	2009	DBLP DOI BibTeX RDF
16	Sunil R. Shenoy	Leadership Microprocessors: Validation, debug and test.	HLDVT	2009	DBLP DOI BibTeX RDF
16	Sandesh Prabhakar, Michael S. Hsiao	Using Non-trivial Logic Implications for Trace Buffer-Based Silicon Debug.	Asian Test Symposium	2009	DBLP DOI BibTeX RDF
16	Yeonbok Lee, Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita	A Post-Silicon Debug Support Using High-Level Design Description.	Asian Test Symposium	2009	DBLP DOI BibTeX RDF
16	Seyyed Amir Asghari, Hamid R. Zarandi, Hossein Pedram, Morteza Ansarinia, Mohammad Khademi	A Fault Injection Attitude based on Background Debug Mode in Embedded Systems.	CDES	2009	DBLP BibTeX RDF
16	Zachary K. Baker, Joshua S. Monson	In-situ FPGA Debug Driven by On-Board Microcontroller.	FCCM	2009	DBLP DOI BibTeX RDF	Extreme Environments, FPGA, Debugging, Space, JTAG
16	Degui Feng, Jian Chen, Like Yan, Binbin Wu, Xueqing Lou, Tianzhou Chen	The Implementation of a Mobile Java Debug Tool.	ScalCom-EmbeddedCom	2009	DBLP DOI BibTeX RDF
16	Nicolas Pouillon, Alexandre Bécoulet, Aline Vieira de Mello, François Pêcheux, Alain Greiner	A Generic Instruction Set Simulator API for Timed and Untimed Simulation and Debug of MP2-SoCs.	IEEE International Workshop on Rapid System Prototyping	2009	DBLP DOI BibTeX RDF
16	Kuen-Jong Lee, Si-Yuan Liang, Alan P. Su	A low-cost SOC debug platform based on on-chip test architectures.	SoCC	2009	DBLP DOI BibTeX RDF
16	Eduardo Ribeiro da Silva, F. Costa, Frank Herman Behrens, Remerson Stein Kickhofel, Ricardo Maltione	Using mixed-mode test bus architecture to RF-based fault injection analysis and EMC fault debug.	LATW	2009	DBLP DOI BibTeX RDF
16	Stefano Di Carlo, Nadereh Hatami, Paolo Prinetto, Alessandro Savino	System Level Testing via TLM 2.0 Debug Transport Interface.	DFT	2009	DBLP DOI BibTeX RDF
16	Joon-Sung Yang, Nur A. Touba	Automated Selection of Signals to Observe for Efficient Silicon Debug.	VTS	2009	DBLP DOI BibTeX RDF
16	Richard McLaughlin, Srikanth Venkataraman, Carlston Lim	Automated Debug of Speed Path Failures Using Functional Tests.	VTS	2009	DBLP DOI BibTeX RDF
16	Jianliang Gao, Yinhe Han 0001, Xiaowei Li 0001	A New Post-Silicon Debug Approach Based on Suspect Window.	VTS	2009	DBLP DOI BibTeX RDF
16	Rex Petersen, Pankaj Pant, Pablo Lopez, Aaron Barton, Jim Ignowski, Doug Josephson	Voltage transient detection and induction for debug and test.	ITC	2009	DBLP DOI BibTeX RDF
16	M. Enamul Amyeen, Srikanth Venkataraman, Mun Wai Mak	Microprocessor system failures debug and fault isolation methodology.	ITC	2009	DBLP DOI BibTeX RDF
16	Christian Boit, Rudolf Schlangen, Uwe Kerst, Ted R. Lundquist	Physical Techniques for Chip-Backside IC Debug in Nanotechnologies.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
16	Khairul Khusyari, Wei Tee Ng, Neal Jaarsma, Robert Abraham, Peng Weng Ng, Boon Hui Ang, Chin Hu Ong	Diagnosis of Voltage Dependent Scan Chain Failure Using VBUMP Scan Debug Method.	ATS	2008	DBLP DOI BibTeX RDF
16	Hyunbean Yi, Sungju Park, Sandip Kundu	A Design-for-Debug (DfD) for NoC-Based SoC Debugging via NoC.	ATS	2008	DBLP DOI BibTeX RDF
16	Xiao Liu 0011, Qiang Xu 0001	On Reusing Test Access Mechanisms for Debug Data Transfer in SoC Post-Silicon Validation.	ATS	2008	DBLP DOI BibTeX RDF
16	Mike Li, Gordon W. Roberts	Session 4 - High-speed test, characterization, and debug.	CICC	2008	DBLP DOI BibTeX RDF
16	Jan Lönnberg, Lauri Malmi, Anders Berglund	Helping students debug concurrent programs.	Koli Calling	2008	DBLP DOI BibTeX RDF