Search results for "Prototyping"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
26	Cécile Braunstein, Emmanuelle Encrenaz	Formalizing the Incremental Design and Verification Process of a Pipelined Protocol Converter.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir	Creation and Validation of Embedded Assertion Statecharts.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Marcio F. da S. Oliveira, Lisane B. de Brisolara, Luigi Carro, Flávio Rech Wagner	Early Embedded Software Design Space Exploration Using UML-Based Estimation.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26		Conference Committees.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Tianzhou Chen, Yin Yan, Hongjun Dai, Hu Wei	An Agile BSP Modeling Methodology: Cross Platform BSP Framework (CPBF).	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Lobna Kriaa, Aimen Bouchhima, Wassim Youssef, Frédéric Pétrot, Anne-Marie Fouillart, Ahmed Amine Jerraya	Service Based Component Design Approach for Flexible Hardware/Software Interface Modeling.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF	Simulation interfaces, Service-based model, Interface design automation, Systems-on-Chip
26	Christoforos Kachris, Stamatis Vassiliadis	Performance Evaluation of an Adaptive FPGA for Network Applications.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Melissa Vetromille, Luciano Ost, César A. M. Marcon, Carlos Eduardo Reif, Fabiano Hessel	RTOS Scheduler Implementation in Hardware and Software for Real Time Applications.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Smaïl Niar, Nicolas Inglart	Rapid Performance and Power Consumption Estimation Methods for Embedded System Design.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26		Acknowledgments.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26	Kenneth B. Kent, Ryan B. Proudfoot, Yong Zhao	Parameter-Specific FPGA Implementation of Edit-Distance Calculation.	IEEE International Workshop on Rapid System Prototyping	2006	DBLP DOI BibTeX RDF
26		16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 8-10 June 2005, Montreal, Canada	IEEE International Workshop on Rapid System Prototyping	2005	DBLP BibTeX RDF
26	Romain Lemaire, Fabien Clermidy, Yves Durand, Didier Lattard, Ahmed Amine Jerraya	Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Kugan Vivekanandarajah, Thambipillai Srikanthan	Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Levi Lucio, Luis Pedro, Didier Buchs	A Test Language for CO-OPN Specifications.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Thomas S. Hall, Kenneth B. Kent	Thread-Level Parallel Execution in Co-Designed Virtual Machines.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Sanggyu Park, Soo-Ik Chae	A C/C++-Based Functional Verification Framework Using the SystemC Verification Library.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26		Message from the Organizing Chair.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Nikolaos Kostaras, Haridimos T. Vergos	KoVer: A Sophisticated Residue Arithmetic Core Generator.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Luke Demoracski, Dimiter R. Avresky	An Approach for Functional Decomposition Applied to State-Based Designs.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Rolf Drechsler, Görschwin Fey, Christian Genz, Daniel Große	SyCE: An Integrated Environment for System Design in SystemC.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Matthieu Briere, Emmanuel Drouard, Fabien Mieyeville, David Navarro, Ian O'Connor, Frédéric Gaffiot	Heterogeneous Modelling of an Optical Network-on-Chip with SystemC.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Faouzi Bouchhima, Gabriela Nicolescu, El Mostapha Aboulhamid, Mohamed Abid	Discrete-Continuous Simulation Model for Accurate Validation in Component-Based Heterogeneous SoC Design.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen	A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley, Jean-Pierre David	High Level Synthesis for Data-Driven Applications.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Yana Esteves Krasteva, Ana B. Jimeno, Eduardo de la Torre, Teresa Riesgo	Straight Method for Reallocation of Complex Cores by Dynamic Reconfiguration in Virtex II FPGAs.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	César A. M. Marcon, Márcio Eduardo Kreutz, Altamiro Amadeu Susin, Ney Laert Vilar Calazans	Models for Embedded Application Mapping onto NoCs: Timing Analysis.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Arnaldo Azevedo, Luciano Volcan Agostini, Flávio Rech Wagner, Sergio Bampi	Accelerating a Multiprocessor Reconfigurable Architecture with Pipelined VLIW Units.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26		Message from the Program Chairs.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26		Message from the General Chairs.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Pavle Belanovic, Markus Rupp	Automated Floating-Point to Fixed-Point Conversion with the Fixify Environment.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26		Conference Committees.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Ghulam Qader, M. Younus Javed	Simulation of Resolution of CS Problem for Multiple Common Variables in Multiprocessor Environment.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Moo-Kyoung Chung, Heejun Shim, Chong-Min Kyung	Performance Improvement of Multiprocessor Simulation by Optimizing Synchronization a Communication.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Oliver Schliebusch, Anupam Chattopadhyay, Ernst Martin Witte, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr	Optimization Techniques for ADL-Driven RTL Processor Synthesis.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Benny Thörnberg, Leif Olsson, Mattias O'Nils	Optimization of Memory Allocation for Real-Time Video Processing on FPGA.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Arnaud Grasset, Frédéric Rousseau 0001, Ahmed Amine Jerraya	Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu	Leveraging Model Representations for System Level Design Tools.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26	Ben Cordes, Jennifer G. Dy, Miriam Leeser, James Goebel	Enabling a Real-Time Solution for Neuron Detection with Reconfigurable Hardware.	IEEE International Workshop on Rapid System Prototyping	2005	DBLP DOI BibTeX RDF
26		15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland	IEEE International Workshop on Rapid System Prototyping	2004	DBLP BibTeX RDF
26	David J. Greaves	Automated Hardware Synthesis from Formal Specification Using SAT Solvers.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Daniel Denning, James Irvine, Derek Stark, Malachy Devlin	Multi-User FPGA Co-Simulation over TCP/IP.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Moo-Kyoung Chung, Chong-Min Kyung	Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Ki-Seok Bang, Jin-Young Choi, Sung-Ho Jang	Formal Specification and Verification of Embedded System with Shared Resources.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Ying Chen, Dennis Abts, David J. Lilja	State Pruning for Test Vector Generation for a Multiprocessor Cache Coherence Protocol.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Arnaud Grasset, Frédéric Rousseau 0001, Ahmed Amine Jerraya	Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Hideaki Yanagisawa, Minoru Uehara, Hideki Mori	Automatic Generation of a Simulation Compiler by a HW/SW Co-Design System.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Fabiano Hessel, Vitor M. da Rosa, Igor M. Reis, Ricardo Planner, César A. M. Marcon, Altamiro Amadeu Susin	Abstract RTOS Modeling for Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	M. Diaby, Matthieu Tuna, Jean Lou Desbarbieux, Franck Wajsbürt	High Level Synthesis Methodology from C to FPGA Used for a Network Protocol Communication.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF	KPN, FPGA, High Level Synthesis, Code Generator, VHDL, Hardware/Software codesign
26	Amjad Mohsen, Richard Hofmann	Characterizing Power Consumption and Delay of Functional/Library Components for Hardware/Software Co-Design of Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Frédéric Gilliers, Jean-Pierre Velu, Fabrice Kordon	Generation of Distributed Programs in Their Target Execution Environment.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	André Meisel, Markus Visarius, Wolfram Hardt, Stefan Ihmor	Self-Reconfiguration of Communication Interfaces.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Shane Sendall	Domain Driven Software Development -- A World of Transformations.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	James Bret Michael, Man-tak Shing, Michael H. Miklaski, Joel D. Babbitt	Modeling and Simulation of System-of-Systems Timing Constraints with UML-RT and OMNeT++.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber	SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Doron Drusinsky, Man-tak Shing	TLCharts: Armor-plating Harel Statecharts with Temporal Logic Conditions.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Rolf Drechsler	Towards Formal Verification on the System Level.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Adriano Sarmento, Wander O. Cesário, Ahmed Amine Jerraya	Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26	Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya	An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor.	IEEE International Workshop on Rapid System Prototyping	2004	DBLP DOI BibTeX RDF
26		14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 9-11 June 2003, San Diego, CA, USA	IEEE International Workshop on Rapid System Prototyping	2003	DBLP BibTeX RDF
26	Ludovic Tambour, Nacer-Eddine Zergainoh, Pascal Urard, Henri Michel, Ahmed Amine Jerraya	An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Tarek M. Taha, D. Scott Wills	An Instruction Throughput Model of Superscalar Processors.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Stefan Förster, Marco Fischer, André Windisch, Burkhard Balser, Dieter Monjau	A New Specification Methodology for Embedded Systems Based on the - Calculus Process Algebra.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Abhijit K. Deb, Johnny Öberg, Axel Jantsch	Simulation and Analysis of Embedded DSP Systems Using Petri Nets.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Paul Young, Nabendu Chaki, Valdis Berzins, Luqi	Evaluation of Middleware Architectures in Achieving System Interoperability.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Ryan J. Fong, Scott J. Harper, Peter M. Athanas	A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Prabhat Mishra 0001, Arun Kejariwal, Nikil D. Dutt	Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni	Synthesis of LOTOS Specification of the IEEE-1394 Firewire Protocol.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Jérôme Hugues, Laurent Pautet, Fabrice Kordon	Contributions to middleware architectures to prototype distribution infrastructures.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Vincent Bassano, Gilles Bernot	Marked Regulatory Graphs: A Formal Framework to Simulate Biological Regulatory Networks with Simple Automata.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF
26	Apostolos Dollas, Dionissios Efstathiou, Thomas Kyriakides	A Universal Low Cost Run-Time and Programming Environment for Reconfigurable Computing.	IEEE International Workshop on Rapid System Prototyping	2003	DBLP DOI BibTeX RDF	FPGA programming, testability, Run time environment
26		13th IEEE International Workshop on Rapid System Prototyping (RSP 2002), 1-3 July 2002, Darmstadt, Germany	IEEE International Workshop on Rapid System Prototyping	2002	DBLP BibTeX RDF
26	Sushil Chandra Jain, Anshul Kumar, Shashi Kumar	Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26	Christian Hinkelbein, Andreas Kugel, Reinhard Männer, Matthias Müller 0006	Reconfigurable Hardware Control Software.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26	Mário P. Véstias, Horácio C. Neto	System-Level Co-Synthesis of Dataflow Dominated Applications on Reconfigurable Hardware/Software Architectures.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26	Stanislav Chachkov, Didier Buchs	Interfacing Software Libraries from Non-deterministic Prototypes.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26	Guoqiang Shu, Chao Li, Qing Wang 0001, Mingshu Li 0001	Validating Objected-Oriented Prototype of Real-Time Systems with Timed Automata.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26	Hideaki Yanagisawa, Minoru Uehara, Hideki Mori	ISA Based System Design Language in HW/SW Co-Design Environment.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26	Akira Kitajima, Toshiyuki Sasaki, Yoshinori Takeuchi, Masaharu Imai	Design of Application Specific CISC Using PEAS-III.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
26		12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 25-27 June 2001, Monterey, CA, USA	IEEE International Workshop on Rapid System Prototyping	2001	DBLP BibTeX RDF
26	Nadia Nedjah, Luiza de Macedo Mourelle	How Many CLBs Does Your Circuit Need to be Implemented?.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya	Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Dimitris Bakalis, Kostas Adaos, George Alexiou, Dimitris Nikolos, D. Lymperopoulos	EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Denis Hommais, Frédéric Pétrot, Ivan Augé	A Tool Box to Map System Level Communications on HW/SW Architectures.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Stanislav Chachkov, Didier Buchs	From an Abstract Object-Oriented Model to a Ready-to-Use Embedded System Controller.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Gerd Nusser, Ralf-Dieter Schimkat	Rapid Application Development of Middleware Components by Using XML.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Anneliese Amschler Andrews	The Colorado Advanced Software Institute: From Virtual Research Laboratory to Software Clinic.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP BibTeX RDF
26	Valentin Muresan, Xiaojun Wang 0001, Valentina Muresan, Mircea Vladutiu	Mixed Classical Scheduling Algorithms and Tree Growing Technique in Block-Test Scheduling under Power Constraints.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Pirouz Bazargan-Sabet, Laurent Vuillemin	An Approach to Mapping the Timing Behavior of VLSI Circuits on Emulators.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Gilles Sassatelli, Gaston Cambon, Jérôme Galy, Lionel Torres	A Dynamically Reconfigurable Architecture for Embedded Systems.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Sias Mostert, Nathalie Cossement, Rudy Lauwereins, Jef L. van Meerbergen	DF*: Modeling Dynamic Process Creation and Events for Interactive Multimedia Applications.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Stephen P. G. Chappell	Rapid Development of Reconfigurable Systems.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	William J. Ray, Andy Farrar	Object Model Driven Code Generation for the Enterprise.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26	Cesare Alippi, William Fornaciari, Laura Pozzi, Mariagiovanna Sami	Determining the Optimum Extended Instruction-Set Architecture for Application Specific Reconfigurable VLIW CPUs.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
26		Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), Paris, France, June 21-23, 2000	IEEE International Workshop on Rapid System Prototyping	2000	DBLP BibTeX RDF
26	Eduardo de la Torre, Teresa Riesgo, Javier Uceda, E. Macip, M. Rizzi	Highly Configurable Control Boards: A Tool and a Design Experience.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF
26	Romain Kamdem, Alain Fonkoua	Coprocessor Synthesis of Multirate System Using Static Scheduling Theory.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	scheduling, real time, Codesign, codesign, hardware/software partitioning, target architecture
26	Vijay K. Jain	Mapping a High-Speed Wireless Communication Function to the Reconfigurable J-Platform.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF
26	Göran Eggers, Hans Christoph Zeidler	Efficient Clock-Cycle Precise Simulation at Architecture Level in C++.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF
26	David J. Greaves	A Verilog to C Compiler.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF