Search results for "Routability"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
11	Yen-Tai Lai, Ping-Tsung Wang	Hierarchical interconnection structures for field programmable gate arrays.	IEEE Trans. Very Large Scale Integr. Syst.	1997	DBLP DOI BibTeX RDF
11	Andrew Lim 0001, Venkat Thanvantri, Sartaj Sahni	Planar topological routing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
11	Shashidhar Thakur, Yao-Wen Chang, Martin D. F. Wong, S. Muthukrishnan 0001	Algorithms for an FPGA switch module routing problem with application to global routing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1997	DBLP DOI BibTeX RDF
11	Maggie Zhiwei Kang, Wayne Wei-Ming Dai, Tom Dillinger, David P. LaPotin	Delay bounded buffered tree construction for timing driven floorplanning.	ICCAD	1997	DBLP DOI BibTeX RDF	Total Wire Length, DBB-tree, SPT, Floorplanning, Buffer Insertion, Delay Bounds, Elmore Delay, MST
11	Chingwei Yeh, Chi-Shong Wang	On the integration of partitioning and global routing for rectilinear placement problems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
11	Chunghee Kim, Hyunchul Shin	A performance-driven logic emulation system: FPGA network design and performance-driven partitioning.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
11	Robert C. Carden IV, Jianmin Li, Chung-Kuan Cheng	A global router with a theoretical bound on the optimal solution.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1996	DBLP DOI BibTeX RDF
11	Dongsheng Wang 0012, Ernest S. Kuh	Performance-Driven Interconnect Global Routing.	Great Lakes Symposium on VLSI	1996	DBLP DOI BibTeX RDF
11	Carl Ebeling, Larry McMurchie, Scott Hauck, Steven M. Burns	Placement and routing tools for the Triptych FPGA.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
11	Vijayshri Maheshwari, Joel Darnauer, John Ramirez, Wayne Wei-Ming Dai	Design of FPGAs with Area I/O for Field Programmable MCM.	FPGA	1995	DBLP DOI BibTeX RDF
11	Tianxiong Xue, Ernest S. Kuh	Post routing performance optimization via multi-link insertion and non-uniform wiresizing.	ICCAD	1995	DBLP DOI BibTeX RDF	post routing performance optimization, link insertion and wiresizing, delay skew, routing area, delay
11	Chingwei Yeh, Lung-Tien Liu, Chung-Kuan Cheng, T. C. Hu, S. Ahmed, M. Liddel	Block-oriented programmable design with switching network interconnect.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
11	Jagannathan Narasimham, Kazuo Nakajima, Chong S. Rim, Anton T. Dahbura	Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1994	DBLP DOI BibTeX RDF
11	Massoud Pedram, Bahman S. Nobandegani, Bryan Preas	Design and analysis of segmented routing channels for row-based FPGA's.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1994	DBLP DOI BibTeX RDF
11	Suphachai Sutanthavibul, Eugene Shragowitz, Rung-Bin Lin	An adaptive timing-driven placement for high performance VLSIs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1993	DBLP DOI BibTeX RDF
11	Kurt Mehlhorn, Stefan Näher	A faster compaction algorithm with automatic jog insertion.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
11	Patrick Groeneveld	A multiple layer contour-based gridless channel router.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1990	DBLP DOI BibTeX RDF
11	John D. Provence, S. Naganathan	A parallel distributed processing approach to VLSI global routing.	SPDP	1990	DBLP DOI BibTeX RDF
11	Suphachai Sutanthavibul, Eugene Shragowitz	An Adaptive Timing-Driven Layout for High Speed VLSI.	DAC	1990	DBLP DOI BibTeX RDF
11	Joseph F. JáJá, S. Alice Wu	On routing two-terminal nets in the presence of obstacles.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1989	DBLP DOI BibTeX RDF
11	G. D. Adams, Carlo H. Séquin	Template Style Considerations for Sea-of-Gates Layout Generation.	DAC	1989	DBLP DOI BibTeX RDF
11	Ali A. Minai, Ronald D. Williams, F. W. Blake	A Discrete Heuristics Approach to Predictive Evaluation of Semi-Custom IC Layouts.	DAC	1987	DBLP DOI BibTeX RDF
11	Vijay S. Bobba, J. W. Smith	A parameter-driven router.	DAC	1986	DBLP DOI BibTeX RDF
11	Rostam Joobbani, Daniel P. Siewiorek	WEAVER: a knowledge-based routing expert.	DAC	1985	DBLP DOI BibTeX RDF	OPS5