| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Sudeep Pasricha |
Overcoming Energy and Reliability Challenges for IoT and Mobile Devices with Data Analytics.  |
VLSID  |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishal Dey, Vikramkumar Pudi, Anupam Chattopadhyay, Yuval Elovici |
Security Vulnerabilities of Unmanned Aerial Vehicles and Countermeasures: An Experimental Study. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vulisi Narendra Kumar, Gayadhar Panda |
FPGA Implementation of Power Management Algorithm for Wind Energy Storage System with Kalman Filter MPPT Technique. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Tarun Vatwani, Arko Dutt, Debjyoti Bhattacharjee, Anupam Chattopadhyay |
Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Anju P. Johnson, Junxiu Liu, Alan G. Millard, Shvan Karim, Andy M. Tyrrell, Jim Harkin, Jon Timmis, Liam McDaid, David M. Halliday |
Fault-Tolerant Learning in Spiking Astrocyte-Neural Networks on FPGAs. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Linga Reddy Cenkeramaddi |
Feedback Biasing Based Adjustable Gain Ultrasound Preamplifier for CMUTs in 45nm CMOS. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | R. R. Manikandan, Vipul Kumar Singhal 0001, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale |
A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Khyamling Parane, Basavaraj Talawar, Prabhu B. M. Prasad |
YaNoC: Yet Another Network-on-Chip Simulation Acceleration Engine Using FPGAs. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankit Jindal, Binod Kumar 0001, Kanad Basu, Masahiro Fujita |
ELURA: A Methodology for Post-Silicon Gate-Level Error Localization Using Regression Analysis. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sharma Priya, Sukarn Agarwal, Hemangee K. Kapoor |
Fault Tolerance in Network on Chip Using Bypass Path Establishing Packets. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaobang Liu, Ranga Vemuri |
Combined Inference and Satisfiability Based Methods for Complete Signal Restoration in Post-Silicon Validation. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Mohamed Asan Basiri, Sk. Noor Mahammad |
An Efficient VLSI Architecture for Convolution Based DWT Using MAC. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Nagothu Karmel Kranthi, Abhishek Mishra, Adil Meersha, Mayank Shrivastava |
On the ESD Reliability Issues in Carbon Electronics: Graphene and Carbon Nano Tubes. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Preyesh Dalmia, Vikas, Abhinav Parashar, Akshi Tomar, Neeta Pandey |
Novel High Speed Vedic Multiplier Proposal Incorporating Adder Based on Quaternary Signed Digit Number System. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Gregory Chang, Shovan Maity, Baibhab Chatterjee, Shreyas Sen |
Design Considerations of a Sub-50 Mu-W Receiver Front-end for Implantable Devices in MedRadio Band. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ipsita Biswas Mahapatra, Utkarsh Agarwal, Chandrashekhar Azad, S. K. Nandy 0001 |
Design Space Exploration of an Execution-Driven Functional Simulation Methodology. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Anjali Gopinath, Ravi Kumar Adusumalli, Rohit Ranganathan, Arya S. |
Pseudo-Continuous Output Switched-Capacitor Amplifier for Rail-to-Rail Current Sensing Application. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammad Gh. Alfailakawi, Imtiaz Ahmad, Sarah Elghandour |
Energy-Efficient Dynamic Data Encoding for Multi-level STT-MRAM. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Oliver Keszöcze, Mohamed Ibrahim 0002, Robert Wille, Krishnendu Chakrabarty, Rolf Drechsler |
Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnendu Guha, Sangeet Saha, Amlan Chakrabarti |
SHIRT (Self Healing Intelligent Real Time) Scheduling for Secure Embedded Task Processing. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mudasir S. Kawoosa, Rajesh K. Mittal, Maheedhar Jalasuthram, Rubin A. Parekhji |
Towards Single Pin Scan for Extremely Low Pin Count Test. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Arindam Sinharay, Pranab Roy, Hafizur Rahaman 0001 |
Computing Fréchet Distance Metric Based L-Shape Tile Decomposition for E-Beam Lithography. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | John Jose, Abhijit Das 0002 |
An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | |
31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, VLSID 2018, Pune, India, January 6-10, 2018 |
VLSID |
2018 |
DBLP BibTeX RDF |
|
| 1 | Rolf Arne Kjellby, Thor Eirik Johnsrud, Svein Erik Løtveit, Linga Reddy Cenkeramaddi, Mohamed Hamid, Baltasar Beferull-Lozano |
Self-Powered IoT Device for Indoor Applications. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayan Palchaudhuri, Anindya Sundar Dhar |
High Speed FPGA Fabric Aware CSD Recoding with Run-Time Support for Fault Localization. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sahu Sai Vikram, Vibha Panty, Mihir Mody, Madhura Purnaprajna |
TileNET: Scalable Architecture for High-Throughput Ternary Convolution Neural Networks Using FPGAs. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Richa Chakravarty, Dipankar Saha, Santanu Mahapatra |
New Asymmetric Atomistic Model for the Analysis of Phase-Engineered MoS2-Gold Top Contact. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sucheth S. Kuncham, Manasa Gadiyar, Sushmitha Din K., Kiran Kumar Lad, Tonse Laxminidhi |
A Novel Zero Blind Zone Phase Frequency Detector for Fast Acquisition in Phase Locked Loops. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Narendra Nath Ghosh, Prakash Kumar Lenka, SriHarsa Vardan G, Ashudeb Dutta |
A 0.6 mW 1.6 dB Noise Figure Inductorless Shunt Feedback Wideband LNA With Gm Enhancement and Current Reuse in 65 nm CMOS. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Shi Jin 0001, Krishnendu Chakrabarty |
Data-Driven Resiliency Solutions for Boards and Systems. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinay Kumar, Ravindra kumar Shrivatava, Madhav Mansukh Padaliya |
A Temperature Compensated Read Assist for Low Vmin and High Performance High Density 6T SRAM in FinFET Technology. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankur Shukla, Rahul M. Rao, James D. Warnock |
Impact of Device Aging on Early Mode Failures in Pulsed Latches. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | James Thesing, Dhireesha Kudithipudi |
Secure Neural Circuits to Mitigate Correlation Power Analysis on SHA-3 Hash Function. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Avishek Choudhury, Biplab K. Sikdar |
Modeling & Analysis of Redundancy Based Fault Tolerance for Permanent Faults in Chip Multiprocessor Cache. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonathan Cruz 0001, Farimah Farahmandi, Alif Ahmed, Prabhat Mishra 0001 |
Hardware Trojan Detection Using ATPG and Model Checking. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Bhuvana B. P., V. S. Kanchana Bhaaskaran |
Positive Feedback Symmetric Adiabatic Logic Against Differential Power Attack. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashwani Kumar, Shubham Sahay, Manan Suri |
Switching-Time Dependent PUF Using STT-MRAM. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Kamal Chapagai, Pydi Bahubalindruni, Nishtha |
2nd Order Sallen Key Switched Capacitor LPF with N-type Transistors. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Preeti Ranjan Panda, Namita Sharma 0001, Srikanth Kurra, Khushboo Anil Bhartia, Neeraj Kumar Singh 0004 |
Exploration of Loop Unroll Factors in High Level Synthesis. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Palash Das, Shivam Lakhotia, Prabodh Shetty, Hemangee K. Kapoor |
Towards Near Data Processing of Convolutional Neural Networks. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sarit Chakraborty, Chandan Das, Susanta Chakraborty |
Securing Module-Less Synthesis on Cyberphysical Digital Microfluidic Biochips from Malicious Intrusions. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Sultan M. Siddiqui, Sumit Srivastav, Dattatray Ramrao Wanjul, Manankumar Suthar, Sudhir Kumar 0002 |
A 7-Nm Dual Port 8T SRAM with Duplicated Inter-Port Write Data to Mitigate Write Disturbance. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Arpan Chakraborty, Piyali Datta, Rajat Kumar Pal |
Design Optimization at the Fluid-Level Synthesis for Safe and Low-Cost Droplet-Based Microfluidic Biochips. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, Abhinav Kranti |
Emerging FETs for Low Power and High Speed Embedded Dynamic Random Access Memory. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar 0001 |
CLRFrame: An Analysis Framework for Designing Cross-Layer Reliability in Embedded Systems. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudipa Mandal, Aritra Hazra, Pallab Dasgupta, Chunduri Rama Mohan |
Formal Methods for Coverage Analysis of Power Management Logic with Mixed-Signal Components. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahesh S. Murty, Rahul Shrestha |
Hardware-Efficient and Wide-Band Frequency-Domain Energy Detector for Cognitive-Radio Wireless Network. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohd. Tasleem Khan, Shaik Rafi Ahamed |
Area and Power Efficient VLSI Architecture of Distributed Arithmetic Based LMS Adaptive Filter. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vijaypal Singh Rathor, Bharat Garg, G. K. Sharma 0001 |
An Energy-Efficient Trusted FSM Design Technique to Thwart Fault Injection and Trojan Attacks. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Ravikumar Selvam, Akhilesh Tyagi |
Power Side Channel Resistance of RNS Secure Logic. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Punith R. Surkanti, Annajirao Garimella, Paul M. Furth |
Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sourav Ghosh, Hafizur Rahaman 0001, Chandan Giri |
Optimized Concurrent Testing of Digital Microfluidic Biochips. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanjay Moulik, Arnab Sarkar, Hemangee K. Kapoor |
DPFair Scheduling with Slowdown and Suspension. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sabyasachee Banerjee, Subhashis Majumder, Bhargab B. Bhattacharya |
Test-Time Reduction for Power-Aware 3D-SoC. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Nupur Jain, Mansi Singh, Biswajit Mishra |
Image Compression Using 2D-Discrete Wavelet Transform on a Light Weight Reconfigurable Hardware. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | P. S. Veerendranath, M. H. Vasantha, Kumar Y. B. Nithin, Edoardo Bonizzoni |
A Novel Low Power G m-C Continuous-Time Analog Filter with Wide Tuning Range. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Hari Shanker Gupta, Pranoy Datta, Maryam Shojaei Baghini, A. S. Kiran Kumar, Dinesh Kumar Sharma |
Low Power Configurable Readout Integrated Circuit for Infrared Detector. |
VLSID |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Vipul Kumar Mishra, Himanshu Thapliyal |
Heuristic Based Majority/Minority Logic Synthesis for Emerging Technologies. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Hemanta Kumar Mondal, Shashwat Kaushik, Sri Harsha Gade, Sujay Deb |
Energy-Efficient Transceiver for Wireless NoC. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhoy Kole, Kamalika Datta |
Improved NCV Gate Realization of Arbitrary Size Toffoli Gates. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Pardeep Kumar, S. Srivatsa, P. Mantripragada, S. Upreti, K. V. Shravya |
Hybrid OPC Technique for Fast and Accurate Lithography Simulation. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | K. B. Anuroop, Anu James, M. Neema |
Hardware Software Codesign for a Hybrid Substitution Box. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sarit Chakraborty, Susanta Chakraborty |
A Novel Approach towards Biochemical Synthesis on Cyberphysical Digital Microfluidic Biochip. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Milova Paul, Christian Russ, Boeila Sampath Kumar, Harald Gossner, Mayank Shrivastava |
Physics of Current Filamentation in ggNMOS Revisited: Was Our Understanding Scientifically Complete? |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sparsh Mittal, Haonan Wang, Adwait Jog, Jeffrey S. Vetter |
Design and Analysis of Soft-Error Resilience Mechanisms for GPU Register File. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashwin Kumar Siva Kumar, Debasish Behera, Nagendra Krishnapura |
A Low Power Multi-channel Input Delta-Sigma ADC without Reset. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mitesh Limachia, Pathik Viramgama, Rajesh Amratlal Thakker, Nikhil Kothari |
Characterization of a Novel 10T Low-Voltage SRAM Cell with High Read and Write Margin for 20nm FinFET Technology. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sukanta Dey, Satyabrata Dash, Sukumar Nandi, Gaurav Trivedi |
Markov Chain Model Using Lévy Flight for VLSI Power Grid Analysis. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Satyajit Mohapatra, Hari Shanker Gupta, Jatindeep Singh, Nihar Ranjan Mohapatra |
A 64b/66b Line Encoding for High Speed Serializers. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahadev Govind Shirwaikar, Naveen Kadayinti, Dinesh Kumar Sharma |
Clock Skew Measurement Using an All-Digital Sigma-Delta Time to Digital Converter. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Fatemeh Tehranipoor, Nima Karimian, Wei Yan 0005, John A. Chandy |
A Study of Power Supply Variation as a Source of Random Noise. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanjay Kumar Wadhwa, Nidhi Chaudhry |
High Accuracy, Multi-output Bandgap Reference Circuit in 16nm FinFet. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Manideepa Mukherjee, Alexander Fell, Apala Guha |
DFGenTool: A Dataflow Graph Generation Tool for Coarse Grain Reconfigurable Architectures. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Darshana Jayasinghe, Aleksandar Ignjatovic, Sri Parameswaran |
NORA: Algorithmic Balancing without Pre-charge to Thwart Power Analysis Attacks. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | M. Mohamed Asan Basiri, Sk. Noor Mahammad |
High Performance Integer DCT Architectures for HEVC. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sudipta Sarkar, Yongda Cai, Anubhav Adak |
Two-Step Residue Transfer Technique for High-Speed Pipeline A/Ds. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohd. Tasleem Khan, Shaik Rafi Ahamed, Forrest Brewer |
Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Debjyoti Bhattacharjee, Anupam Chattopadhyay |
Efficient Binary Basic Linear Algebra Operations on ReRAM Crossbar Arrays. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohammed Umar Shaikh, Sivaramakrishna Rudrapati, Nandish Bharat Thaker, Shalabh Gupta |
Frequency Enhancement in Miller Divider with Injection-Locking Portrait. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Pascal Raiola, Dominik Erb, Sudhakar M. Reddy, Bernd Becker 0001 |
Accurate Diagnosis of Interconnect Open Defects Based on the Robust Enhanced Aggressor Victim Model. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Bidesh Chakraborty, Mamata Dalui, Biplab K. Sikdar |
Design of Coherence Verification Unit for Heterogeneous CMPs Integrating Update and Invalidate Protocols. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanjeev Nyshadham, A. G. Krishna Kanth |
A 6V to 42V High Voltage CMOS Bandgap Reference Robust to RF Interference for Automotive Applications. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Srivastava 0002, Nithin Sankar, Devarshi Das 0001, Maryam Shojaei Baghini |
LNA-LO Co-design Considerations for Low Intermediate Frequency Receivers in 401-406 MHz MedRadio Spectrum for Healthcare Applications. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Madhav Rao |
Electrical Modeling and Characterization of Copper/Carbon Nanotubes in Tapered through Silicon Vias. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Anshuman Tripathi, Arnab Sarkar, P. P. Chakrabarti 0001 |
Migration Aware Low Overhead ERfair Scheduler. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajat Vishnoi, Pratyush Panday, Mamidala Jagadesh Kumar |
DC Drain Current Model for Tunnel FETs Considering Source and Drain Depletion Regions. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Adil Meersha, B. Sathyajit, Mayank Shrivastava |
A Systematic Study on the Hysteresis Behaviour and Reliability of MoS2 FET. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Shounak Chakraborty 0001, Hemangee K. Kapoor |
Towards Controlling Chip Temperature by Dynamic Cache Reconfiguration in Multiprocessors. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Binod Kumar 0001, Ankit Jindal, Virendra Singh, Masahiro Fujita |
A Methodology for Trace Signal Selection to Improve Error Detection in Post-Silicon Validation. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | |
30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, VLSID 2017, Hyderabad, India, January 7-11, 2017 |
VLSID |
2017 |
DBLP BibTeX RDF |
|
| 1 | Avirup Dasgupta, Chetan Gupta, Anupam Dutta, Yen-Kai Lin, Srikanth Srihari, Ethirajan Tamilmani, Chenming Hu, Yogesh Singh Chauhan |
Modeling of Body-Bias Dependence of Overlap Capacitances in Bulk MOSFETs. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Saransh Sharma, Avilash Mukherjee, Abhishek Dongre, Mrigank Sharad |
Ultra Low Power Sensor Node for Security Applications, Facilitated by Algorithm-Architecture Co-design. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnendu Guha, Debasri Saha, Amlan Chakrabarti |
Self Aware SoC Security to Counteract Delay Inducing Hardware Trojans at Runtime. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Debiprasanna Sahoo, Manoranjan Satpathy, Madhu Mutyam |
An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Bhupendra Singh Reniwal, P. Singh, Vikas Vijayvargiya, Santosh Kumar Vishvakarma |
A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Venkatesh Mani Tripathi, Sandeep Mishra, Jyotishman Saikia, Anup Dandapat |
A Low-Voltage 13T Latch-Type Sense Amplifier with Regenerative Feedback for Ultra Speed Memory Access. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee |
Post-Silicon Validation: Automatic Characterization of RF Device Nonidealities via Iterative Learning Experiments on Hardware. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajit Karmakar, N. Prasad 0001, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta 0001 |
A New Logic Encryption Strategy Ensuring Key Interdependency. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Savanth, Alex S. Weddell, James Myers, David Flynn, Bashir M. Al-Hashimi |
A 50nW Voltage Monitor Scheme for Minimum Energy Sensor Systems. |
VLSID |
2017 |
DBLP DOI BibTeX RDF |
|
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