Search results for "VTS"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Breeta SenGupta, Erik Larsson	Test planning and test access mechanism design for stacked chips using ILP.	VTS	2014	DBLP DOI BibTeX RDF
1	C. J. Clark, Víctor H. Champac	Hot topic session 12B: Stay relevant with standards-based DFT.	VTS	2014	DBLP DOI BibTeX RDF
1	Carolina Metzler, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard 0001, Arnaud Virazel	TSV aware timing analysis and diagnosis in paths with multiple TSVs.	VTS	2014	DBLP DOI BibTeX RDF
1	Andres Viveros-Wacher, Ricardo Alejos, Liliana Alvarez, Israel Diaz-Castro, Brenda Marcial, Gaston Motola-Acuna, Edgar-Andrei Vega-Ochoa	SMV methodology enhancements for high speed I/O links of SoCs.	VTS	2014	DBLP DOI BibTeX RDF
1	Irith Pomeranz	On the use of multi-cycle tests for storage of two-cycle broadside tests.	VTS	2014	DBLP DOI BibTeX RDF
1	Rohit Kapur, Irith Pomeranz	Innovative practices session 10C: Advances in DFT and compression.	VTS	2014	DBLP DOI BibTeX RDF
1	Eshan Singh	Modeling location based wafer die yield variation in estimating 3D stacked IC yield from wafer to wafer stacking.	VTS	2014	DBLP DOI BibTeX RDF
1	Haralampos-G. D. Stratigopoulos, Stephen Sunter	Efficient Monte Carlo-based analog parametric fault modelling.	VTS	2014	DBLP DOI BibTeX RDF
1	Sachhidh Kannan, Naghmeh Karimi, Ramesh Karri, Ozgur Sinanoglu	Detection, diagnosis, and repair of faults in memristor-based memories.	VTS	2014	DBLP DOI BibTeX RDF
1	Jacob A. Abraham, Xinli Gu, Teresa MacLaurin, Janusz Rajski, Paul G. Ryan, Dimitris Gizopoulos, Matteo Sonza Reorda	Special session 8B - Panel: In-field testing of SoC devices: Which solutions by which players?	VTS	2014	DBLP DOI BibTeX RDF
1	Li Xu, Degang Chen 0001	Accurate and efficient method of jitter and noise separation and its application to ADC testing.	VTS	2014	DBLP DOI BibTeX RDF
1	Atefe Dalirsani, Michael E. Imhof, Hans-Joachim Wunderlich	Structural Software-Based Self-Test of Network-on-Chip.	VTS	2014	DBLP DOI BibTeX RDF
1	Doohwang Chang, Sule Ozev, Bertan Bakkaloglu, Sayfe Kiaei, Engin Afacan, Günhan Dündar	Reliability enhancement using in-field monitoring and recovery for RF circuits.	VTS	2014	DBLP DOI BibTeX RDF
1	Soonyoung Cha, Chang-Chih Chen, Taizhi Liu, Linda S. Milor	Extraction of threshold voltage degradation modeling due to Negative Bias Temperature Instability in circuits with I/O measurements.	VTS	2014	DBLP DOI BibTeX RDF
1	Xiaolei Cai, Emil Gizdarski, Dan Landau	A shared memory based parallel diagnosis system.	VTS	2014	DBLP DOI BibTeX RDF
1	Shahrzad Mirkhani, Jacob A. Abraham	Fast evaluation of test vector sets using a simulation-based statistical metric.	VTS	2014	DBLP DOI BibTeX RDF
1	Bozena Kaminska, Bernard Courtois, Chris Bailey 0001	New topic session 2B: Co-design and reliability of power electronic modules - Current status and future challenges.	VTS	2014	DBLP DOI BibTeX RDF
1	Alodeep Sanyal, Yanjing Li	Special session 11C: Young professionals in test - Elevator talks.	VTS	2014	DBLP DOI BibTeX RDF
1	Amitava Majumdar 0002, Suriya Natarajan, Stephen K. Sunter, Prashant Goteti, Ke Huang 0001	Innovative practices session 4C: Disruptive solutions in the non-digital world.	VTS	2014	DBLP DOI BibTeX RDF
1	Chen-Wei Lin, Chin-Yuan Huang, Mango Chia-Tso Chao	Testing of a low-VMIN data-aware dynamic-supply 8T SRAM.	VTS	2013	DBLP DOI BibTeX RDF
1	Thomas Moon, Hyun Woo Choi, Abhijit Chatterjee	Low-cost multi-channel testing of periodic signals using monobit receivers and incoherent subsampling.	VTS	2013	DBLP DOI BibTeX RDF
1	Takahiro J. Yamaguchi, Jacob A. Abraham, Gordon W. Roberts, Suriyaprakash Natarajan, Dennis J. Ciplickas	Special session 12B: Panel post-silicon validation & test in huge variance era.	VTS	2013	DBLP DOI BibTeX RDF
1	Xuehui Zhang, Kan Xiao, Mohammad Tehranipoor, Jeyavijayan Rajendran, Ramesh Karri	A study on the effectiveness of Trojan detection techniques using a red team blue team approach.	VTS	2013	DBLP DOI BibTeX RDF
1	David Hély, Julien Martin, Gerson Dario Piraquive Triana, Simon Piroux Mounier, Elie Riviere, Thibault Sahuc, Jeremy Savonet, Laura Soundararadjou	Experiences in side channel and testing based Hardware Trojan detection.	VTS	2013	DBLP DOI BibTeX RDF
1	Hao-Wen Hsu, Shih-Hua Kuo, Wen-Hsiang Chang, Shi-Hao Chen, Ming-Tung Chang, Mango Chia-Tso Chao	Testing retention flip-flops in power-gated designs.	VTS	2013	DBLP DOI BibTeX RDF
1	Kai Hu 0003, Tsung-Yi Ho, Krishnendu Chakrabarty	Testing of flow-based microfluidic biochips.	VTS	2013	DBLP DOI BibTeX RDF
1	Jae Woong Jeong, Sule Ozev, Shreyas Sen, T. M. Mak	Measurement of envelope/phase path delay skew and envelope path bandwidth in polar transmitters.	VTS	2013	DBLP DOI BibTeX RDF
1	Erik Larsson	Special session 9B: Embedded tutorial embedded DfT instrumentation: Design, access, retargeting and case studies.	VTS	2013	DBLP DOI BibTeX RDF
1	Sachin Dileep Dasnurkar, Animesh Datta, Mohamed H. Abu-Rahma, Hieu Nguyen, Martin Villafana, Hadi Rasouli, Sean Tamjidi, Ming Cai, Samit Sengupta, P. R. Chidambaram, Raghavan Thirumala, Nikhil Kulkarni, Prasanna Seeram, Prasad Bhadri, Prayag Patel, Sei Seung Yoon, Esin Terzioglu	Experiments and analysis to characterize logic state retention limitations in 28nm process node.	VTS	2013	DBLP DOI BibTeX RDF
1	Peter Wohl, John A. Waicukauski	Improving test generation by use of majority gates.	VTS	2013	DBLP DOI BibTeX RDF
1	Alodeep Sanyal, Yervant Zorian	Special session 12C: Town-hall meeting "young professionals in test".	VTS	2013	DBLP DOI BibTeX RDF
1	Aitzan Sari, Mihalis Psarakis, Dimitris Gizopoulos	Combining checkpointing and scrubbing in FPGA-based real-time systems.	VTS	2013	DBLP DOI BibTeX RDF
1	Adrian Evans, Michael Nicolaidis, Rob Aitken, Burcin Aktan, Olivier Lauzeral	Hot topic session 4A: Reliability analysis of complex digital systems.	VTS	2013	DBLP DOI BibTeX RDF
1	Harm C. M. Bossers, Johann L. Hurink, Gerard J. M. Smit	Selection of tests for outlier detection.	VTS	2013	DBLP DOI BibTeX RDF
1	Panagiota Papavramidou, Michael Nicolaidis	An iterative diagnosis approach for ECC-based memory repair.	VTS	2013	DBLP DOI BibTeX RDF
1	Samed Maltabas, Osman Kubilay Ekekon, Kemal Kulovic, Anne Meixner, Martin Margala	An IDDQ BIST approach to characterize phase-locked loop parameters.	VTS	2013	DBLP DOI BibTeX RDF
1	Yu Huang 0005, Xiaoxin Fan, Huaxing Tang, Manish Sharma, Wu-Tung Cheng, Brady Benware, Sudhakar M. Reddy	Distributed dynamic partitioning based diagnosis of scan chain.	VTS	2013	DBLP DOI BibTeX RDF
1	Saghir A. Shaikh	Innovative practices session 3C: Harnessing the challenges of testability and debug of high speed I/Os.	VTS	2013	DBLP DOI BibTeX RDF
1	Baris Arslan, Alex Orailoglu	Tracing the best test mix through multi-variate quality tracking.	VTS	2013	DBLP DOI BibTeX RDF
1	Chih-Sheng Hou, Jin-Fu Li 0001	Allocation of RAM built-in self-repair circuits for SOC dies of 3D ICs.	VTS	2013	DBLP DOI BibTeX RDF
1	Barry John Muldrey, Sabyasachi Deyati, Michael Giardino, Abhijit Chatterjee	RAVAGE: Post-silicon validation of mixed signal systems using genetic stimulus evolution and model tuning.	VTS	2013	DBLP DOI BibTeX RDF
1	Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet	Defect-oriented non-intrusive RF test using on-chip temperature sensors.	VTS	2013	DBLP DOI BibTeX RDF
1	B. Seshadri, Bruce Cory, S. Mitra	Innovative practices session 9C: Yield improvement: Challenges and directions.	VTS	2013	DBLP DOI BibTeX RDF
1	Sushmita Kadiyala Rao, Ryan W. Robucci, Chintan Patel	Scalable dynamic technique for accurately predicting power-supply noise and path delay.	VTS	2013	DBLP DOI BibTeX RDF
1	Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret	Reduced code linearity testing of pipeline adcs in the presence of noise.	VTS	2013	DBLP DOI BibTeX RDF
1	Andreas Riefert, Jörg Müller 0004, Matthias Sauer 0002, Wolfram Burgard, Bernd Becker 0001	Identification of critical variables using an FPGA-based fault injection framework.	VTS	2013	DBLP DOI BibTeX RDF
1	Helia Naeimi, Suriya Natarajan, Kushagra Vaid, Prabhakar Kudva, Mahesh Natu	Innovative practices session 5C: Cloud atlas - Unreliability through massive connectivity.	VTS	2013	DBLP DOI BibTeX RDF
1	Anshuman Chandra	Special session 11B: Hot topic on-chip clocking - Industrial trends.	VTS	2013	DBLP DOI BibTeX RDF
1	Chen-Wei Lin, Mango Chia-Tso Chao, Chih-Chieh Hsu	Investigation of gate oxide short in FinFETs and the test methods for FinFET SRAMs.	VTS	2013	DBLP DOI BibTeX RDF
1	Yun-Chao You, Chih-Sheng Hou, Li-Jung Chang, Jin-Fu Li 0001, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu	A hybrid ECC and redundancy technique for reducing refresh power of DRAMs.	VTS	2013	DBLP DOI BibTeX RDF
1	Raymond Paseman, Alex Orailoglu	Towards a cost-effective hardware trojan detection methodology.	VTS	2013	DBLP DOI BibTeX RDF
1	Brandon Noia, Krishnendu Chakrabarty	Post-DfT-insertion retiming for delay recovery on inter-die paths in 3D ICs.	VTS	2013	DBLP DOI BibTeX RDF
1	Sreenivaas S. Muthyala, Nur A. Touba	SOC test compression scheme using sequential linear decompressors with retained free variables.	VTS	2013	DBLP DOI BibTeX RDF
1	Prasanjeet Das, Sandeep K. Gupta 0001	Extending pre-silicon delay models for post-silicon tasks: Validation, diagnosis, delay testing, and speed binning.	VTS	2013	DBLP DOI BibTeX RDF
1	Tengteng Zhang, Duncan M. Hank Walker	Power supply noise control in pseudo functional test.	VTS	2013	DBLP DOI BibTeX RDF
1	Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake	Innovative practices session 7C: Self-calibration & trimming.	VTS	2013	DBLP DOI BibTeX RDF
1		31st IEEE VLSI Test Symposium, VTS 2013, Berkeley, CA, USA, April 29 - May 2, 2013	VTS	2013	DBLP BibTeX RDF
1	Keith A. Jenkins, Phillip J. Restle, P. Z. Wang, D. Hogenmiller, David W. Boerstler, Thomas J. Bucelot	On-chip circuit for measuring multi-GHz clock signal waveforms.	VTS	2013	DBLP DOI BibTeX RDF
1	Bozena Kaminska, Bernard Courtois, Soha Hassoun	New topic session 2B: Why (Re-)Designing Biology is ∗Slightly∗ more challenging than designing electronics.	VTS	2013	DBLP DOI BibTeX RDF
1	Michael Patterson, Aaron Mills, Ryan A. Scheel, Julie Tillman, Evan Dye, Joseph Zambreno	A multi-faceted approach to FPGA-based Trojan circuit detection.	VTS	2013	DBLP DOI BibTeX RDF
1	Christopher Bell, Matthew Lewandowski, Srinivas Katkoori	A multi-parameter functional side-channel analysis method for hardware trust verification.	VTS	2013	DBLP DOI BibTeX RDF
1	Michele Portolan, Michail Maniatakos	Special session 3B: E.J. McCluskey Doctoral Thesis Award semi-final - Posters.	VTS	2013	DBLP DOI BibTeX RDF
1	Yuntan Fang, Huawei Li 0001, Xiaowei Li 0001	RSAK: Random stream attack for phase change memory in video applications.	VTS	2013	DBLP DOI BibTeX RDF
1	Mukesh Agrawal 0001, Krishnendu Chakrabarty	Test-cost optimization and test-flow selection for 3D-stacked ICs.	VTS	2013	DBLP DOI BibTeX RDF
1	Bo Yao, Arani Sinha, Irith Pomeranz	Path selection based on static timing analysis considering input necessary assignments.	VTS	2013	DBLP DOI BibTeX RDF
1	Bozena Kaminska, Bernard Courtois, Massimo Alioto	New topic session 7B: Challenges and directions for ultra-low voltage VLSI circuits and systems: CMOS and beyond.	VTS	2013	DBLP DOI BibTeX RDF
1	Jonathon E. Colburn, K.-Y. Chung, Haluk Konuk, Y. Dong	Innovative practices session 6C: Latest practices in test compression.	VTS	2013	DBLP DOI BibTeX RDF
1	Ameya Chaudhari, Junyoung Park, Jacob A. Abraham	A framework for low overhead hardware based runtime control flow error detection and recovery.	VTS	2013	DBLP DOI BibTeX RDF
1	Kihyuk Han, Joon-Sung Yang, Jacob A. Abraham	Enhanced algorithm of combining trace and scan signals in post-silicon validation.	VTS	2013	DBLP DOI BibTeX RDF
1	Ilia Polian, Mohammad Tehranipoor	Special session 12A: Hot topic counterfeit IC identification: How can test help?	VTS	2013	DBLP DOI BibTeX RDF
1	Chun-Chuan Chi, Cheng-Wen Wu, Min-Jer Wang, Hung-Chih Lin	3D-IC interconnect test, diagnosis, and repair.	VTS	2013	DBLP DOI BibTeX RDF
1	Praveen Venkataramani, Suraj Sindia, Vishwani D. Agrawal	Finding best voltage and frequency to shorten power-constrained test time.	VTS	2013	DBLP DOI BibTeX RDF
1	Charutosh Dixit, Ramesh C. Tekumalla, Sreejit Chakravarty, Manuel d'Abreu, Zhuoyu Bao, Concetta Riccobene	Innovative practices session 2C: Memory test.	VTS	2013	DBLP DOI BibTeX RDF
1	Yue Gao, Yang Zhang 0014, Da Cheng, Melvin A. Breuer	Trading off area, yield and performance via hybrid redundancy in multi-core architectures.	VTS	2013	DBLP DOI BibTeX RDF
1	Gurgen Harutyunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian	An effective solution for building memory BIST infrastructure based on fault periodicity.	VTS	2013	DBLP DOI BibTeX RDF
1	Chen-Yong Cher, Mohan J. Kumar	Innovative practices session 11C: Resilience.	VTS	2013	DBLP DOI BibTeX RDF
1	Fayrouz Haddad, Wenceslas Rahajandraibe, Hassen Aziza, Karine Castellani-Coulié, Jean-Michel Portal	On the investigation of built-in tuning of RF receivers using on-chip polyphase filters.	VTS	2013	DBLP DOI BibTeX RDF
1	Manuel d'Abreu, Amitava Mazumdar	Special session 8B: Embedded tutorial challenges in SSD.	VTS	2013	DBLP DOI BibTeX RDF
1	Koji Asami, Takashi Shimura, Toshiaki Kurihara	Novel estimation method of EVM with channel correction for linear impairments in multi-standard RF transceivers.	VTS	2013	DBLP DOI BibTeX RDF
1	Jennifer Dworak, Ronald Shawn Blanton, Masahiro Fujita, Kazumi Hatayama, Naghmeh Karimi, Michail Maniatakos, Antonis M. Paschalis, Adit D. Singh, Tian Xia	Special session 4B: Elevator talks.	VTS	2013	DBLP DOI BibTeX RDF
1	Nagib Hakim, Charles Meissner	Innovative practices session 1C: Post-silicon validation.	VTS	2013	DBLP DOI BibTeX RDF
1	Sen-Wen Hsiao, Nicholas Tzou, Abhijit Chatterjee	A programmable BIST design for PLL static phase offset estimation and clock duty cycle detection.	VTS	2013	DBLP DOI BibTeX RDF
1	P. Pant, M. Amodeo, Sujal Vora, Jonathon E. Colburn	Innovative practices session 10C: Delay test.	VTS	2013	DBLP DOI BibTeX RDF
1	Jin-Fu Li 0001, Cheng-Wen Wu, Masahiro Aoyagi, Meng-Fan Marvin Chang, Ding-Ming Kwai	Special session 4C: Hot topic 3D-IC design and test.	VTS	2013	DBLP DOI BibTeX RDF
1	Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard 0001, Aida Todri, Arnaud Virazel, Nabil Badereddine	A built-in scheme for testing and repairing voltage regulators of low-power srams.	VTS	2013	DBLP DOI BibTeX RDF
1	Michele Portolan, Michail Maniatakos	Special session 8A: E.J. McCluskey doctoral thesis award semi-final - presentations.	VTS	2013	DBLP DOI BibTeX RDF
1	Rashid Rashidzadeh	Contactless test access mechanism for TSV based 3D ICs.	VTS	2013	DBLP DOI BibTeX RDF
1	Saman Kiamehr, Mojtaba Ebrahimi, Farshad Firouzi, Mehdi Baradaran Tahoori	Chip-level modeling and analysis of electrical masking of soft errors.	VTS	2013	DBLP DOI BibTeX RDF
1	Yier Jin, Yiorgos Makris	Proof carrying-based information flow tracking for data secrecy protection and hardware trust.	VTS	2012	DBLP DOI BibTeX RDF
1	Syed Askari, Mehrdad Nourani, Mini Rawat	An on-chip NBTI monitor for estimating analog circuit degradation.	VTS	2012	DBLP DOI BibTeX RDF
1	Kohei Miyase, Masao Aso, Ryou Ootsuka, Xiaoqing Wen, Hiroshi Furukawa, Yuta Yamato, Kazunari Enokimoto, Seiji Kajihara	A novel capture-safety checking method for multi-clock designs and accuracy evaluation with delay capture circuits.	VTS	2012	DBLP DOI BibTeX RDF
1	Lixing Zhao, Vishwani D. Agrawal	Net diagnosis using stuck-at and transition fault models.	VTS	2012	DBLP DOI BibTeX RDF
1	Junyoung Park, Jacob A. Abraham	An aging-aware flip-flop design based on accurate, run-time failure prediction.	VTS	2012	DBLP DOI BibTeX RDF
1	Geewhun Seok, Hong Kim, Baker Mohammad	Write-through method for embedded memory with compression Scan-based testing.	VTS	2012	DBLP DOI BibTeX RDF
1	Alexander Czutro, Matthias Sauer 0002, Tobias Schubert 0001, Ilia Polian, Bernd Becker 0001	SAT-ATPG using preferences for improved detection of complex defect mechanisms.	VTS	2012	DBLP DOI BibTeX RDF
1	Hyunjin Kim, Jacob A. Abraham	A Built-In Self-Test scheme for DDR memory output timing test and measurement.	VTS	2012	DBLP DOI BibTeX RDF
1	Peilin Song, Franco Stellari	Tester-based optical and electrical diagnostic system and techniques.	VTS	2012	DBLP DOI BibTeX RDF
1	Jinsuk Chung, Nur A. Touba	Exploiting X-correlation in output compression via superset X-canceling.	VTS	2012	DBLP DOI BibTeX RDF
1	Masoud Zamani, Mehdi Baradaran Tahoori, Krishnendu Chakrabarty	Ping-pong test: Compact test vector generation for reversible circuits.	VTS	2012	DBLP DOI BibTeX RDF
1	Eun Jung Jang, Anne Gattiker, Sani R. Nassif, Jacob A. Abraham	An oscillation-based test structure for timing information extraction.	VTS	2012	DBLP DOI BibTeX RDF

Publications at "VTS"( http://dblp.L3S.de/Venues/VTS )