Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
16 | Samuel Presa Toledo, Alexandra L. Zimpeck, Ricardo Reis 0001, Cristina Meinhardt |
Impact of schmitt trigger inverters on process variability robustness of 1-Bit full adders. |
ICECS |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Mario Osta, Ali Ibrahim, Hussein Chible, Maurizio Valle |
Approximate Multipliers Based on Inexact Adders for Energy Efficient Data Processing. |
NGCAS |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Marta Franceschi, Vincent Camus, Ali Ibrahim, Christian C. Enz, Maurizio Valle |
Approximate FPGA Implementation of CORDIC for Tactile Data Processing Using Speculative Adders. |
NGCAS |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Subhendu Roy, Yuzhe Ma, Jin Miao, Bei Yu 0001 |
A learning bridge from architectural synthesis to physical design for exploring power efficient high-performance adders. |
ISLPED |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Shahrzad Keshavarz, Daniel E. Holcomb |
Privacy leakages in approximate adders. |
ISCAS |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Darjn Esposito, Davide De Caro, Ettore Napoli, Nicola Petra, Antonio G. M. Strollo |
On the use of approximate adders in carry-save multiplier-accumulators. |
ISCAS |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Mengting Li, Wenhao Sun, Zhimin Lu, Song Chen 0001, Feng Wu |
Memristor-based material implication logic design for full adders. |
ASICON |
2017 |
DBLP DOI BibTeX RDF |
|
16 | H. Junqi, T. Nandha Kumar, Haider Abbas, Fabrizio Lombardi |
Simulation-based evaluation of frequency upscaled operation of exact/approximate ripple carry adders. |
DFT |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Muhammad Kamran Ayub, Osman Hasan, Muhammad Shafique 0001 |
Statistical Error Analysis for Low Power Approximate Adders. |
DAC |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Muhammad Abdullah Hanif, Rehan Hafiz, Osman Hasan, Muhammad Shafique 0001 |
QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders. |
DAC |
2017 |
DBLP DOI BibTeX RDF |
|
16 | Mohammad Hossein Moaiyeri, Shima Sedighiani, Fazel Sharifi, Keivan Navi |
Design and analysis of carbon nanotube FET based quaternary full adders. |
Frontiers Inf. Technol. Electron. Eng. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Andrew Adamatzky |
On Half-Adders Based on Fusion of Signal Carriers: Excitation, Fluidics, and Electricity. |
Complex Syst. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Milad Bahadori, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram |
A comparative study on performance and reliability of 32-bit binary adders. |
Integr. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Yavar Safaei Mehrabani, Mohammad Eshghi |
Noise and Process Variation Tolerant, Low-Power, High-Speed, and Low-Energy Full Adders in CNFET Technology. |
IEEE Trans. Very Large Scale Integr. Syst. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Jisha M. Nair, C. Pradeep |
Intelligent selective modular redundancy for online fault detection of adders in FPGA. |
Int. J. High Perform. Syst. Archit. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Weiqiang Liu 0001, Linbin Chen, Chenghua Wang, Máire O'Neill, Fabrizio Lombardi |
Design and Analysis of Inexact Floating-Point Adders. |
IEEE Trans. Computers |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Yogita Bansal, Charu Madhu |
A novel high-speed approach for 16 × 16 Vedic multiplication with compressor adders. |
Comput. Electr. Eng. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Morteza Dorrigiv, Ghassem Jaberipur |
Conditional speculative mixed decimal/binary adders via binary-coded-chiliad encoding. |
Comput. Electr. Eng. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Mojtaba Valinataj, Mahboobeh Mirshekar, Hamid Jazayeri |
Novel low-cost and fault-tolerant reversible logic adders. |
Comput. Electr. Eng. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Atiyeh Panahi, Fazel Sharifi, Mohammad Hossein Moaiyeri, Keivan Navi |
CNFET-based approximate ternary adders for energy-efficient image processing applications. |
Microprocess. Microsystems |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Yongqiang Zhang 0006, Hongjun Lv, Huakun Du, Cheng Huang, Shuai Liu, Guangjun Xie |
Modular design of QCA carry flow adders and multiplier with reduced wire crossing and number of logic gates. |
Int. J. Circuit Theory Appl. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Zvi M. Kedem, Kirthi Krishna Muntimadugu |
Mathematical Modeling of General Inaccurate Adders. |
CoRR |
2016 |
DBLP BibTeX RDF |
|
16 | P. Balasubramanian 0001, Nikos E. Mastorakis |
ASIC-based Implementation of Synchronous Section-Carry Based Carry Lookahead Adders. |
CoRR |
2016 |
DBLP BibTeX RDF |
|
16 | P. Balasubramanian 0001, Nikos E. Mastorakis |
Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit. |
CoRR |
2016 |
DBLP BibTeX RDF |
|
16 | Firdous Ahmad, Ghulam Mohiuddin Bhat, Hossein Khademolhosseini, Saeid Azimi, Shaahin Angizi, Keivan Navi |
Towards single layer quantum-dot cellular automata adders based on explicit interaction of cells. |
J. Comput. Sci. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Darjn Esposito, Davide De Caro, Antonio Giuseppe Maria Strollo |
Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Zhixi Yang, Jun Yang, Kefei Xing, Guang Yang |
An analytical framework for error modeling of approximate adders. |
IEICE Electron. Express |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Stephanie O. Ames, Vinicius Zanandrea, Ingrid F. V. Oliveira, Samuel P. Toledo, Cristina Meinhardt |
Investigating PVT variability effects on full adders. |
PATMOS |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Cunxi Yu, Maciej J. Ciesielski |
Analyzing Imprecise Adders Using BDDs - A Case Study. |
ISVLSI |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Ali Asghar Vatanjou, Even Låte, Trond Ytterdal, Snorre Aunet |
Ultra-low voltage adders in 28 nm FDSOI exploring poly-biasing for device sizing. |
NORCAS |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Lauren Guckert, Earl E. Swartzlander Jr. |
Optimized memristor-based ripple carry adders. |
ACSSC |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Zahiruddin Alamgir, Karsten Beckmann, Nathaniel C. Cady, Alvaro Velasquez, Sumit Kumar Jha 0001 |
Flow-based computing on nanoscale crossbars: Design and implementation of full adders. |
ISCAS |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Rui Zhou, Weikang Qian |
A General Sign Bit Error Correction Scheme for Approximate Adders. |
ACM Great Lakes Symposium on VLSI |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Sunil Dutt, Harsh Patel, Sukumar Nandi, Gaurav Trivedi |
Exploring Approximate Computing for Yield Improvement via Re-design of Adders for Error-Resilient Applications. |
VLSID |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Ugur Cini, Olcay Kurt |
MAC unit for reconfigurable systems using multi-operand adders with double carry-save encoding. |
DTIS |
2016 |
DBLP DOI BibTeX RDF |
|
16 | Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini, Mehdi Hosseinzadeh 0001, Saeid Sorouri, Samuel Antão, Leonel Sousa |
Reverse Converter Design via Parallel-Prefix Adders: Novel Components, Methodology, and Implementations. |
IEEE Trans. Very Large Scale Integr. Syst. |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Yinan Sun, Yongpan Liu, Zhibo Wang 0004, Huazhong Yang |
Multistage Function Speculation Adders. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Cong Liu 0015, Jie Han 0001, Fabrizio Lombardi |
An Analytical Framework for Evaluating the Error Characteristics of Approximate Adders. |
IEEE Trans. Computers |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Peter Kornerup |
Reviewing High-Radix Signed-Digit Adders. |
IEEE Trans. Computers |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Roberto Sierra, Carlos Carreras, Gabriel Caffarena, Carlos A. López Bario |
A Formal Method for Optimal High-Level Casting of Heterogeneous Fixed-Point Adders and Subtractors. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Atef Ibrahim, Fayez Gebali |
Optimized structures of hybrid ripple carry and hierarchical carry lookahead adders. |
Microelectron. J. |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Kamalika Datta, Tanay Chattopadhyay, Indranil Sengupta 0001 |
All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer. |
Microelectron. J. |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Manish Kumar Jaiswal, B. Sharat Chandra Varma 0001, Hayden Kwok-Hay So, M. Balakrishnan, Kolin Paul, Ray C. C. Cheung |
Configurable Architectures for Multi-Mode Floating Point Adders. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Weiqiang Liu 0001, Earl E. Swartzlander Jr. |
Design of 3-D quantum-dot cellular automata adders. |
IEICE Electron. Express |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Abdulmajeed Alghamdi, Fayez Gebali |
Performance analysis of 64-bit Carry Lookahead Adders using conventional and hierarchical structure styles. |
PACRIM |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Ioannis Voyiatzis |
Symmetric transparent on-line BIST of word-organized memories with binary adders. |
ETS |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Mustafa Aktan, Dursun Baran, Vojin G. Oklobdzija |
Minimizing Energy by Achieving Optimal Sparseness in Parallel Adders. |
ARITH |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Leonardo Bandeira Soares, Sergio Bampi, Andre Luis Rodeghiero Rosa, Eduardo A. C. da Costa |
Near-threshold computing for very wide frequency scaling: Approximate adders to rescue performance. |
NEWCAS |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Zhixi Yang, Jie Han 0001, Fabrizio Lombardi |
Transmission gate-based approximate adders for inexact computing. |
NANOARCH |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Honglan Jiang, Jie Han 0001, Fabrizio Lombardi |
A Comparative Review and Evaluation of Approximate Adders. |
ACM Great Lakes Symposium on VLSI |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Babu M. Pranay, Srivatsava Jandhyala |
Accuracy Configurable Modified Booth Multiplier Using Approximate Adders. |
iNIS |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Noureddine Chabini, Said Belkouch |
Area and delay aware approaches for realizing multi-operand addition on FPGAs using two-operand adders. |
AICCSA |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Karri Manikantta Reddy, Kumar Y. B. Nithin, Dheeraj Sharma, M. H. Vasantha |
Low power, high speed error tolerant multiplier using approximate adders. |
VDAT |
2015 |
DBLP DOI BibTeX RDF |
|
16 | Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo |
Area-Delay Efficient Binary Adders in QCA. |
IEEE Trans. Very Large Scale Integr. Syst. |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Raffaele De Rose, Marco Lanuzza, Fabio Frustaci, Sohan Purohit |
Designing Dynamic Carry Skip Adders: Analysis and Comparison. |
Circuits Syst. Signal Process. |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Qian Wang, Xiaoyu Song, Ming Gu 0001, Jia-Guang Sun 0001 |
Functional Verification of High Performance Adders in COQ. |
J. Appl. Math. |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan |
Towards Optimal Performance-Area Trade-Off in Adders by Synthesis of Parallel Prefix Structures. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Ireneusz Brzozowski, Andrzej Kos |
Designing of low-power data oriented adders. |
Microelectron. J. |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Stephan Held, Sophie Theresa Spirkl |
Fast Prefix Adders for Non-Uniform Input Arrival Times. |
CoRR |
2014 |
DBLP BibTeX RDF |
|
16 | Cecilia García Martin, Erdal Oruklu |
Performance evaluation of FinFET pass-transistor full adders with BSIM-CMG model. |
MWSCAS |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Ivan Ratkovic, Oscar Palomar, Milan Stanic, Osman S. Unsal, Adrián Cristal, Mateo Valero |
Physical vs. Physically-Aware Estimation Flow: Case Study of Design Space Exploration of Adders. |
ISVLSI |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Halil Kukner, Pieter Weckx, Sebastien Morrison, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken |
NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes. |
DSD |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Divya Mahajan 0001, Matheen Musaddiq, Earl E. Swartzlander Jr. |
Memristor based adders. |
ACSSC |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Seyed Hamed Fatemi Langroudi, Ghassem Jaberipur |
Double {0, 1, 2} representation modulo-(2n - 3) adders. |
IWSSIP |
2014 |
DBLP BibTeX RDF |
|
16 | Ting An, Hao Cai, Lirida Alves de Barros Naviner |
Simulation study of aging in CMOS binary adders. |
MIPRO |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Jason Luu, Conor McCullough, Sen Wang, Safeen Huda, Bo Yan, Charles Chiasson, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz |
On Hard Adders and Carry Chains in FPGAs. |
FCCM |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Li Li 0021, Hai Zhou 0001 |
On error modeling and analysis of approximate adders. |
ICCAD |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Gai Liu, Ye Tao, Mingxing Tan, Zhiru Zhang |
CASA: correlation-aware speculative adders. |
ISLPED |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Xinghua Yang, Fei Qiao, Chang Liu, Qi Wei 0001, Huazhong Yang |
Design of multi-stage latency adders using detection and sequence-dependence between successive calculations. |
ISCAS |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Minas Dasygenis |
Generation and validation of multioperand carry save adders from the web. |
DTIS |
2014 |
DBLP DOI BibTeX RDF |
|
16 | Mahmoud Alshewimy |
Yüksek performanslı karma toplayıcıların tasarımı (High performance hybrid adders design) |
|
2014 |
RDF |
|
16 | Mauro Olivieri, Antonio Mastrandrea |
A General Design Methodology for Synchronous Early-Completion-Prediction Adders in Nano-CMOS DSP Architectures. |
VLSI Design |
2013 |
DBLP DOI BibTeX RDF |
|
16 | David H. K. Hoe, L. P. Deepthi Bollepalli, Chris D. Martinez |
FPGA Fault Tolerant Arithmetic Logic: A Case Study Using Parallel-Prefix Adders. |
VLSI Design |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Keshab K. Parhi |
Comments on "Low-energy CSMT carry generators and binary adders". |
IEEE Trans. Very Large Scale Integr. Syst. |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Jinghang Liang, Jie Han 0001, Fabrizio Lombardi |
New Metrics for the Reliability of Approximate and Probabilistic Adders. |
IEEE Trans. Computers |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Javier Hormigo, Julio Villalba, Emilio L. Zapata |
Multioperand Redundant Adders on FPGAs. |
IEEE Trans. Computers |
2013 |
DBLP DOI BibTeX RDF |
|
16 | P. Balasubramanian 0001, David A. Edwards, William B. Toms |
Self-Timed Section-Carry Based Carry Lookahead Adders and the Concept of Alias Logic. |
J. Circuits Syst. Comput. |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Vaibhav Gupta, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy 0001 |
Low-Power Digital Signal Processing Using Approximate Adders. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Mehdi Saeedi, Alireza Shafaei, Massoud Pedram |
Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures |
CoRR |
2013 |
DBLP BibTeX RDF |
|
16 | Costas Efstathiou, Zaher Owda, Yiorgos Tsiatouhas |
New High-Speed Multioutput Carry Look-Ahead Adders. |
IEEE Trans. Circuits Syst. II Express Briefs |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Mehdi Saeedi, Alireza Shafaei, Massoud Pedram |
Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures. |
RC |
2013 |
DBLP DOI BibTeX RDF |
|
16 | P. Balasubramanian, D. Dhivyaa, J. P. Jayakirthika, P. Kaviyarasi, K. Prasad |
Low power self-timed carry lookahead adders. |
MWSCAS |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Ismo Hänninen, Craig S. Lent, Gregory L. Snider |
Models of irreversibility for binary adders. |
MWSCAS |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Rakshith Saligram |
Design of Low Logical Cost Conservative Reversible Adders Using Novel PCTG. |
ISED |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Amit Grover, Neeti Grover |
Comparative Analysis: Area-Efficient Carry Select Adders 180 Nm Technology. |
Asia International Conference on Modelling and Simulation |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Martin Kumm, Martin Hardieck, Jens Willkomm, Peter Zipf, Uwe Meyer-Baese |
Multiple constant multiplication with ternary adders. |
FPL |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Alexios Thanos, Haridimos T. Vergos |
Fast parallel-prefix Ling-carry adders in QCA nanotechnology. |
ICECS |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Wesley Chu, Ali I. Unwala, Pohan Wu, Earl E. Swartzlander Jr. |
Implementation of a high speed multiplier using carry lookahead adders. |
ACSSC |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Kjell O. Jeppson, Per Larsson-Edefors |
Exploring prefix-tree adders using excel spreadsheets Setting up an explorative learning environment. |
MSE |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Reza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Mojtaba Maleknejad, Keivan Navi, Omid Hashemipour |
Dramatically Low-Transistor-Count High-Speed Ternary Adders. |
ISMVL |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik |
Exploring the energy efficiency of Multispeculative Adders. |
ICCD |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Ali Sayyed, Luciano Lavagno, Shah Khalid, Najeeb Ur Rahman |
Implementation and performance analysis of variable latency adders. |
SoCC |
2013 |
DBLP DOI BibTeX RDF |
|
16 | George Razvan Voicu, Mihai Lefter, Marius Enachescu, Sorin Dan Cotofana |
3D stacked wide-operand adders: A case study. |
ASAP |
2013 |
DBLP DOI BibTeX RDF |
|
16 | Ireneusz Brzozowski, Damian Palys, Andrzej Kos |
An analysis of full adder cells for low-power data oriented adders design. |
MIXDES |
2013 |
DBLP BibTeX RDF |
|
16 | Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan |
Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures. |
DAC |
2013 |
DBLP DOI BibTeX RDF |
|
16 | P. Balasubramanian 0001, David A. Edwards, William B. Toms |
Redundant Logic Insertion and Latency Reduction in Self-Timed Adders. |
VLSI Design |
2012 |
DBLP DOI BibTeX RDF |
|
16 | Haridimos T. Vergos |
Area-time efficient end-around inverted carry adders. |
Integr. |
2012 |
DBLP DOI BibTeX RDF |
|
16 | Shahzad Asif, Mark Vesterbacka |
Performance analysis of radix-4 adders. |
Integr. |
2012 |
DBLP DOI BibTeX RDF |
|
16 | Haridimos T. Vergos, Dimitris Bakalis |
Area-time efficient multi-modulus adders and their applications. |
Microprocess. Microsystems |
2012 |
DBLP DOI BibTeX RDF |
|
16 | Feng Liu 0029, QingPing Tan, Otmane Aït Mohamed |
Formal proof of integer adders using all-prefix-sums operation. |
Sci. China Inf. Sci. |
2012 |
DBLP DOI BibTeX RDF |
|