Search results for "reconfigurability"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
10	Patrick Schaumont, Kazuo Sakiyama, Alireza Hodjat, Ingrid Verbauwhede	Embedded Software Integration for Coarse-Grain Reconfigurable Systems.	IPDPS	2004	DBLP DOI BibTeX RDF
10	Klaus Waldschmidt	Adaptive System Architectures.	IPDPS	2004	DBLP DOI BibTeX RDF
10	Ali Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich	A New Approach for On-line Placement on Reconfigurable Devices.	IPDPS	2004	DBLP DOI BibTeX RDF
10	Carolina Selva, Cosimo Torelli, Danilo Rimondi, Rita Zappa, Stefano Corbani, Giovanni Mastrodomenico, Lara Albani	A Programmable Built-in Self-Diagnosis for Embedded SRAM.	MTDT	2004	DBLP DOI BibTeX RDF
10	N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk	A Structured System Methodology for FPGA Based System-on-A-Chip Design.	FCCM	2004	DBLP DOI BibTeX RDF
10	Ka-Ping Yee	Two-handed interaction on a tablet display.	CHI Extended Abstracts	2004	DBLP DOI BibTeX RDF	asymmetric bimanual interaction, commodity hardware, tablet computing, touch-sensitive screens
10	Marc Epalza, Paolo Ienne, Daniel Mlynek	Dynamic Reallocation of Functional Units in Superscalar Processors.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
10	Manfred Glesner, Thomas Hollstein, Leandro Soares Indrusiak, Peter Zipf, Thilo Pionteck, Mihail Petrov, Heiko Zimmer, Tudor Murgan	Reconfigurable platforms for ubiquitous computing.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	ubiquitous computing, communication, networks-on-chip, reconfiguration, reconfigurable hardware, dynamic power management, reconfigurable processors
10	Xin Liu, Steve Goddard	Supporting Dynamic QoS in Linux.	IEEE Real-Time and Embedded Technology and Applications Symposium	2004	DBLP DOI BibTeX RDF
10	Guichang Zhong, Fan Xu, Dengwei Fu, Alan N. Willson Jr.	An energy-efficient reconfigurable angle-rotator architecture.	ISCAS (3)	2004	DBLP DOI BibTeX RDF
10	Zhiyuan Yan, Dilip V. Sarwate	Universal Reed-Solomon decoders based on the Berlekamp-Massey algorithm.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	VLSI architectures, Reed-Solomon codes, error-control codes, Berlekamp-Massey algorithm
10	Stuart McCracken, Zeljko Zilic	Design for Testability of FPGA Blocks.	ISQED	2004	DBLP DOI BibTeX RDF
10	Jason G. Brown, R. D. (Shawn) Blanton	CAEN-BIST: Testing the NanoFabric.	ITC	2004	DBLP DOI BibTeX RDF
10	Giovanni Agosta, Francesco Bruschi, Donatella Sciuto	Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware.	DELTA	2004	DBLP DOI BibTeX RDF
10	Kevin Curran, Gerard Parr	Introducing IP Domain Flexible Middleware Stacks for Multicast Multimedia Distribution in Heterogeneous Environments.	MATA	2004	DBLP DOI BibTeX RDF
10	Tae-Hyung Kim, Seongsoo Hong	State Machine Based Operating System Architecture for Wireless Sensor Networks.	PDCAT	2004	DBLP DOI BibTeX RDF
10	Amit Singh 0001, Arindam Mukherjee 0001, Luca Macchiarulo, Malgorzata Marek-Sadowska	PITIA: an FPGA for throughput-intensive applications.	IEEE Trans. Very Large Scale Integr. Syst.	2003	DBLP DOI BibTeX RDF
10	Baback A. Izadi, Füsun Özgüner	Enhanced Cluster k-Ary n-Cube, A Fault-Tolerant Multiprocessor.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	spare allocation, augmented multiprocessor, wave switching, Fault tolerance, reconfiguration, hypercube, k-ary n-cube
10	Kohsia S. Huang, Mohan M. Trivedi	Video arrays for real-time tracking of person, head, and face in an intelligent room.	Mach. Vis. Appl.	2003	DBLP DOI BibTeX RDF	Multi-camera systems, Omnidirectional video arrays, 3D person and face tracking, Intelligent rooms, Real-time vision
10	Keith Whisnant, Zbigniew Kalbarczyk, Ravishankar K. Iyer	A Foundation for Adaptive Fault Tolerance in Software.	ECBS	2003	DBLP DOI BibTeX RDF
10	Nikos Migas, William J. Buchanan, Kevin A. McArtney	Mobile Agents for Routing, Topology Discovery, and Automatic Network Reconfiguration in Ad-Hoc Networks.	ECBS	2003	DBLP DOI BibTeX RDF	stationary agents, automatic network reconfiguration, ad-hoc networks, wireless networks, mobile agents, routing protocols, topology discovery
10	Giacomo Morabito, Sergio Palazzo, Michele Rossi, Michele Zorzi	Improving End-to-End Performance in Reconfigurable Networks through Dynamic Setting of TCP Parameters.	QoS-IP	2003	DBLP DOI BibTeX RDF
10	Aldo Roveri, Carla-Fabiana Chiasserini, Mauro Femminella, Tommaso Melodia, Giacomo Morabito, Michele Rossi, Ilenia Tinnirello	The RAMON Module: Architecture Framework and Performance Results.	QoS-IP	2003	DBLP DOI BibTeX RDF
10	Mauro Femminella, Leonardo Piacentini	Mobility Management in a Reconfigurable Environment: The RAMON Approach.	QoS-IP	2003	DBLP DOI BibTeX RDF
10	Zahra Sadat Ebadi, André Ivanov	Time Domain Multiplexed TAM: Implementation and Comparison.	DATE	2003	DBLP DOI BibTeX RDF	Time domain multiplexed TAM, Optimal test time, Test Access Mechanism (TAM), SoC testing, Embedded core testing
10	Lih-Yih Chiou, Swarup Bhunia, Kaushik Roy 0001	Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications.	DATE	2003	DBLP DOI BibTeX RDF
10	Om Prakash Gangwal, Johan G. W. M. Janssen, Selliah Rathnam, Erwin B. Bellers, Marc Duranton	Understanding Video Pixel Processing Applications for Flexible Implementations.	DSD	2003	DBLP DOI BibTeX RDF
10	Helmut Alt, Christian Knauer, Günter Rote, Sue Whitesides	The complexity of (un)folding.	SCG	2003	DBLP DOI BibTeX RDF	linkage reconfiguration, computational geometry, PSPACE-completeness
10	Praveen Krishnamurthy, Mark A. Franklin, Roger D. Chamberlain	Dynamic Reconfiguration of an Optical Interconnect.	Annual Simulation Symposium	2003	DBLP DOI BibTeX RDF
10	Allen Michalski, Kris Gaj, Tarek A. El-Ghazawi	An Implementation Comparison of an IDEA Encryption Cryptosystem on Two General-Purpose Reconfigurable Computers.	FPL	2003	DBLP DOI BibTeX RDF
10	John Teifel, Rajit Manohar	Programmable Asynchronous Pipeline Arrays.	FPL	2003	DBLP DOI BibTeX RDF
10	Vinu Vijay Kumar, John C. Lach	Designing, Scheduling, and Allocating Flexible Arithmetic Components.	FPL	2003	DBLP DOI BibTeX RDF
10	Markus Hütter, Holger Bock, Michael Scheppler	A New Reconfigurable Architecture for Single Cycle Context Switching.	IPDPS	2003	DBLP DOI BibTeX RDF
10	Paul Beckett	A Polymorphic Hardware Platform.	IPDPS	2003	DBLP DOI BibTeX RDF
10	Wei Ming Lim, Mohammed Benaissa	Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and cryptography.	CODES+ISSS	2003	DBLP DOI BibTeX RDF	GF(2m) arithmetic, forward error control coding, galois field processor, cryptography, advanced encryption standard, elliptic curve cryptography, design space exploration, Reed-Solomon code, hardware-software co-design, BCH code
10	Osvaldo Colavin, Davide Rizzo	A scalable wide-issue clustered VLIW with a reconfigurable interconnect.	CASES	2003	DBLP DOI BibTeX RDF	clustered VLIW, reconfigurable co-processor (RCP), modulo scheduling, IDCT
10	Michele Amoretti, Stefano Bottazzi, Monica Reggiani, Stefano Caselli	Designing Telerobotic Systems as Distributed CORBA-Based Applications.	OTM	2003	DBLP DOI BibTeX RDF
10	Reza Sedaghat	A fast algorithm to reduce 2-dimensional assignment problems to 1-dimensional assignment problems for FPGA-based fault simulation.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
10	Kuan-Hung Chen, Tzi-Dar Chiueh	Design and implementation of a reconfigurable FIR filter.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
10	Paul Beckett	Exploiting multiple functionality for nano-scale reconfigurable systems.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	chalcogenide, double gate transistors, multi-valued RAM, multiple functionality, resonant tunneling, nanotechnology, reconfigurable systems, carbon nanotube, nanoelectronics, RTD
10	Zeyad Ali, Qutaibah M. Malluhi	NSM: A Distributed Storage Architecture for Data-Intensive Applications.	IEEE Symposium on Mass Storage Systems	2003	DBLP DOI BibTeX RDF
10	Garrison W. Greenwood, Edward Ramsden, Saima Ahmed	An Empirical Comparison of Evolutionary Algorithms for Evolvable Hardware.	Evolvable Hardware	2003	DBLP DOI BibTeX RDF
10	Chia-Lin Hsu, Shih-Feng Chou, Jong-Chuang Tsay, Feng-Jian Wang	JTEAM: A Framework for Effective Teamwork of BDI-Based Agents.	FTDCS	2003	DBLP DOI BibTeX RDF
10	Nikos Houssos, Nancy Alonistioti, Lazaros F. Merakos	A Scheme for the Introduction of 3rd Party, Application-Specific Adaptation Features in Mobile Service Provision.	DAIS	2003	DBLP DOI BibTeX RDF
10	Ludger Fiege, Felix C. Gärtner, Oliver Kasten, Andreas Zeidler	Supporting Mobility in Content-Based Publish/Subscribe Middleware.	Middleware	2003	DBLP DOI BibTeX RDF
10	G. Costantino Giaconia, Antonio Di Stefano, Giuseppe Capponi	Reconfigurable Digital Instrumentation Based on FPGA.	IWSOC	2003	DBLP DOI BibTeX RDF
10	Aldo Romani, Fabio Campi, S. Ronconi, Marco Tartagni, Gianni Medoro, Nicolò Manaresi	A System-on-a-Programmable-Chip for Real-Time Control of Massively Parallel Arrays of Biosensors and Actuators.	IWSOC	2003	DBLP DOI BibTeX RDF
10	Jan Craninckx, Stéphane Donnay	4G terminals: how are we going to design them?	DAC	2003	DBLP DOI BibTeX RDF	4th generation, radio front-end, telecommunication, wireless systems
10	Licia Capra, Gordon S. Blair, Cecilia Mascolo, Wolfgang Emmerich, Paul Grace	Exploiting reflection in mobile computing middleware.	ACM SIGMOBILE Mob. Comput. Commun. Rev.	2002	DBLP DOI BibTeX RDF
10	Geoff Coulson, Gordon S. Blair, Michael Clarke, Nikos Parlavantzas	The design of a configurable and reconfigurable middleware platform.	Distributed Comput.	2002	DBLP DOI BibTeX RDF	Component technology reflection, Middleware, Reconfiguration
10	Sandeep Koranne	A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm.	J. Electron. Test.	2002	DBLP DOI BibTeX RDF	embedded core based test scheduling, reconfigurable wrapper, parallel scheduling of malleable tasks, system-on-chip test, VLSI test
10	Francisco Barat, Rudy Lauwereins, Geert Deconinck	Reconfigurable Instruction Set Processors from a Hardware/Software Perspective.	IEEE Trans. Software Eng.	2002	DBLP DOI BibTeX RDF	Reconfigurable instruction set processor overview, compiler, microprocessor, reconfigurable logic
10	J. Bryan Lewis, Ivo Bolsens, Rudy Lauwereins, Chris Wheddon, Bhusan Gupta, Yankin Tanurhan	Reconfigurable SoC - What Will it Look Like?	DATE	2002	DBLP DOI BibTeX RDF
10	Saburo Matunaga, Ryuichi Hodoshima, Hideto Okada, Naoki Miyashita, Nobumasa Yamaguchi	Ground experiment system of reconfigurable robot satellites.	ICARCV	2002	DBLP DOI BibTeX RDF
10	Mauro Migliardi, Vaidy S. Sunderam	Automatic Reincarnation of Deceased Plug-Ins in the HARNESS Metacomputing System.	IPDPS	2002	DBLP DOI BibTeX RDF
10	Oskar Mencer	PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs.	FCCM	2002	DBLP DOI BibTeX RDF
10	Ingrid Verbauwhede, M.-C. Frank Chang	Reconfigurable interconnect for next generation systems.	SLIP	2002	DBLP DOI BibTeX RDF	architectures, reconfiguration, interconnect, design methods, power efficiency
10	Takushi Hisakado, Tsuneto Nishimura, Kohshi Okumura	Hardware implementation of Moore test on FPGA.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
10	Gordon S. Blair, Geoff Coulson, Lynne Blair, Hector A. Duran-Limon, Paul Grace, Rui S. Moreira, Nikos Parlavantzas	Reflection, self-awareness and self-healing in OpenORB.	WOSS	2002	DBLP DOI BibTeX RDF	middleware, reflection, self-healing, self-awareness
10	Andrzej Kapolka, Don McGregor, Michael V. Capps	A unified component framework for dynamically extensible virtual environments.	CVE	2002	DBLP DOI BibTeX RDF	dynamic extensibility, Java, XML, networked virtual environments, component-based architectures
10	Sergej Sawitzki, Steffen Köhler, Rainer G. Spallek	Prototyping Framework for Reconfigurable Processors.	FPL	2001	DBLP DOI BibTeX RDF
10	Krishna V. Palem, Surendranath Talla, Weng-Fai Wong	Compiler Optimizations for Adaptive EPIC Processors.	EMSOFT	2001	DBLP DOI BibTeX RDF
10	Christophe Bobda, Nils Steenbock	Singular Value Decomposition on Distributed Reconfigurable Systems.	IEEE International Workshop on Rapid System Prototyping	2001	DBLP DOI BibTeX RDF
10	Dawid Kurzyniec, Vaidy S. Sunderam	Flexible Class Loader Framework: Sharing Java Resources in Harness System.	International Conference on Computational Science (1)	2001	DBLP DOI BibTeX RDF
10	Aravind Dasu, Sethuraman Panchanathan	Reconfigurable Media Processing.	ITCC	2001	DBLP DOI BibTeX RDF
10	Gordon S. Blair, Geoff Coulson, Michael Clarke, Nikos Parlavantzas	Performance and Integrity in the OpenORB Reflective Middleware.	Reflection	2001	DBLP DOI BibTeX RDF
10	Abram P. Dancy, Rajeevan Amirtharajah, Anantha P. Chandrakasan	High-efficiency multiple-output DC-DC conversion for low-voltage systems.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
10	Mauro Migliardi, Vaidy S. Sunderam, Arrigo L. Frisiani	A Simple, Fault Tolerant Naming Space for the HARNESS Metacomputing System.	PVM/MPI	2000	DBLP DOI BibTeX RDF
10	Mauro Migliardi, Vaidy S. Sunderam	The Harness PVM-Proxy: Gluing PVM Applications to Distributed Object Environments and Applications.	Heterogeneous Computing Workshop	2000	DBLP DOI BibTeX RDF
10	Amit Singh 0001, Luca Macchiarulo, Arindam Mukherjee 0001, Malgorzata Marek-Sadowska	A novel high throughput reconfigurable FPGA architecture.	FPGA	2000	DBLP DOI BibTeX RDF
10	Mounir Benabdenbi, Walid Maroufi, Meryem Marzouki	CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip.	DATE	2000	DBLP DOI BibTeX RDF
10	Takahiro Murooka, Toshiaki Miyazaki	Protocol Stack-Based Telecom-Emulator.	DATE	2000	DBLP DOI BibTeX RDF
10	Didier Dulac, Gilles Bertrand 0001, Saloua Guezguez	Parallel Segmentation Based on Topology with the Associative Net Model.	CAMP	2000	DBLP DOI BibTeX RDF
10	Josep Torrellas, Liuxi Yang, Anthony-Trung Nguyen	Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration.	HPCA	2000	DBLP DOI BibTeX RDF	directory controller, multiprocessor, reconfigurable, PIM, DSM, coherence protocol, NUMA, processor-in-memory, COMA
10	Paul M. Heysters, Jaap Smit, Gerard J. M. Smit, Paul J. M. Havinga	Mapping of DSP Algorithms on Field Programmable Function Arrays.	FPL	2000	DBLP DOI BibTeX RDF
10	Tero Rissa, Jarkko Niittylahti	A Hybrid Prototyping Platform for Dynamically Reconfigurable Designs.	FPL	2000	DBLP DOI BibTeX RDF
10	Yuichiro Shibata, Masaki Uno, Hideharu Amano, Koichiro Furuta, Taro Fujii, Masato Motomura	A Virtual Hardware System on a Dynamically Reconfigurable Logic Device.	FCCM	2000	DBLP DOI BibTeX RDF
10	Francisco Barat, Rudy Lauwereins	Reconfigurable Instruction Set Processors: A Survey.	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	dynamically reconfigurable instruction set processor, reconfigurable functional unit, application specific instructions, reconfigurable computing
10	Moritoshi Yasunaga, Ikuo Yoshihara, Jung Hwan Kim	A High Speed and High Fault Tolerant Reconfigurable Reasoning System: Toward a Wafer Scale Reconfigurable Reasoning LSI.	DFT	2000	DBLP DOI BibTeX RDF
10	Dewayne E. Perry	A Product Line Architecture for a Network Product.	IW-SAPF	2000	DBLP DOI BibTeX RDF
10	Brian Dipert, Danesh Tavana, Barry K. Britton, Bill Harris, Bob Boderson, Chris Rowen	Future systems-on-chip: software of hardware design? (panel session).	DAC	2000	DBLP DOI BibTeX RDF
10	Octavian-Dumitru Mocanu, Joan Oliver	Fault-Tolerant Memory Architecture Against Radiation-Dependent Errors: A Mixed Error Control Approach.	J. Electron. Test.	1999	DBLP DOI BibTeX RDF	hamming SEC code, latch-up, memory system, single event upset, built-in current sensor
10	Damien Cailliau, Remy Bellenger	The CorotInstrument's Software: Towards Intrinsically Reconfigurable Real-Time Embedded Processing Software in Space-Born Instruments.	HASE	1999	DBLP DOI BibTeX RDF	Space-borne, Reconfiguration, Software, embedded, Dynamic, Proxy
10	Mauro Migliardi, Vaidy S. Sunderam	PVM Emulation in the Harness Metacomputing System: A Plug-in Based Approach.	PVM/MPI	1999	DBLP DOI BibTeX RDF
10	Toshiaki Miyazaki, Takahiro Murooka, Masaru Katayama, Atsushi Takahara	Transmutable Telecom System and Its Application.	FCCM	1999	DBLP DOI BibTeX RDF	FPGA, Networks, CAD, ATM, Reconfigurable, Telecommunications, Programmable
10	Alberto Ferrari, Alberto L. Sangiovanni-Vincentelli	System Design: Traditional Concepts and New Paradigms.	ICCD	1999	DBLP DOI BibTeX RDF	embedded system, system design, platform
10	M. Ranganathan, Virginie Schaal, Virginie Galtier, Doug Montgomery	Mobile Streams: A Middleware for Reconfigurable Distributed Scripting.	ASA/MA	1999	DBLP DOI BibTeX RDF
10	Gianpaolo Cugola, Carlo Ghezzi	Design and Implementation of PROSYT: A Distributed Process Support System.	WETICE	1999	DBLP DOI BibTeX RDF
10	James Jennings, Eric Beuscher	Verischemelog: Verilog embedded in Scheme.	DSL	1999	DBLP DOI BibTeX RDF
10	Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Bagherzadeh, Fadi J. Kurdahi, Eliseu M. Chaves Filho, Vladimir Castro Alves	The MorphoSys Dynamically Reconfigurable System-on-Chip.	Evolvable Hardware	1999	DBLP DOI BibTeX RDF
10	Emeka Mosanya, Christof Teuscher, Héctor Fabio Restrepo, Patrick Galley, Eduardo Sanchez	CryptoBooster: A Reconfigurable and Modular Cryptographic Coprocessor.	CHES	1999	DBLP DOI BibTeX RDF	FPGA, Cryptography, Reconfiguration, Coprocessor, IDEA
10	Akihiro Matsuura, Akira Nagoya	Summation Algorithms on Constrained Reconfigurable Meshes.	ISPAN	1999	DBLP DOI BibTeX RDF	constrained reconfigurable mesh, Bit summation, parallel algorithm, reconfigurable mesh
10	Lizy Kurian John, E. John	A dynamically reconfigurable interconnect for array processors.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
10	Michael J. Wirthlin, Brad L. Hutchings	Improving functional density using run-time circuit reconfiguration [FPGAs].	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
10	John Y. Wei, Michael Post, Chien-Chung Shen, Brian J. Wilson 0001, Jorge L. Pastor, Mari Maeda, Yukun Tsai	Network control and management of reconfigurable WDM all-optical network.	NOMS	1998	DBLP DOI BibTeX RDF
10	Mauro Migliardi, Jack J. Dongarra, Al Geist, Vaidy S. Sunderam	Dynamic Reconfiguration and Virtual Machine Management in the Harness Metacomputing System.	ISCOPE	1998	DBLP DOI BibTeX RDF
10	Toshiaki Miyazaki, Kazuhiro Shirakawa, Masaru Katayama, Takahiro Murooka, Atsushi Takahara	A Transmutable Telecom System.	FPL	1998	DBLP DOI BibTeX RDF
10	Neil W. Bergmann, Peter R. Sutton	A High-Performance Computing Module for a Low Earth Orbit Satellite Using Reconfigurable Logic.	FPL	1998	DBLP DOI BibTeX RDF
10	Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Ryusuke Konishi, Norbert Imlig	A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture.	FPL	1998	DBLP DOI BibTeX RDF
10	Dinesh Bhatia, PariVallal Kannan, Kuldeep S. Simha, Karthikeya M. Gajjala Purna	REACT: Reactive Environment for Runtime Reconfiguration.	FPL	1998	DBLP DOI BibTeX RDF