Search results for "self-checking"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
6	Sergio D'Angelo, Giacomo R. Sechi, Cecilia Metra	Transient and Permanent Fault Diagnosis for FPGA-Based TMR Systems.	DFT	1999	DBLP DOI BibTeX RDF	transient fault detection, Field Programmable Gate Array, TMR systems
6	Dennis K. Peters, David Lorge Parnas	Using Test Oracles Generated from Program Documentation.	IEEE Trans. Software Eng.	1998	DBLP DOI BibTeX RDF	formal specification, finite state machine, Program testing, test oracle
6	Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig	Synthesizing Fast, Online-Testable Control Units.	IEEE Des. Test Comput.	1998	DBLP DOI BibTeX RDF
6	Dominic Mayers, Andrew Chi-Chih Yao	Quantum Cryptography with Imperfect Apparatus.	FOCS	1998	DBLP DOI BibTeX RDF
6	Jaime Velasco-Medina, Marcelo Lubaszewski, Michael Nicolaidis	An Approach to the On-Line Testing of Operational Amplifiers.	Asian Test Symposium	1998	DBLP DOI BibTeX RDF
6	Jien-Chung Lo	Highly Reliable Systems with Differential Built-In Current Sensors.	DFT	1998	DBLP DOI BibTeX RDF	reliability, concurrent error detection, supplying current monitoring
6	Cecilia Metra, Michele Favalli, Bruno Riccò	On-line detection of logic errors due to crosstalk, delay, and transient faults.	ITC	1998	DBLP DOI BibTeX RDF
6	Cristiana Bolchini, Fabio Salice, Donatella Sciuto	Parity Bit Code: Achieving a Complete Fault Coverage in the Design of TSC Combinational Networks.	Great Lakes Symposium on VLSI	1997	DBLP DOI BibTeX RDF
6	Egor S. Sogomonyan, Michael Gössel	Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems.	VTS	1996	DBLP DOI BibTeX RDF	circuit feedback, concurrently self-testing embedded checker, ultra-reliable fault-tolerant system, parity codes, design, monitoring, built-in self test, integrated circuit testing, linear feedback shift register, error detection codes, error detection code, shift registers, arithmetic codes, Berger codes, duplication codes, integrated circuit reliability, corrector
6	Vladimir Kolarik, Salvador Mir, Marcelo Lubaszewski, Bernard Courtois	Analog checkers with absolute and relative tolerances.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1995	DBLP DOI BibTeX RDF
6	Kaushik De, Chitra Natarajan, Devi Nair, Prithviraj Banerjee	RSYN: a system for automated synthesis of reliable multilevel circuits.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
6	K. H. Kim, Alireza Kavianpour	A Distributed Recovery Block Approach to Fault-Tolerant Execution of Application Tasks in Hypercubes.	IEEE Trans. Parallel Distributed Syst.	1993	DBLP DOI BibTeX RDF	dual redundant mode, distributed recovery block, fault-tolerantexecution, real-time application tasks, computing station, self-checkingmode, fast forward recovery, fault tolerant computing, hypercubes, hypercube networks, task assignment, software faults, hardware fault
6	Jens Franzen	A design method for on-line reconfigurable array processors.	J. VLSI Signal Process.	1993	DBLP DOI BibTeX RDF	On-line reconfiguration, fault-tolerant array processors, design methodology, reliability estimation
6	L. E. Gallaher, Wing N. Toy	The fault-tolerant 3B-20 processor.	AFIPS National Computer Conference	1981	DBLP DOI BibTeX RDF
6	J. D. Canter, Charles E. Donaghey	UPLIFTS - University of Pittsburgh linear file tandem system.	Commun. ACM	1965	DBLP DOI BibTeX RDF
6	Frank E. Hamilton, Elmer C. Kubie	The IBM Magnetic Drum Calculator Type 650	J. ACM	1954	DBLP DOI BibTeX RDF

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