Search results for "ATVA"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Bow-Yaw Wang	On the Satisfiability of Modular Arithmetic Formulae.	ATVA	2006	DBLP DOI BibTeX RDF
1	Sven Schewe	Synthesis for Probabilistic Environments.	ATVA	2006	DBLP DOI BibTeX RDF
1	Parosh Aziz Abdulla, Noomene Ben Henda, Richard Mayr, Sven Sandberg	Eager Markov Chains.	ATVA	2006	DBLP DOI BibTeX RDF
1	Hang Su 0009, Graham Hemingway, Kai Chen 0010, Tak-John Koo	Model-Based Tool-Chain Infrastructure for Automated Analysis of Embedded Systems.	ATVA	2006	DBLP DOI BibTeX RDF
1	Mihalis Yannakakis	Analysis of Recursive Probabilistic Models.	ATVA	2006	DBLP DOI BibTeX RDF
1	Fernando Rosa-Velardo, David de Frutos-Escrig	Symbolic Semantics for the Verification of Security Properties of Mobile Petri Nets.	ATVA	2006	DBLP DOI BibTeX RDF
1	Béatrice Bérard, Franck Cassez, Serge Haddad, Didier Lime, Olivier H. Roux	Comparison of Different Semantics for Time Petri Nets.	ATVA	2005	DBLP DOI BibTeX RDF	Timed Bisimilarity, Expressiveness, Time Petri Nets
1	Bernd Finkbeiner, Sven Schewe	Semi-automatic Distributed Synthesis.	ATVA	2005	DBLP DOI BibTeX RDF
1	Jean-Marie Orset, Baptiste Alcalde, Ana R. Cavalli	An EFSM-Based Intrusion Detection System for Ad Hoc Networks.	ATVA	2005	DBLP DOI BibTeX RDF
1	Geng-Dian Huang, Farn Wang	Automatic Test Case Generation with Region-Related Coverage Annotations for Real-Time Systems.	ATVA	2005	DBLP DOI BibTeX RDF
1	Yongsun Choi, J. Leon Zhao	Decomposition-Based Verification of Cyclic Workflows.	ATVA	2005	DBLP DOI BibTeX RDF
1	Doron A. Peled, Yih-Kuen Tsay (eds.)	Automated Technology for Verification and Analysis, Third International Symposium, ATVA 2005, Taipei, Taiwan, October 4-7, 2005, Proceedings	ATVA	2005	DBLP DOI BibTeX RDF
1	Isao Yagi, Yoshiaki Takata, Hiroyuki Seki	A Static Analysis Using Tree Automata for XML Access Control.	ATVA	2005	DBLP DOI BibTeX RDF
1	Olivier Tardieu, Stephen A. Edwards	Approximate Reachability for Dead Code Elimination in Esterel.	ATVA	2005	DBLP DOI BibTeX RDF
1	Abhishek Dubey, Xianbin Wu, Hang Su 0009, Tak-John Koo	Computation Platform for Automatic Analysis of Embedded Software Systems Using Model Based Approach.	ATVA	2005	DBLP DOI BibTeX RDF
1	Sami Evangelista, Serge Haddad, Jean-François Pradat-Peyre	Syntactical Colored Petri Nets Reductions.	ATVA	2005	DBLP DOI BibTeX RDF
1	Giuseppe Della Penna, Igor Melatti, Benedetto Intrigila, Enrico Tronci	Exploiting Hub States in Automatic Verification.	ATVA	2005	DBLP DOI BibTeX RDF
1	Guy Edward Gallasch, Jonathan Billington	Using Parametric Automata for the Verification of the Stop-and-Wait Class of Protocols.	ATVA	2005	DBLP DOI BibTeX RDF	Stop and Wait Protocols, Symbolic Automata, Language Equivalence, Coloured Petri Nets, Parametric Verification, Symbolic Reachability Graphs
1	Tun Li, Yang Guo 0003, Sikun Li, GongJie Liu	Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming.	ATVA	2005	DBLP DOI BibTeX RDF
1	Yuhong Zhao 0001, Martin Kardos, Simon Oberthür, Franz J. Rammig	Comprehensive Verification Framework for Dependability of Self-optimizing Systems.	ATVA	2005	DBLP DOI BibTeX RDF
1	Mouna Saad, Leila Jemni Ben Ayed	Introducing Dynamic Properties with Past Temporal Operators in the B Refinement.	ATVA	2005	DBLP DOI BibTeX RDF
1	Ali Habibi, Sofiène Tahar	An Approach for the Verification of SystemC Designs Using AsmL.	ATVA	2005	DBLP DOI BibTeX RDF
1	Werner Damm, Guilherme Pinto, Stefan Ratschan	Guaranteed Termination in the Verification of LTL Properties of Non-linear Robust Discrete Time Hybrid Systems.	ATVA	2005	DBLP DOI BibTeX RDF
1	Amir Pnueli	Ranking Abstraction as a Companion to Predicate Abstraction, .	ATVA	2005	DBLP DOI BibTeX RDF
1	Maciej Szreter	Selective Search in Bounded Model Checking of Reachability Properties.	ATVA	2005	DBLP DOI BibTeX RDF
1	Charles A. Lakos, Lars Michael Kristensen	State Space Exploration of Object-Based Systems Using Equivalence Reduction and the Sweepline Method.	ATVA	2005	DBLP DOI BibTeX RDF
1	Pierre Combes, David Harel, Hillel Kugler	Modeling and Verification of a Telecommunication Application Using Live Sequence Charts and the Play-Engine Tool.	ATVA	2005	DBLP DOI BibTeX RDF
1	Sébastien Bardin, Alain Finkel, Jérôme Leroux, Philippe Schnoebelen	Flat Acceleration in Symbolic Model Checking.	ATVA	2005	DBLP DOI BibTeX RDF	verification of infinite-state systems, acceleration, symbolic model checking
1	Debashis Sahoo, Jawahar Jain, Subramanian K. Iyer, David L. Dill	A New Reachability Algorithm for Symmetric Multi-processor Architecture.	ATVA	2005	DBLP DOI BibTeX RDF
1	Purandar Bhaduri	Synthesis of Interface Automata.	ATVA	2005	DBLP DOI BibTeX RDF
1	Sharon Shoham, Orna Grumberg	Multi-valued Model Checking Games.	ATVA	2005	DBLP DOI BibTeX RDF
1	Xiaoyu Mao, Janette Cardoso, Robert Valette	A New Graph of Classes for the Preservation of Quantitative Temporal Constraints.	ATVA	2005	DBLP DOI BibTeX RDF
1	Venkatesh Mysore, Carla Piazza, Bud Mishra	Algorithmic Algebraic Model Checking II: Decidability of Semi-algebraic Model Checking and Its Applications to Systems Biology.	ATVA	2005	DBLP DOI BibTeX RDF
1	Gary Lindstrom, Peter C. Mehlitz, Willem Visser	Model Checking Real Time Java Using Java PathFinder.	ATVA	2005	DBLP DOI BibTeX RDF
1	Shang-Wei Lin 0001, Pao-Ann Hsiung, Chun-Hsian Huang, Yean-Ru Chen	Model Checking Prioritized Timed Automata.	ATVA	2005	DBLP DOI BibTeX RDF	Prioritized timed automata, DBM subtraction, zone merging, zone reduction
1	Fuzhi Wang, Marta Z. Kwiatkowska	An MTBDD-Based Implementation of Forward Reachability for Probabilistic Timed Automata.	ATVA	2005	DBLP DOI BibTeX RDF
1	Stéphane Demri, David Nowak	Reasoning About Transfinite Sequences.	ATVA	2005	DBLP DOI BibTeX RDF
1	Wolfgang Thomas	Some Perspectives of Infinite-State Verification.	ATVA	2005	DBLP DOI BibTeX RDF
1	Limor Fix, Orna Grumberg, Amnon Heyman, Tamir Heyman, Assaf Schuster	Verifying Very Large Industrial Circuits Using 100 Processes and Beyond.	ATVA	2005	DBLP DOI BibTeX RDF
1	Aaron R. Bradley, Zohar Manna	Termination and Invariance Analysis of Loops.	ATVA	2005	DBLP DOI BibTeX RDF
1	Moonzoo Kim, Kyo Chul Kang	Formal Construction and Verification of Home Service Robots: A Case Study.	ATVA	2005	DBLP DOI BibTeX RDF
1	Andrei Voinikonis	Quantitative and Qualitative Analysis of Temporal Aspects of Complex Activities.	ATVA	2005	DBLP DOI BibTeX RDF
1	Jérôme Leroux, Grégoire Sutre	Flat Counter Automata Almost Everywhere!	ATVA	2005	DBLP DOI BibTeX RDF
1	Kai-Hui Chang, Wei-Ting Tu, Yi-Jong Yeh, Sy-Yen Kuo	A Temporal Assertion Extension to Verilog.	ATVA	2004	DBLP DOI BibTeX RDF	temporal assertion, verification, PSL
1	Denduang Pradubsuwun, Tomohiro Yoneda, Chris J. Myers	Partial Order Reduction for Detecting Safety and Timing Failures of Timed Circuits.	ATVA	2004	DBLP DOI BibTeX RDF
1	Farn Wang (eds.)	Automated Technology for Verification and Analysis: Second International Conference, ATVA 2004, Taipei, Taiwan, ROC, October 31-November 3, 2004. Proceedings	ATVA	2004	DBLP DOI BibTeX RDF
1	Lin Liu 0003, Jonathan Billington	Reducing Parametric Automata: A Multimedia Protocol Service Case Study.	ATVA	2004	DBLP DOI BibTeX RDF
1	Gihwon Kwon, Taehoon Lee	Solving Box-Pushing Games via Model Checking with Optimizations.	ATVA	2004	DBLP DOI BibTeX RDF
1	ShengYu Shen, Ying Qin, Sikun Li	Localizing Errors in Counterexample with Iteratively Witness Searching.	ATVA	2004	DBLP DOI BibTeX RDF
1	Ansgar Fehnker, Bruce H. Krogh	Hybrid System Verification Is Not a Sinecure: The Electronic Throttle Control Case Study.	ATVA	2004	DBLP DOI BibTeX RDF
1	Abdur Rakib, Oleg Parshin, Stephan Thesing, Reinhard Wilhelm	Component-Wise Instruction-Cache Behavior Prediction.	ATVA	2004	DBLP DOI BibTeX RDF
1	Serge Haddad, Jean-Michel Ilié, Kais Klai	Design and Evaluation of a Symbolic and Abstraction-Based Model Checker.	ATVA	2004	DBLP DOI BibTeX RDF	Model Checking, Abstraction, OBDD
1	Sébastien Bardin, Alain Finkel	Composition of Accelerations to Verify Infinite Heterogeneous Systems.	ATVA	2004	DBLP DOI BibTeX RDF	unbounded heterogeneous data, composition of symbolic representations and acceleration methods, reachability set
1	Kairong Qian, Albert Nymeyer	Abstraction-Based Model Checking Using Heuristical Refinement.	ATVA	2004	DBLP DOI BibTeX RDF
1	Rajeev Alur	Games for Formal Design and Verification of Reactive Systems.	ATVA	2004	DBLP DOI BibTeX RDF
1	Konstantine Arkoudas	Specification, Abduction, and Proof.	ATVA	2004	DBLP DOI BibTeX RDF
1	Ehud Friedgut, Orna Kupferman, Moshe Y. Vardi	Büchi Complementation Made Tighter.	ATVA	2004	DBLP DOI BibTeX RDF
1	Mark J. Karol, Parameshwaran Krishnan, J. Jenny Li	Using Overlay Networks to Improve VoIP Reliability.	ATVA	2004	DBLP DOI BibTeX RDF
1	Jérôme Leroux	Disjunctive Invariants for Numerical Systems.	ATVA	2004	DBLP DOI BibTeX RDF
1	Ivan Cibrario Bertolotti, Luca Durante, Riccardo Sisto, Adriano Valenzano	Exploiting Symmetries for Testing Equivalence in the Spi Calculus.	ATVA	2004	DBLP DOI BibTeX RDF
1	Cyrille Artho, Klaus Havelund, Armin Biere	Using Block-Local Atomicity to Detect Stale-Value Concurrency Errors.	ATVA	2004	DBLP DOI BibTeX RDF
1	David Sinclair, David Gray, Geoff W. Hamilton	Synthesising Attacks on Cryptographic Protocols.	ATVA	2004	DBLP DOI BibTeX RDF	security, model checking, cryptographic protocols
1	Jean-Pierre Jouannaud	Theorem Proving Languages for Verification.	ATVA	2004	DBLP DOI BibTeX RDF
1	Wen-Kui Chang, Chun-Yuan Chen	Integrity-Enhanced Verification Scheme for Software-Intensive Organizations.	ATVA	2004	DBLP DOI BibTeX RDF	Software Capability Level, Software Integrity Level, ISO 9001:2000, Software Process Improvement (SPI), CMMI, Software Verification and Validation
1	Shaoying Liu	An Automated Rigorous Review Method for Verifying and Validating Formal Specifications.	ATVA	2004	DBLP DOI BibTeX RDF
1	Scott Little, David Walter, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda	Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets.	ATVA	2004	DBLP DOI BibTeX RDF
1	I. Gordin, Raya Leviathan, Amir Pnueli	Validating the Translation of an Industrial Optimizing Compiler.	ATVA	2004	DBLP DOI BibTeX RDF
1	Pei-Hsin Ho	Abstraction Refinement.	ATVA	2004	DBLP DOI BibTeX RDF
1	Tadaaki Tanimoto, Suguru Sasaki, Akio Nakata, Teruo Higashino	A Global Timed Bisimulation Preserving Abstraction for Parametric Time-Interval Automata.	ATVA	2004	DBLP DOI BibTeX RDF
1	Hiroaki Kikuchi	Rabin Tree and Its Application to Group Key Distribution.	ATVA	2004	DBLP DOI BibTeX RDF
1	Te-Chang Lee, Pao-Ann Hsiung	Mutation Coverage Estimation for Model Checking.	ATVA	2004	DBLP DOI BibTeX RDF
1	Tsung Lee, Pen-Ho Yu	Efficient Representation of Algebraic Expressions.	ATVA	2004	DBLP DOI BibTeX RDF
1	Orna Kupferman, Gila Morgenstern, Aniello Murano	Typeness for omega-Regular Automata.	ATVA	2004	DBLP DOI BibTeX RDF
1	Fang Wang, Sofiène Tahar, Otmane Aït Mohamed	First-Order LTL Model Checking Using MDGs.	ATVA	2004	DBLP DOI BibTeX RDF
1	Marisa Llorens, Javier Oliver 0001	Introducing Structural Dynamic Changes in Petri Nets: Marked-Controlled Reconfigurable Nets.	ATVA	2004	DBLP DOI BibTeX RDF
1	Tarek Mhamdi, Sofiène Tahar	Providing Automated Verification in HOL Using MDGs.	ATVA	2004	DBLP DOI BibTeX RDF
1	Trong-Yen Lee, Yang-Hsin Fan, Tsung-Hsun Yang, Chia-Chun Tsai, Wen-Ta Lee, Yuh-Shyan Hwang	RCGES: Retargetable Code Generation for Embedded Systems.	ATVA	2004	DBLP DOI BibTeX RDF
1	Atsushi Moritomo, Kiyoharu Hamaguchi, Toshinobu Kashiwabara	Validity Checking for Quantifier-Free First-Order Logic with Equality Using Substitution of Boolean Formulas.	ATVA	2004	DBLP DOI BibTeX RDF
1	Robi Malik, David Streader, Steve Reeves	Fair Testing Revisited: A Process-Algebraic Characterisation of Conflicts.	ATVA	2004	DBLP DOI BibTeX RDF
1	Shougo Ogata, Tatsuhiro Tsuchiya, Tohru Kikuno	SAT-Based Verification of Safe Petri Nets.	ATVA	2004	DBLP DOI BibTeX RDF	Petri nets, SAT, Bounded model checking
1	Jin Hyun Kim, Su-Young Lee 0001, Young Ah Ahn, Jae-Hwan Sim, Jin Seok Yang, Na-Young Lee, Jin-Young Choi	Development of RTOS for PLC Using Formal Methods.	ATVA	2004	DBLP DOI BibTeX RDF
1	Tun Li, Yang Guo 0003, Sikun Li	CLP Based Static Property Checking.	ATVA	2004	DBLP DOI BibTeX RDF
1	Anyi Chen, Jian-Ming Wang, Chiu-Han Hsiao	Verification of WCDMA Protocols and Implementation.	ATVA	2004	DBLP DOI BibTeX RDF
1	Robert P. Kurshan	Evolution of Model Checking into the EDA Industry.	ATVA	2004	DBLP DOI BibTeX RDF
1	Tevfik Bultan, Xiang Fu 0001, Jianwen Su	Tools for Automated Verification of Web Services.	ATVA	2004	DBLP DOI BibTeX RDF
1	Hans Bherer, Jules Desharnais, Marc Frappier, Richard St-Denis	Synthesis of State Feedback Controllers for Parameterized Discrete Event Systems.	ATVA	2004	DBLP DOI BibTeX RDF
1	Bai Su, Wenhui Zhang	Search Space Partition and Case Basis Exploration for Reducing Model Checking Complexity.	ATVA	2004	DBLP DOI BibTeX RDF
1	Fang Yu 0001, Bow-Yaw Wang	Toward Unbounded Model Checking for Region Automata.	ATVA	2004	DBLP DOI BibTeX RDF	Region automata, Real-time systems, Model checking, Verification, Induction, BMC
1	Claudio de la Riva, Javier Tuya	Modular Model Checking of Software Specifications with Simultaneous Environment Generation.	ATVA	2004	DBLP DOI BibTeX RDF

Publications at "ATVA"( http://dblp.L3S.de/Venues/ATVA )