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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 263 occurrences of 139 keywords
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Results
Found 635 publication records. Showing 635 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
12 | Hau T. Ngo, Vijayan K. Asari |
A pipelined architecture for real-time correction of barrel distortion in wide-angle camera images. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Circuits Syst. Video Technol. ![In: IEEE Trans. Circuits Syst. Video Technol. 15(3), pp. 436-444, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jeongseon Euh, Jeevan Chittamuru, Wayne P. Burleson |
Power-Aware 3D Computer Graphics Rendering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 39(1-2), pp. 15-33, 2005. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
low-power, reconfigurable, texture mapping, 3D Graphics, shading |
12 | Christophe Wolinski, Krzysztof Kuchcinski |
A Constraints Programming Approach for Fabric Cell Synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DSD ![In: Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August - 3 September 2005, Porto, Portugal, pp. 356-363, 2005, IEEE Computer Society, 0-7695-2433-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Arjun K. Pai, Khaled Benkrid, Danny Crookes |
Embedded Reconfigurable DCT Architectures Using Adder-Based Distributed Arithmetic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CAMP ![In: Seventh International Workshop on Computer Architectures for Machine Perception (CAMP 2005), 4-6 July 2005, Palermo, Italy, pp. 81-86, 2005, IEEE Computer Society, 0-7695-2255-6. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jingzhao Ou, Viktor K. Prasanna |
MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IPDPS ![In: 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), CD-ROM / Abstracts Proceedings, 4-8 April 2005, Denver, CO, USA, 2005, IEEE Computer Society, 0-7695-2312-9. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Hung Yang Ko, Yi-Chiuan Wang, An-Yeu Wu |
Digital signal processing engine design for polar transmitter in wireless communication systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (6) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 6026-6029, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jong-wan Seo, Myong-Chul Shin |
A study on an ASIC design technique for digital protective relays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (4) ![In: International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan, pp. 3910-3913, 2005, IEEE, 0-7803-8834-8. The full citation details ...](Pics/full.jpeg) |
2005 |
DBLP DOI BibTeX RDF |
|
12 | Jarmo Takala, Konsta Punkka |
Scalable FFT Processors and Pipelined Butterfly Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
SAMOS ![In: Computer Systems: Architectures, Modeling, and Simulation, Third and Fourth International Workshops, SAMOS 2003 and SAMOS 2004, Samos, Greece, July 21-23, 2003 and July 19-21, 2004, Proceedings, pp. 373-382, 2004, Springer, 3-540-22377-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Shu-Shin Chin, Sangjin Hong, Suhwan Kim |
Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISVLSI ![In: 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), Emerging Trends in VLSI Systems Design, 19-20 February 2004, Lafayette, LA, USA, pp. 158-166, 2004, IEEE Computer Society, 0-7695-2097-9. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | Deepak Boppana, Kully Dhanoa, Jesse Kempa |
FPGA based Embedded Processing Architecture for the QRD-RLS Algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 20-23 April 2004, Napa, CA, USA, Proceedings, pp. 330-331, 2004, IEEE Computer Society, 0-7695-2230-0. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
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12 | K. Wang, Jugdutt Singh, Mike Faulkner |
FPGA Implementation of an OFDM-WLAN Synchronizer. ![Search on Bibsonomy](Pics/bibsonomy.png) |
DELTA ![In: 2nd IEEE International Workshop on Electronic Design, Test and Applications (DELTA 2004), 28-30 January 2004, Perth, Australia, pp. 89-96, 2004, IEEE Computer Society, 0-7695-2081-2. The full citation details ...](Pics/full.jpeg) |
2004 |
DBLP DOI BibTeX RDF |
|
12 | Thomas Sailer, Gerhard Tröster |
An Efficient VLSI Architecture for Computing Decision Feedback Equalizer Coefficients from the Channel State Information. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 35(1), pp. 91-103, 2003. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
minimum mean square error (MMSE), decision feedback equalizer (DFE), displacement structure theory, channel state information (CSI) |
12 | Fernando E. Ortiz, John R. Humphrey, James P. Durbano, Dennis W. Prather |
A Study on the Design of Floating-Point Functions in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 1131-1134, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
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12 | José Marín-Roig, Vicente Torres-Carot, Ma José Canet, Asuncion Perez-Pascual, Trinidad Sansaloni, Francisco Cardells-Tormo, Fabian Angarita, Felip Vicedo, Vicenc Almenar-Terre, Javier Valls-Coquillat |
DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field Programmable Logic and Application, 13th International Conference, FPL 2003, Lisbon, Portugal, September 1-3, 2003, Proceedings, pp. 988-991, 2003, Springer, 3-540-40822-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera |
High-Radix Iterative Algorithm for Powering Computation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Symposium on Computer Arithmetic ![In: 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 15-18 June 2003, Santiago de Compostela, Spain, pp. 204-211, 2003, IEEE Computer Society, 0-7695-1894-X. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Tan Yiyu, Zhang Ning |
An Image Processing System Scheme in B Mode Ultrasonic Ophthalmological Scanner. ![Search on Bibsonomy](Pics/bibsonomy.png) |
CBMS ![In: 16th IEEE Symposium on Computer-Based Medical Systems (CBMS 2003), 26-27 June 2003, New York, NY, USA, pp. 74-79, 2003, IEEE Computer Society, 0-7695-1901-6. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Francisco Cardells-Tormo, Javier Valls-Coquillat |
Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 260-263, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | A. S. Madhukumar, Z. Guo Ping, T. Kian Seng, Y. Kuck Jong, Tim Mingqian Zhong, T. Y. Hong, Francois P. S. Chin |
Space-time equalizer for advanced 3GPP WCDMA mobile terminal: experimental results. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (2) ![In: Proceedings of the 2003 International Symposium on Circuits and Systems, ISCAS 2003, Bangkok, Thailand, May 25-28, 2003, pp. 228-231, 2003, IEEE, 0-7803-7761-3. The full citation details ...](Pics/full.jpeg) |
2003 |
DBLP DOI BibTeX RDF |
|
12 | Vijay P. Shah, Anthony Skjellum, Nicolas H. Younan, Torey Alford, D. Whitcomb, A. Watkins |
inAspect™: interfacing Java and VSIPL. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Java Grande ![In: Proceedings of the 2002 Joint ACM-ISCOPE Conference on Java Grande 2002, Seattle, Washington, USA, November 3-5, 2002, pp. 148-155, 2002, ACM, 1-58113-599-8. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
VSIPL, embedded Java, image processing, signal processing, high-performance, linear algebra, fixed-point arithmetic, multi-platform, JNI |
12 | Francisco Cardells-Tormo, Javier Valls-Coquillat |
High Performance Quadrature Digital Mixers for FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 905-914, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Francisco Cardells-Tormo, Javier Valls-Coquillat, Vicenc Almenar-Terre, Vicente Torres-Carot |
Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: Field-Programmable Logic and Applications, Reconfigurable Computing Is Going Mainstream, 12th International Conference, FPL 2002, Montpellier, France, September 2-4, 2002, Proceedings, pp. 102-111, 2002, Springer, 3-540-44108-5. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Francisco Cardells-Tormo, A. Valls-Coquillat |
Optimized FPGA-implementation of quadrature DDS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISCAS (5) ![In: Proceedings of the 2002 International Symposium on Circuits and Systems, ISCAS 2002, Scottsdale, Arizona, USA, May 26-29, 2002, pp. 369-372, 2002, IEEE, 0-7803-7448-7. The full citation details ...](Pics/full.jpeg) |
2002 |
DBLP DOI BibTeX RDF |
|
12 | Laurent Imbert, Jean-Michel Muller, F. Rico |
A Radix-10 BKM Algorithm for Computing Transcendentals on Pocket Computers. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 25(2), pp. 179-186, 2000. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
|
12 | Lijun Gao, Keshab K. Parhi |
Block-Update Parallel Processing QRD-RLS Algorithm for Throughput Improvement with Low Power Consumption. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 12th IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP 2000), 10-12 July 2000, Boston, MA, USA, pp. 225-234, 2000, IEEE Computer Society, 0-7695-0716-6. The full citation details ...](Pics/full.jpeg) |
2000 |
DBLP DOI BibTeX RDF |
QRD-RLS filter, block-weight-update, single-state-update parallel processing, low power, ASIC design |
12 | Peter Rieder, Sven Simon 0001, Christian V. Schimpfle |
Application Specific Efficient VLSI Architectures for Orthogonal Single- and Multiwavelet Transforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 21(2), pp. 77-90, 1999. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Kees-Jan van der Kolk, Ed F. Deprettere, Jeong-A Lee |
A Floating Point Vectoring Algorithm Based on Fast Rotations. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1140-, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Javier Hormigo, Julio Villalba, Emilio L. Zapata |
Arithmetic Unit for the Computation of Interval Elementary Functions. ![Search on Bibsonomy](Pics/bibsonomy.png) |
EUROMICRO ![In: 25th EUROMICRO '99 Conference, Informatics: Theory and Practice for the New Millenium, 8-10 September 1999, Milan, Italy, pp. 1063-1066, 1999, IEEE Computer Society, 0-7695-0321-7. The full citation details ...](Pics/full.jpeg) |
1999 |
DBLP DOI BibTeX RDF |
|
12 | Elisardo Antelo, Montserrat Bóo, Javier D. Bruguera, Emilio L. Zapata |
A novel design of a two operand normalization circuit. ![Search on Bibsonomy](Pics/bibsonomy.png) |
IEEE Trans. Very Large Scale Integr. Syst. ![In: IEEE Trans. Very Large Scale Integr. Syst. 6(1), pp. 173-176, 1998. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | C. P. Ravikumar, N. Satya Prasad |
Evaluating BIST Architectures for Low Power. ![Search on Bibsonomy](Pics/bibsonomy.png) |
Asian Test Symposium ![In: 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, pp. 430-434, 1998, IEEE Computer Society, 0-8186-8277-9. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | Paul S. Graham, Brent E. Nelson |
Frequency-Domain Sonar Processing in FPGAs and DSPs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FCCM ![In: 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 15-17 April 1998, Napa Valley, CA, USA, pp. 306-307, 1998, IEEE Computer Society, 0-8186-8900-5. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | John R. Sacha, Mary Jane Irwin |
The logarithmic number system for strength reduction in adaptive filtering. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 256-261, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
|
12 | David Garrett, Mircea R. Stan |
Low power architecture of the soft-output Viterbi algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ISLPED ![In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998, pp. 262-267, 1998, ACM, 1-58113-059-7. The full citation details ...](Pics/full.jpeg) |
1998 |
DBLP DOI BibTeX RDF |
SOVA, VA, low power, turbo codes |
12 | Peter Rieder, Josef A. Nossek |
Implementation of Orthogonal Wavelet Transforms and their Applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
ASAP ![In: 1997 International Conference on Application-Specific Systems, Architectures, and Processors (ASAP '97), 14-16 July 1997, Zurich, Switzerland, pp. 489-498, 1997, IEEE Computer Society, 0-8186-7958-1. The full citation details ...](Pics/full.jpeg) |
1997 |
DBLP DOI BibTeX RDF |
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12 | Tobias G. Noll |
Carry-save architectures for high-speed digital signal processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 3(1-2), pp. 121-140, 1991. The full citation details ...](Pics/full.jpeg) |
1991 |
DBLP DOI BibTeX RDF |
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12 | Paul F. C. Krekel, Ed F. Deprettere |
A systolic algorithm and architecture for solving sets of linear equations with multi-band coefficient matrix. ![Search on Bibsonomy](Pics/bibsonomy.png) |
J. VLSI Signal Process. ![In: J. VLSI Signal Process. 1(2), pp. 143-152, 1989. The full citation details ...](Pics/full.jpeg) |
1989 |
DBLP DOI BibTeX RDF |
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