Search results for "Codesign"

Hits ?▲	Authors	Title	Venue	Year	Link
16	Sebastian Haas, Tomas Karnagel, Oliver Arnold, Erik Laux, Benjamin Schlegel, Gerhard P. Fettweis, Wolfgang Lehner	HW/SW-database-codesign for compressed bitmap index processing.	ASAP	2016	DBLP DOI BibTeX RDF
16	Ehsan Saboori, Samar Abdi	Fast and cycle-accurate simulation of multi-threaded applications on SMP architectures using hybrid prototyping.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Alexandra M. Porter, Md Muztoba, Ümit Y. Ogras	Human-machine communication for assistive IoT technologies.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Farzad Samie, Lars Bauer, Jörg Henkel	IoT technologies for embedded computing: a survey.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Yuankun Xue, Paul Bogdan	Scalable and realistic benchmark synthesis for efficient NoC performance evaluation: a complex network analysis approach.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Nikil D. Dutt, Fadi J. Kurdahi, Rolf Ernst, Andreas Herkersdorf	Conquering MPSoC complexity with principles of a self-aware information processing factory.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Chi-Kang Chen, Hsin-I Wu, Chi-Ting Hsiao, Ren-Song Tsay	An accurate and flexible early memory system power evaluation approach using a microcomponent method.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Peter R. Lewis 0001	Types of computational self-awareness and how we might implement them.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Hung-Sheng Chang, Yuan-Hao Chang 0001, Tei-Wei Kuo, Yu-Ming Chang, Hsiang-Pang Li	A disturbance-aware sub-block design to improve reliability of 3D MLC flash memory.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Petra R. Maier, Veit Kleeberger, Daniel Mueller-Gritschneder, Ulf Schlichtmann	Fault injection at host-compiled level with static fault set reduction for SoC firmware robustness testing.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Jie Guo 0002, Chuhan Min, Tao Cai, Yiran Chen 0001	A design to reduce write amplification in object-based NAND flash devices.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Mischa Möstl, Johannes Schlatow, Rolf Ernst, Henry Hoffmann, Arif Merchant, Alexander Shraer	Self-aware systems for the internet-of-things.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Aviral Shrivastava, Patricia Derler, Ya-Shian Li-Baboud, Kevin B. Stanton, Mohammad Khayatian, Hugo A. Andrade, Marc Weiss, John C. Eidson, Sundeep Chandhoke	Time in cyber-physical systems.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Marco Platzner	On-the-fly computing: self-aware heterogeneous multi-cores.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Bita Darvish Rouhani, Azalia Mirhoseini, Farinaz Koushanfar	Going deeper than deep learning for massive data analytics under physical constraints.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Hsin-Yu Chang, Chien-Chung Ho, Yuan-Hao Chang 0001, Yu-Ming Chang, Tei-Wei Kuo	How to enable software isolation and boost system performance with sub-block erase over 3D flash memory.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Shu-han Cheng, Guangyan Zhang, Jiwu Shu, Weimin Zheng	AsyncStripe: I/O efficient asynchronous graph computing on a single server.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Jelena Spasic, Di Liu 0002, Todor P. Stefanov	Energy-efficient mapping of real-time applications on heterogeneous MPSoCs using task replication.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Nadja Peters, Sangyoung Park, Samarjit Chakraborty, Benedikt Meurer, Hannes Payer, Daniel Clifford	Web browser workload characterization for power management on HMP platforms.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Rubén Braojos, David Atienza, Mohamed M. Sabry Aly, Tony F. Wu, H.-S. Philip Wong, Subhasish Mitra, Giovanni Ansaloni	Nano-engineered architectures for ultra-low power wireless body sensor nodes.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Hokchhay Tann, Soheil Hashemi, R. Iris Bahar, Sherief Reda	Runtime configurable deep neural networks for energy-accuracy trade-off.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Venkateshwar Kottapalli, Sunil P. Khatri	A practical methodology to validate the statistical behavior of bloom filters.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Yu-Ming Chang, Yung-Chun Li, Ping-Hsien Lin, Hsiang-Pang Li, Yuan-Hao Chang 0001	Realizing erase-free SLC flash memory with rewritable programming design.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Ishan G. Thakkar, Sai Vineel Reddy Chittamuru, Sudeep Pasricha	Mitigation of homodyne crosstalk noise in silicon photonic NoC architectures with tunable decoupling.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Nima Karimian, Paul A. Wortman, Fatemeh Tehranipoor	Evolving authentication design considerations for the internet of biometric things (IoBT).	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Mimi Xie, Mengying Zhao, Chen Pan, Hehe Li, Yongpan Liu, Youtao Zhang, Chun Jason Xue, Jingtong Hu	Checkpoint aware hybrid cache architecture for NV processor in energy harvesting powered systems.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Ke Wang 0011, Kevin Angstadt, Chunkun Bo, Nathan Brunelle, Elaheh Sadredini, Tommy Tracy II, Jack Wadden, Mircea R. Stan, Kevin Skadron	An overview of micron's automata processor.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Hsinchung Chen, Mohammad Abdullah Al Faruque, Pai H. Chou	Security and privacy challenges in IoT-based machine-to-machine collaborative scenarios.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Marco Minutoli, Vito Giovanni Castellana, Antonino Tumeo, Marco Lattuada 0001, Fabrizio Ferrandi	Enabling the high level synthesis of data analytics accelerators.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Dandan Li, Senzhang Wang, Shuzhen Yao, Yuhang Liu 0001, Yuanqi Cheng, Xian-He Sun	Efficient design space exploration by knowledge transfer.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Junshi Wang, Letian Huang, Qiang Li 0021, Guangjun Li, Axel Jantsch	Optimizing the location of ECC protection in network-on-chip.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Hyunsun Park, Dongyoung Kim, Junwhan Ahn, Sungjoo Yoo	Zero and data reuse-aware fast convolution for deep neural networks on GPU.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Arquimedes Canedo	Industrial IoT lifecycle via digital twins.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Weiwen Jiang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Xianzhang Chen	Optimal functional-unit assignment and buffer placement for probabilistic pipelines.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Bryan Donyanavard, Tiago Mück, Santanu Sarma, Nikil D. Dutt	SPARTA: runtime task allocation for energy efficient heterogeneous many-cores.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Paul Bogdan, Miroslav Pajic, Partha Pratim Pande, Vijay Raghunathan	Making the internet-of-things a reality: from smart models, sensing and actuation to energy-efficient architectures.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Farzad Samie, Vasileios Tsoutsouras, Sotirios Xydis, Lars Bauer, Dimitrios Soudris, Jörg Henkel	Distributed QoS management for internet of things under resource constraints.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Katayoun Neshatpour, Avesta Sasan, Houman Homayoun	Big data analytics on heterogeneous accelerator architectures.	CODES+ISSS	2016	DBLP DOI BibTeX RDF
16	Xiping Hu 0001, Jun-qi Deng, Jidi Zhao, Wenyan Hu, Edith C. H. Ngai, Renfei Wang, Johnny Shen, Min Liang, Xitong Li, Victor C. M. Leung, Yu-Kwong Kwok	SAfeDJ: A Crowd-Cloud Codesign Approach to Situation-Aware Music Delivery for Drivers.	ACM Trans. Multim. Comput. Commun. Appl.	2015	DBLP DOI BibTeX RDF
16	Ghada Y. Abozaid, Arnaud Tisserand, Ahmed El-Mahdy 0002, Yasutaka Wada	Towards FHE in Embedded Systems: A Preliminary Codesign Space Exploration of a HW/SW Very Large Multiplier.	IEEE Embed. Syst. Lett.	2015	DBLP DOI BibTeX RDF
16	Sanad Al-Areqi, Daniel Görges, Steven Liu	Event-Based Control and Scheduling Codesign: Stochastic and Robust Approaches.	IEEE Trans. Autom. Control.	2015	DBLP DOI BibTeX RDF
16	Sanad Al-Areqi, Daniel Görges, Steven Liu	Event-based networked control and scheduling codesign with guaranteed performance.	Autom.	2015	DBLP DOI BibTeX RDF
16	Mahantesh Halappanavar, Alex Pothen, Ariful Azad, Fredrik Manne, Johannes Langguth, Arif M. Khan	Codesign Lessons Learned from Implementing Graph Matching on Multithreaded Architectures.	Computer	2015	DBLP DOI BibTeX RDF
16	Christophe Le Page, Kadiri Serge Bobo, Towa Olivier William Kamgaing, Bobo Fernanda Ngahane, Matthias Waltert	Interactive Simulations with a Stylized Scale Model to Codesign with Villagers an Agent-Based Model of Bushmeat Hunting in the Periphery of Korup National Park (Cameroon).	J. Artif. Soc. Soc. Simul.	2015	DBLP DOI BibTeX RDF
16	Hailong Yao, Qin Wang 0005, Yizhong Ru, Yici Cai, Tsung-Yi Ho	Integrated Flow-Control Codesign Methodology for Flow-Based Microfluidic Biochips.	IEEE Des. Test	2015	DBLP DOI BibTeX RDF
16	Mark Stoopman, Yao Liu 0003, Hubregt J. Visser, Kathleen Philips, Wouter A. Serdijn	Codesign of Electrically Short Antenna-Electronics Interfaces in the Receiving Mode.	IEEE Trans. Circuits Syst. II Express Briefs	2015	DBLP DOI BibTeX RDF
16	Yu Jiang 0003, Yebin Wang, Scott A. Bortoff, Zhong-Ping Jiang	Optimal Codesign of Nonlinear Control Systems Based on a Modified Policy Iteration Method.	IEEE Trans. Neural Networks Learn. Syst.	2015	DBLP DOI BibTeX RDF
16	Bernhard Thalheim, Klaus-Dieter Schewe	Codesign of Web Information Systems.	Correct Software in Web Applications and Web Services	2015	DBLP DOI BibTeX RDF
16		13. ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2015, Austin, TX, USA, September 21-23, 2015	MEMOCODE	2015	DBLP BibTeX RDF
16	Sanad Al-Areqi, Daniel Görges, Steven Liu	Event-based control and scheduling codesign subject to input and state constraints.	ECC	2015	DBLP DOI BibTeX RDF
16	Gabriela Nicolescu, Andreas Gerstlauer (eds.)	2015 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2015, Amsterdam, Netherlands, October 4-9, 2015	CODES+ISSS	2015	DBLP BibTeX RDF
16	Arpith C. Jacob, Ravi Nair, Tong Chen 0001, Zehra Sura, Changhoan Kim, Carlo Bertolli, Samuel Antão, Kevin O'Brien	Progressive Codesign of an Architecture and Compiler Using a Proxy Application.	SBAC-PAD	2015	DBLP DOI BibTeX RDF
16	Subutay Giray Baskir, Berna Örs	Hardware / software codesign and implementation for secure NFC applications.	SIU	2015	DBLP DOI BibTeX RDF
16	Graham Dove	CoDesign with data		2015	RDF
16	Adrian Alin Lifa	Hardware/Software Codesign of Embedded Systems with Reconfigurable and Heterogeneous Platforms.		2015	RDF
16	Alexandru Tanase, Michael Witterauf, Jürgen Teich, Frank Hannig	Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Wenchao Li 0001, Léonard Gérard, Natarajan Shankar	Design and verification of multi-rate distributed systems.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Bingyi Cao, Kenneth A. Ross, Martha A. Kim, Stephen A. Edwards	Implementing latency-insensitive dataflow blocks.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Matthew Naylor, Simon W. Moore	A generic synthesisable test bench.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Jean-Pierre Talpin, Pierre Jouvelot, Sandeep Kumar Shukla	Towards refinement types for time-dependent data-flow networks.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Paul Clements	Keynote Talk III: A formal methods perspective on product line engineering.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Alon Brook, Doron A. Peled, Sven Schewe	Local and global fairness in concurrent systems.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Rajeev Alur	Keynote talk I: Syntax-guided synthesis.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Martial Chabot, Kévin Mazet, Laurence Pierre	Automatic and configurable instrumentation of C programs with temporal assertion checkers.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Derek Chiou	Keynote talk II: Accelerating data centers using reconfigurable logic.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Jan Láník, Julien Legriel, Erwan Piriou, Emmanuel Viaud, Fahim Rahim, Oded Maler, Solaiman Rahim	Reducing power with activity trigger analysis.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Michael W. Whalen, Sanjai Rayadurgam, Elaheh Ghassabani, Anitha Murugesan, Oleg Sokolsky, Mats Per Erik Heimdahl, Insup Lee 0001	Hierarchical multi-formalism proofs of cyber-physical systems.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Peter A. Milder	MEMOCODE 2015 design contest: Continuous skyline computation.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Ehsan Montahaie, Milad Ghafouri, Saied Rahmani, Hanie Ghasemi, Farzad Sharif Bakhtiar, Rashid Zamanshoar, Kianoush Jafari, Mohsen Gavahi, Reza Mirzaei, Armin Ahmadzadeh, Saeid Gorgin 0001	Efficient continuous skyline computation on multi-core processors based on Manhattan distance.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Sanne Wouda, Sebastiaan J. C. Joosten, Julien Schmaltz	Process algebra semantics & reachability analysis for micro-architectural models of communication fabrics.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Abdur Rakib, Hafiz Mahfooz Ul Haque	Modeling and verifying context-aware non-monotonic reasoning agents.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Daniel Ricketts 0001, Gregory Malecha, Mario M. Alvarez, Vignesh Gowda, Sorin Lerner	Towards verification of hybrid systems in a foundational proof assistant.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Adel Dokhanchi, Bardh Hoxha, Georgios Fainekos	Metric interval temporal logic specification elicitation and debugging.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Stefan Jaksic, Ezio Bartocci, Radu Grosu, Reinhard Kloibhofer, Thang Nguyen 0007, Dejan Nickovic	From signal temporal logic to FPGA monitors.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Ahlem Triki, Jacques Combaz, Saddek Bensalem	Optimized distributed implementation of timed component-based systems.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	William Durand, Sébastien Salva	Passive testing of production systems based on model inference.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Kenichi Koizumi, Mary Inaba, Kei Hiraki	Efficient implementation of continuous skyline computation on a multi-core processor.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Paul C. Attie, Ali Cherri, Kinan Dak-Al-Bab, Mouhammad Sakr, Jad Saklawi	Model and program repair via SAT solving.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Karsten Rathlev, Steven Smyth, Christian Motika, Reinhard von Hanxleden, Michael Mendler	SCEst: Sequentially constructive esterel.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Jonathan Beaumont, Andrey Mokhov, Danil Sokolov, Alex Yakovlev	Compositional design of asynchronous circuits from behavioural concepts.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Alan Leung, Dimitar Bounov, Sorin Lerner	C-to-Verilog translation validation.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Xian Li 0002, Klaus Schneider 0001	Verification condition generation for hybrid systems.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	David J. Greaves	Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCL.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Stefan Kugele, Gheorghe Pucea, Ramona Popa, Laurent Dieudonné, Horst Eckardt	On the deployment problem of embedded systems.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	João Bastos, Sander Stuijk, Jeroen Voeten, Ramon R. H. Schiffelers, Johan Jacobs, Henk Corporaal	Modeling resource sharing using FSM-SADF.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Masahiro Fujita	Logic analysis and optimization with quick identification of invariants through one time frame analysis.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Pierre Ganty, Samir Genaim, Ratan Lal, Pavithra Prabhakar	From non-zenoness verification to termination.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Paolo Arcaini, Silvia Bonfanti, Angelo Gargantini, Atif Mashkoor, Elvinia Riccobene	Formal validation and verification of a medical software critical component.	MEMOCODE	2015	DBLP DOI BibTeX RDF
16	Selma Saidi, Rolf Ernst, Sascha Uhrig, Henrik Theiling, Benoît Dupont de Dinechin	The shift to multicores in real-time and safety-critical systems.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Namita Sharma 0001, Preeti Ranjan Panda, Francky Catthoor	Energy efficient FFT implementation through stage skipping and merging.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Vítor Schwambach, Sébastien Cleyet-Merle, Alain Issard, Stéphane Mancini	Fast parallel application and multiprocessor design space exploration from sequential code.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Kuangya Zhai, Richard Townsend, Lianne Lairmore, Martha A. Kim, Stephen A. Edwards	Hardware synthesis from a recursive functional language.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Mungyu Son, Junwhan Ahn, Sungjoo Yoo	A tiny-capacitor-backed non-volatile buffer to reduce storage writes in smartphones.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Bowen Zheng, Yue Gao, Qi Zhu 0002, Sandeep K. Gupta 0001	Analysis and optimization of soft error tolerance strategies for real-time systems.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Ashraf El Antably, Olivier Gruber, Frédéric Rousseau 0001, Nicolas Fournel	Transparent and portable agent based task migration for data-flow applications on multi-tiled architectures.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Srinath Arunachalam, Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu	An online wear state monitoring methodology for off-the-shelf embedded processors.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Mojtaba Ebrahimi, Nour Sayed, Maryam Rashvand, Mehdi Baradaran Tahoori	Fault injection acceleration by architectural importance sampling.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Sudeep Pasricha, Viney Ugave, Charles W. Anderson, Qi Han 0001	LearnLoc: A framework for smart indoor localization with embedded mobile devices.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Jelena Spasic, Di Liu 0002, Emanuele Cannella, Todor P. Stefanov	Improved hard real-time scheduling of CSDF-modeled streaming applications.	CODES+ISSS	2015	DBLP DOI BibTeX RDF
16	Sunha Ahn, Sharad Malik, Aarti Gupta	Completeness bounds and sequentialization for model checking of interacting firmware and hardware.	CODES+ISSS	2015	DBLP DOI BibTeX RDF