Search results for "DEBUG"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
16	André Sülflow, Görschwin Fey, Roderick Bloem, Rolf Drechsler	Using unsatisfiable cores to debug multiple design errors.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	sat-based debugging, unsatisfiable core, fault localization
16	Sorin Cocorada	An IEEE 802.11 g simulation model with extended debug capabilities.	SimuTools	2008	DBLP DOI BibTeX RDF	IEEE 802.11g, Wireshark, simulator, Omnet++
16	Bart Vermeulen, Sjaak Bakker	Debug architecture for the En-II system chip.	IET Comput. Digit. Tech.	2007	DBLP DOI BibTeX RDF
16	Erik Jan Marinissen, Nicola Nicolici	Editorial Silicon Debug and Diagnosis.	IET Comput. Digit. Tech.	2007	DBLP DOI BibTeX RDF
16	Marc Boule, Jean-Samuel Chenard, Zeljko Zilic	Debug enhancements in assertion-checker generation.	IET Comput. Digit. Tech.	2007	DBLP DOI BibTeX RDF
16	Albrecht Mayer, Harry Siebert, Klaus D. McDonald-Maier	Debug Support, Calibration and Emulation for Multiple Processor and Powertrain Control SoCs	CoRR	2007	DBLP BibTeX RDF
16	Felix Beaudoin, Kevin Sanchez, Philippe Perdu	Dynamic laser stimulation techniques for advanced failure analysis and design debug applications.	Microelectron. Reliab.	2007	DBLP DOI BibTeX RDF
16	Frank Rogin, Erhard Fehlauer, Christian Haufe, Sebastian Ohnewald	Debug Patterns for Efficient High-level SystemC Debugging.	DDECS	2007	DBLP DOI BibTeX RDF
16	Max R. de O. Schultz, Alexandre Keunecke Ignácio Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. dos Santos	A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems.	SAMOS	2007	DBLP DOI BibTeX RDF
16	Anis Uzzaman, Fidel Muradali, Takashi Aikyo, Robert C. Aitken, Tom Jackson, Rajesh Galivanche, Takeshi Onodera	Test Roles in Diagnosis and Silicon Debug.	ATS	2007	DBLP DOI BibTeX RDF
16	Prawat Nagvajara, Baris Taskin	Design-for-Debug: A Vital Aspect in Education.	MSE	2007	DBLP DOI BibTeX RDF
16	Hratch Mangassarian, Andreas G. Veneris, Sean Safarpour, Marco Benedetti, Duncan Exon Smith	A performance-driven QBF-based iterative logic array representation with applications to verification, debug and test.	ICCAD	2007	DBLP DOI BibTeX RDF
16	Srikanth Venkataraman	DFM, DFY, Debug and Diagnosis: The Loop to Ensure Yield.	ISQED	2007	DBLP DOI BibTeX RDF
16	Tapan J. Chakraborty, Chen-Huan Chiang, Bradford G. Van Treuren	A practical approach to comprehensive system test & debug using boundary scan based test architecture.	ITC	2007	DBLP DOI BibTeX RDF
16	Ehab Anis, Nicola Nicolici	On using lossless compression of debug data in embedded logic analysis.	ITC	2007	DBLP DOI BibTeX RDF
16	Udaya Shankar Natarajan, Hemalatha Shanmugasundaram, Prachi Deshpande, Chin Soon Wah	Rapid UHF RFID silicon debug and production testing.	ITC	2007	DBLP DOI BibTeX RDF
16	Emre Kiciman, Helen J. Wang	Live Monitoring: Using Adaptive Instrumentation and Analysis to Debug and Maintain Web Applications.	HotOS	2007	DBLP BibTeX RDF
16	Christian Burmer, Siegfried Görlich	Failure analyses for debug and ramp-up of modern IC's.	Microelectron. Reliab.	2006	DBLP DOI BibTeX RDF
16	Chao Liu 0001, Zeng Lian, Jiawei Han 0001	How Bayesians Debug.	ICDM	2006	DBLP DOI BibTeX RDF
16	Peter Kemper, Carsten Tepper	A Petri Net Approach to Verify and Debug Simulation Models.	Simulation and Verification of Dynamic Systems	2006	DBLP BibTeX RDF
16	In-Ho Moon, Per Bjesse, Carl Pixley	Practical Issues in Sequential Equivalence Checking through Alignability: Handling Don't Cares and Generating Debug Traces.	HLDVT	2006	DBLP DOI BibTeX RDF
16	Fidel Muradali	Practical Needs and Wants for Silicon Debug and Diagnosis.	ATS	2006	DBLP DOI BibTeX RDF
16	Haixia Wang 0001, Dongsheng Wang 0002, Peng Li 0031	Acceleration Techniques for Chip-Multiprocessor Simulator Debug.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF
16	N. Dakwala	Silicon Debug and DFT for SOC IP.	SoCC	2006	DBLP DOI BibTeX RDF
16	Hangkyu Lee, Suriyaprakash Natarajan, Srinivas Patil, Irith Pomeranz	Selecting High-Quality Delay Tests for Manufacturing Test and Debug.	DFT	2006	DBLP DOI BibTeX RDF
16	Mack W. Riley, Nathan Chelstrom, Mike Genden, Shoji Sawamura	Debug of the CELL Processor: Moving the Lab into Silicon.	ITC	2006	DBLP DOI BibTeX RDF
16	Talal Arnaout, Gunter Bartsch, Hans-Joachim Wunderlich	Some Common Aspects of Design Validation, Debug and Diagnosis.	DELTA	2006	DBLP DOI BibTeX RDF
16	David Abercrombie, Bernd Koenemann, Nagesh Tamarapalli, Srikanth Venkataraman	DFM, DFT, Silicon Debug and Diagnosis - The Loop to Ensure Product Yield.	VLSI Design	2006	DBLP DOI BibTeX RDF
16	Emre Kiciman, David A. Maltz, Moisés Goldszmidt, John C. Platt	Mining web logs to debug distant connectivity problems.	MineNet	2006	DBLP DOI BibTeX RDF
16	Peter Bellows	High-Visibility Debug-By-Design for FPGA Platforms.	J. Supercomput.	2005	DBLP DOI BibTeX RDF	platform development, FPGA, debugging, device driver, co-simulation
16	Mustapha Remmach, A. Pigozzi, Romain Desplats, Philippe Perdu, Dean Lewis, J. Noel, Sylvain Dudit	Light Emission to Time Resolved Emission For IC Debug and Failure Analysis.	Microelectron. Reliab.	2005	DBLP DOI BibTeX RDF
16	Andrei Pavlov, Manoj Sachdev, José Pineda de Gyvez, Mohamed Azimane	Programmable techniques for cell stability test and debug in embedded SRAMs.	CICC	2005	DBLP DOI BibTeX RDF
16	Bradley R. Quinton, Steven J. E. Wilton	Post-Silicon Debug Using Programmable Logic Cores.	FPT	2005	DBLP BibTeX RDF
16	Olivier Caty, Peter Dahlgren, Ismet Bayraktaroglu	Microprocessor silicon debug based on failure propagation tracing.	ITC	2005	DBLP DOI BibTeX RDF
16	Kees van Kaam, Bart Vermeulen, Henk Jan Bergveld	Test and debug features of the RTO7 chip.	ITC	2005	DBLP DOI BibTeX RDF
16	Tohru Matsuodani, Kazuhiko Tsuda	Evaluation of debug-testing efficiency by duplication of the detected fault and delay time of repair.	Inf. Sci.	2004	DBLP DOI BibTeX RDF
16	Susanne M. Balle, Bevin R. Brett, Chih-Ping Chen, David LaFrance-Linden	Extending a traditional debugger to debug massively parallel applications.	J. Parallel Distributed Comput.	2004	DBLP DOI BibTeX RDF
16	Peter Bellows	Distinguished Paper: High-Visibility Debug-by-Design for FPGA Platforms.	ERSA	2004	DBLP BibTeX RDF
16	Ramyanshu Datta, Antony Sebastine, Jacob A. Abraham	Delay fault testing and silicon debug using scan chains.	ETS	2004	DBLP DOI BibTeX RDF
16	Doug Josephson, Bob Gottlieb	The crazy mixed up world of silicon debug [IC validation].	CICC	2004	DBLP DOI BibTeX RDF
16	Kevin Peterson, Yvon Savaria	Assertion-based on-line verification and debug environment for complex hardware systems.	ISCAS (2)	2004	DBLP BibTeX RDF
16	Debashis Nayak, Srikanth Venkataraman, Paul J. Thadikaran	Razor: A Tool for Post-Silicon Scan ATPG Pattern Debug and Its Application.	VTS	2004	DBLP DOI BibTeX RDF
16	R. Pelliconi, Fabio Campi, L. Salsa, Claudio Mucci, S. Macchiavelli	An in-circuit debug environment for multiprocessor SOCs based on a HDL RISC soft-core.	SoC	2004	DBLP DOI BibTeX RDF
16	Bil Lewis, Mireille Ducassé	Using events to debug Java programs backwards in time.	OOPSLA Companion	2003	DBLP DOI BibTeX RDF
16	Abhik Roychoudhury, Tulika Mitra, S. R. Karri	Using Formal Techniques to Debug the AMBA System-on-Chip Bus Protocol.	DATE	2003	DBLP DOI BibTeX RDF
16	Erik Moerman, Sébastien Bocq, Johan Verfaillie	Debug architecture for system on chip taking full advantage of the test access port.	ETW	2003	DBLP DOI BibTeX RDF
16	Linda J. Moore, Angelica R. Moya	Non-Intrusive Debug Technique for Embedded Programming.	ISSRE	2003	DBLP DOI BibTeX RDF
16	Wolfgang Mayer, Markus Stumptner	Extending Diagnosis to Debug Programs with Exceptions.	ASE	2003	DBLP DOI BibTeX RDF
16	Robert F. Molyneaux	Debug and Diagnosis in the Age of System-on-a-Chip.	ITC	2003	DBLP DOI BibTeX RDF
16	Milos Prvulovic, Josep Torrellas	ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes.	ISCA	2003	DBLP DOI BibTeX RDF
16	Akane Yakushiji, Yuka Tateisi, Yusuke Miyao, Naoki Yoshinaga 0001, Jun'ichi Tsujii	A Debug Tool for Practical Grammar Development.	ACL (Companion)	2003	DBLP BibTeX RDF
16	Richard Raimi, James Lear	Silicon Debug of a PowerPC[tm] Microprocessor Using Model Checking.	Formal Methods Syst. Des.	2002	DBLP DOI BibTeX RDF
16	Bart Vermeulen, Sandeep Kumar Goel	Design for Debug: Catching Design Errors in Digital Chips.	IEEE Des. Test Comput.	2002	DBLP DOI BibTeX RDF
16	Irith Pomeranz, Janusz Rajski, Sudhakar M. Reddy	Finding a Common Fault Response for Diagnosis during Silicon Debug.	DATE	2002	DBLP DOI BibTeX RDF
16	Sandeep Kumar Goel, Bart Vermeulen	Data invalidation analysis for scan-based debug on multiple-clock system chips.	ETW	2002	DBLP DOI BibTeX RDF
16	Masao Kubo, Masahiro Fujita	Debug methodology for arithmetic circuits on FPGAs.	FPT	2002	DBLP DOI BibTeX RDF
16	Eric Roesler, Brent E. Nelson	Debug methods for hybrid CPU/FPGA systems.	FPT	2002	DBLP DOI BibTeX RDF
16	Sanjeev Kumar, Kai Li 0001	Using Model Checking to Debug Device Firmware.	OSDI	2002	DBLP BibTeX RDF
16	Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark	Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer?	VTS	2002	DBLP DOI BibTeX RDF
16	Gyöngyi Szilágyi, László Harmath, Tibor Gyimóthy	The Debug Slicing of Logic Programs.	Acta Cybern.	2001	DBLP BibTeX RDF
16	Ted R. Lundquist, E. Delenia, J. Harroun, E. LeRoy, Chun-Cheng Tsao	Ultra-Thinning of C4 Integrated Circuits for Backside Analysis during First Silicon Debug.	Microelectron. Reliab.	2001	DBLP DOI BibTeX RDF
16	Marco Rona, Gunter Krampl	A VHDL-based virtual test concept for pre-silicon test-program debug.	ETW	2001	DBLP DOI BibTeX RDF
16	Cindy Schiess	Emulation: debug it in the lab - not on the floor.	WSC	2001	DBLP DOI BibTeX RDF
16	Thomas Fahringer, Krzysztof Sowa-Pieklo, J. Luitz, Hans Moritsch	On Using SPiDER to Examine and Debug Real-World Data-Parallel Applications.	PaCT	2001	DBLP DOI BibTeX RDF
16	Bart Vermeulen, Steven Oostdijk, Frank Bouwman	Test and debug strategy of the PNX8525 NexperiaTM digital video platform system chip.	ITC	2001	DBLP DOI BibTeX RDF
16	Don Douglas Josephson, Steve Poehhnan, Vincent Govan	Debug methodology for the McKinley processor.	ITC	2001	DBLP DOI BibTeX RDF
16	Dilip K. Bhavsar, Rishan Tan	Observability Register Architecture For Efficient Production Test And Debug Of Vlsi Circuits.	VLSI Design	2001	DBLP DOI BibTeX RDF
16	Pascal Bouvier	Visual Tools to Debug Prolog IV Programs.	Analysis and Visualization Tools for Constraint Programming	2000	DBLP DOI BibTeX RDF
16	Bart Vermeulen, Gert-Jan van Rootselaar	Silicon debug of a co-processor array for video applications.	HLDVT	2000	DBLP DOI BibTeX RDF
16	A. Bommireddy, Jitendra Khare, Saghir A. Shaikh, S.-T. Su	Test and Debug of Networking SoCs: A Case Study.	VTS	2000	DBLP DOI BibTeX RDF
16	Farideh Golshan	Test and on-line debug capabilities of IEEE Std 1149.1 in UltraSPARC-III microprocessor.	ITC	2000	DBLP DOI BibTeX RDF
16	Pablo Galdámez, Declan Murphy, José M. Bernabéu-Aubán, Francesc D. Muñoz-Escoí	Event-Based Techniques to Debug an Object Request Broker.	J. Supercomput.	1999	DBLP DOI BibTeX RDF	software instrumentation, events, Fault Injection, Behavior modeling, Distributed Debugging, Object Request Broker
16	Greg C. Lee, Jackie C. Wu	Debug It: A debugging practicing system.	Comput. Educ.	1999	DBLP DOI BibTeX RDF
16	Harald P. E. Vranken	Debug facilities in the TriMedia CPU64 architecture.	ETW	1999	DBLP DOI BibTeX RDF
16	Ana Paula Cláudio, João Duarte Cunha, Maria Beatriz Carmo	MPVisualizer: A General Tool to Debug Message Passing Parallel Applications.	HPCN	1999	DBLP DOI BibTeX RDF
16	Timothy J. Wood	The test and debug features of the AMD-K7 microprocessor.	ITC	1999	DBLP DOI BibTeX RDF
16	Richard H. Livengood, Donna Medeiros	Design for (physical) debug for silicon microsurgery and probing of flip-chip packaged integrated circuits.	ITC	1999	DBLP DOI BibTeX RDF
16	Gert-Jan van Rootselaar, Bart Vermeulen	Silicon debug: scan chains alone are not enough.	ITC	1999	DBLP DOI BibTeX RDF
16	Adrian Carbine, Derek Feltham	Pentium Pro Processor Design for Test and Debug.	IEEE Des. Test Comput.	1998	DBLP DOI BibTeX RDF
16		Silicon Debug of Systems-on-Chips.	DATE	1998	DBLP DOI BibTeX RDF
16	Susan Craw, Robin Boswell, Ray Rowe	Knowledge Refinement to Debug and Maintain a Tablet Formulation System.	ICTAI	1997	DBLP DOI BibTeX RDF	Design Knowledge Based Systems, Knowledge Acquisition, Knowledge Refinement
16	Adrian Carbine, Derek Feltham	Pentium® Pro Processor Design for Test and Debug.	ITC	1997	DBLP DOI BibTeX RDF
16	Taghi M. Khoshgoftaar, Edward B. Allen, Nishith Goel, Amit Nandi, John McMullan	Detection of software modules with high debug code churn in a very large legacy system.	ISSRE	1996	DBLP DOI BibTeX RDF
16	Linda J. Moore, Frank A. Scarpino	A Software Debug Aid for High Performance Processors: A Multi-Tasking Feasibility Study.	PDPTA	1996	DBLP BibTeX RDF
16	P. Placide, Gerard Florin, Laurence Duchien, Lionel Seinturier	A Consistent Global State Algorithm to Debug Distributed Object-Oriented Applications.	AADEBUG	1995	DBLP BibTeX RDF
16	Hong Hao, Rick Avra	Structured Design-for-Debug - The SuperSPARCTM II Methodology and Implementation.	ITC	1995	DBLP DOI BibTeX RDF
16	Kalon Holdbrook, Sunil Joshi, Samir Mitra, Joe Petolino, Renu Raman, Michelle Wong	microSPARCTM: A Case Study of Scan-Based Debug.	ITC	1994	DBLP DOI BibTeX RDF
16	Jerry Katz	A Case Study in the Use of Scan in microSparcTM Testing and Debug.	ITC	1994	DBLP DOI BibTeX RDF
16	Maximilian Frey, Andreas Weininger	Using temporal logic specifications to debug parallel programs.	Microprocess. Microprogramming	1993	DBLP DOI BibTeX RDF
16	Stephen M. Dunn, D. G. Balazich, Lawrence K. Lange, Charlotte C. Montillo	Pattern generator card, emulation, and debug.	VTS	1993	DBLP DOI BibTeX RDF
16	Edwige E. Pissaloux, David H. Schaefer, Samir Bouaziz, Francis Devos	MPPNL - A Petri Net based Language to design fine-grained parallel machines and debug their software.	Microprocess. Microprogramming	1992	DBLP DOI BibTeX RDF
16	Frank A. Stomp	Preserving Specific Properties in Programm Development: How to Debug Programs (Conference Version).	CONCUR	1992	DBLP DOI BibTeX RDF
16	Yoshihiro Tohma, Hisashi Yamano, Morio Ohba, Raymond Jacoby	Parameter estimation of the hyper-geometric distribution model for real test/debug data.	ISSRE	1991	DBLP DOI BibTeX RDF
16	Paul Brna, Alan Bundy, Helen Pain	A framework for the Principled Debugging of Prolog Programs: How to Debug Non-Terminating Programs.	ALPUK	1990	DBLP BibTeX RDF
16	Stephen J. Garland, John V. Guttag	Using LP to Debug Specifications.	Programming Concepts and Methods	1990	DBLP BibTeX RDF
16	Richard I. Hartley, Kenneth Welles II, Michael J. Hartman	A synthesis, test and debug environment for rapid prototyping of DSP designs.	RSP	1990	DBLP DOI BibTeX RDF
16	Yoshihiro Tohma	Models to estimate the number of faults still resident in the software after test/debug process.	COMPSAC	1989	DBLP DOI BibTeX RDF
16	Jiemin Gong, Minzhu Lu, Ning Li	A tool to generate DEBUG program of arbitrary type of microprocessors.	COMPSAC	1989	DBLP DOI BibTeX RDF
16	Bulent I. Dervisoglu, M. A. Keil	ATLAS/ELA: Scan-based Software Tools for Reducing System Debug Time in a State-of-the-art Workstation.	DAC	1989	DBLP DOI BibTeX RDF
16	Bulent I. Dervisoglu	Using Scan Technology for Debug and Diagnostics in a Workstation Environment.	ITC	1988	DBLP DOI BibTeX RDF