Search results for "coprocessor"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
16	Zhiyuan Li 0008, Scott Hauck	Configuration prefetching techniques for partial reconfigurable coprocessor with relocation and defragmentation.	FPGA	2002	DBLP DOI BibTeX RDF
16	Antonio Valverde Garcia, Jean-Pierre Seifert	On the Implementation of the Advanced Encryption Standard on a Public-key Crypto-Coprocessor.	CARDIS	2002	DBLP BibTeX RDF
16	Xiaolan Zhang 0001, Leendert van Doorn, Trent Jaeger, Ronald Perez, Reiner Sailer	Secure coprocessor-based intrusion detection.	ACM SIGOPS European Workshop	2002	DBLP DOI BibTeX RDF
16	Patrick Stadelmann, Jean-Luc Nagel, Michael Ansorge, Fausto Pellandini	A multiscale morphological coprocessor for low-power face authentication.	EUSIPCO	2002	DBLP BibTeX RDF
16	Kyoung-Mook Lim, Seh-Woong Jeong, Yong-Chun Kim, H. S. Yang	CalmRISCTM: a low power microcontroller with efficient coprocessor interface.	Microprocess. Microsystems	2001	DBLP DOI BibTeX RDF
16	Thomas Lehmann, Andreas Schreckenberg	Case Study of Integration of Reconfigurable Logic as a Coprocessor into a SCI-Cluster under RT-Linux.	FPL	2001	DBLP DOI BibTeX RDF
16	Mark Lindemann, Sean W. Smith	Improving DES Coprocessor Throughput for Short Operations.	USENIX Security Symposium	2001	DBLP BibTeX RDF
16	Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni	Reconfigurable coprocessor based JPEG 2000 implementation.	ICECS	2001	DBLP DOI BibTeX RDF
16	José Alberto Fonseca, Ernesto Martins, Paulo A. C. S. Neves	Using a hardware coprocessor for message scheduling in fieldbus-based distributed systems.	ICECS	2001	DBLP DOI BibTeX RDF
16	Milan Markovic, Z. Savic, Zeljko Obrenovic, A. Nikolic	A PC Cryptographic Coprocessor based on TI Signal Processor and Smart Card System.	Communications and Multimedia Security	2001	DBLP BibTeX RDF
16	Abbes Amira	A custom coprocessor for matrix algorithms.		2001	RDF
16	Janusz Sosnowski, Tomasz Bech	Testing Arithmetic Coprocessor in System Environment.	DATE	2000	DBLP DOI BibTeX RDF
16	Yuan C. Chou, Pazhani Pillai, Herman Schmit, John Paul Shen	PipeRench implementation of the instruction path coprocessor.	MICRO	2000	DBLP DOI BibTeX RDF
16	Christoph Heer, Carolina Miro, Anne Lafage, Mladen Berekovic, Giovanni Ghigo, Thorsten Selinger, Kai-Immo Wels	Coprocessor architecture for MPEG-4 video object rendering.	VCIP	2000	DBLP BibTeX RDF
16	Peter Gutmann	An Open-Source Cryptographic Coprocessor.	USENIX Security Symposium	2000	DBLP BibTeX RDF
16	Naomaru Itoi	Secure Coprocessor Integration with Kerberos V5.	USENIX Security Symposium	2000	DBLP BibTeX RDF
16	Holger Singpiel, Harald Simmler, Andreas Kugel, Reinhard Männer, Antônio C. C. Vieira, Federico Gálvez-Durand, João M. S. Alcântara, Vladimir Castro Alves	Implementation of Cryptographic Applications on the Reconfigurable FPGA Coprocessor microEnable.	SBCCI	2000	DBLP BibTeX RDF
16	Cristian Ciressan, Eduardo Sanchez, Martin Rajman, Jean-Cédric Chappelier	An FPGA-Based Coprocessor for the Parsing of Context-Free Grammars.	FCCM	2000	DBLP DOI BibTeX RDF
16	Reinhard Männer, M. Sessler, Harald Simmler	Pattern Recognition and Reconstruction on an FPGA Coprocessor Board.	FCCM	2000	DBLP DOI BibTeX RDF
16	Andreas Hutter, Georg Giebel, Walter Stechele	A coprocessor architecture implementing the MPEG-4 visual core profile for mobile multimedia applications.	ISCAS	2000	DBLP DOI BibTeX RDF
16	Sean W. Smith, Steve H. Weingart	Building a high-performance, programmable secure coprocessor.	Comput. Networks	1999	DBLP DOI BibTeX RDF
16	Phil C. Yeh, Ronald M. Smith Sr.	S/390 CMOS Cryptographic Coprocessor Architecture: Overview and design considerations.	IBM J. Res. Dev.	1999	DBLP DOI BibTeX RDF
16	Randall J. Easter, Edward W. Chencinski, Edward D'Avignon, Seth R. Greenspan, William A. Merz, Clark D. Norberg	S/390 Parallel Enterprise Server CMOS Cryptographic Coprocessor.	IBM J. Res. Dev.	1999	DBLP DOI BibTeX RDF
16	Kimmo Kuusilinna, Timo Hämäläinen 0001, Jukka Saarinen	Field programmable gate array-based PCI interface for a coprocessor system.	Microprocess. Microsystems	1999	DBLP DOI BibTeX RDF
16	Till Harbaum, Detlef Meier, Matthias Prinke, Martina Zitterbart	Design of a Flexible Coprocessor Unit.	EUROMICRO	1999	DBLP DOI BibTeX RDF
16	Seth Copen Goldstein, Herman Schmit, Matthew Moe, Mihai Budiu, Srihari Cadambi, R. Reed Taylor, Ronald Laufer	PipeRench: A Coprocessor for Streaming multimedia Acceleration.	ISCA	1999	DBLP DOI BibTeX RDF
16	Stewart G. Smith, J. E. D. Hurwitz, Mairi J. Torrie, Donald J. Baxter, Andrew A. Murray, Paul Likoudis, Andrew J. Holmes, Mark J. Panaghiston, Robert K. Henderson, Stuart Anderson, Peter B. Denyer, David Renshaw	A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device.	IEEE J. Solid State Circuits	1998	DBLP DOI BibTeX RDF
16	Takashi Miyamori, Kunle Olukotun	REMARC: Reconfigurable Multimedia Array Coprocessor (Abstract).	FPGA	1998	DBLP DOI BibTeX RDF
16	Young-Chul Kim, Deung-Ku Kang, Tae-Won Lee	RISC-based coprocessor with a dedicated VLSI neural network.	ICECS	1998	DBLP DOI BibTeX RDF
16	Mladen Berekovic, Peter Pirsch	Architecture of a coprocessor module for image compositing.	ICECS	1998	DBLP DOI BibTeX RDF
16	José Carlos Alves, José Silva Matos	RVC - A Reconfigurable Coprocessor for Vector Processing Applications.	FCCM	1998	DBLP DOI BibTeX RDF
16	Alexandre R. S. Romariz, P. U. A. Ferreira, J. V. Campêlo Jr., Marcio L. Graciano Jr., O. R. Maia Jr., José C. da Costa	Realization of a Mixed-Mode Neural Coprocessor for Signal Processing.	SBRN	1998	DBLP DOI BibTeX RDF
16	Bruce Schneier, John Kelsey	Remote auditing of software outputs using a trusted coprocessor.	Future Gener. Comput. Syst.	1997	DBLP DOI BibTeX RDF
16	Ander Royo, Javier Moran, Juan Carlos López 0001	Design and implementation of a coprocessor for cryptography applications.	ED&TC	1997	DBLP DOI BibTeX RDF
16	Elmar Maas, Dirk Herrmann, Rolf Ernst, Peter Rüffer, Sieghard Hasenzahl, Martin Seitz	A processor-coprocessor architecture for high end video applications.	ICASSP	1997	DBLP DOI BibTeX RDF
16	Ferran Lisa, Faustino Cuadrado, Dolores Rexachs, Jordi Carrabina	A reconfigurable coprocessor for a PCI-based real time computer vision system.	FPL	1997	DBLP DOI BibTeX RDF
16	John T. McHenry, Patrick W. Dowd, Frank A. Pellegrino, Todd M. Carrozzi, W. B. Cocks	An FPGA-based coprocessor for ATM firewalls.	FCCM	1997	DBLP DOI BibTeX RDF
16	John R. Hauser, John Wawrzynek	Garp: a MIPS processor with a reconfigurable coprocessor.	FCCM	1997	DBLP DOI BibTeX RDF
16	Stefan H.-M. Ludwig	Hades: fast hardware synthesis tools and a reconfigurable coprocessor.		1997	RDF
16	Christoph Baumhof, Gerd Bohlender	A VLSI vector arithmetic coprocessor for the PCs.	RITA	1996	DBLP BibTeX RDF
16	Bruce Schneier, John Kelsey	Authenticating Outputs of Computer Software Using a Cryptographic Coprocessor.	CARDIS	1996	DBLP BibTeX RDF
16	Ronald Ferreira, Ralf Malzahn, Peter Marissen, Jean-Jacques Quisquater, Thomas Wille	FAME: A 3rd Generation Coprocessor for Optimising Public Key Cryptosystems in Smart Card Applications.	CARDIS	1996	DBLP BibTeX RDF
16	Stefan H.-M. Ludwig	The Design of a Coprocessor Board Using Xilinx's XC6200 FPGA - An Experience Report.	FPL	1996	DBLP DOI BibTeX RDF
16	Günter Knittel	A PCI-compatible FPGA-coprocessor for 2D/3D image processing.	FCCM	1996	DBLP DOI BibTeX RDF
16	Yu-jhih Wu, Paul M. Chau, Robert Hecht-Nielsen	A supervised learning neural network coprocessor for soft-decision maximum-likelihood decoding.	IEEE Trans. Neural Networks	1995	DBLP DOI BibTeX RDF
16	Joachim König, Lothar Thiele	Algorithm-architecture co-design by example: a coprocessor for on-line arithmetic.	Microprocess. Microprogramming	1995	DBLP DOI BibTeX RDF
16	W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottinger, L. R. Mullin, R. Ziegler	An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays.	ISCAS	1995	DBLP DOI BibTeX RDF
16	Makoto Awaga, Hiromasa Takahashi	The μVP 64-bit vector coprocessor: a new implementation of high-performance numerical computation.	IEEE Micro	1993	DBLP DOI BibTeX RDF
16	Raja Venkateswaran, Pinaki Mazumder	Coprocessor design for multilayer surface-mounted PCB routing.	IEEE Trans. Very Large Scale Integr. Syst.	1993	DBLP DOI BibTeX RDF
16	Eirik Stephansen	MS160 ultra fast non-numeric coprocessor.	Microprocess. Microsystems	1993	DBLP DOI BibTeX RDF
16	Marnik Brunfaut, Herbert Peremans, Koenraad Audenaert, Ronny Blomme, Jan Van Campenhout	A correlation coprocessor for accurate real-time ultrasonic ranging of multiple objects using the transputer.	Microprocess. Microsystems	1993	DBLP DOI BibTeX RDF
16	Kumar N. Ganapathy, Benjamin W. Wah	Designing a Coprocessor for Recurrent Computations.	SPDP	1993	DBLP DOI BibTeX RDF
16	Bernhard Quatember	Parallelism in a Coprocessor Architecture for Diagnostic Problem-Solving.	PARCO	1993	DBLP BibTeX RDF
16	Anders Kugler, Roger D. Hersch	Designing a half toning coprocessor.	Workshop on Graphics Hardware	1993	DBLP DOI BibTeX RDF
16	J. Morris Chang, Edward F. Gehringer	Evaluation of an Object-Caching Coprocessor Design for Object-Oriented Systems.	ICCD	1993	DBLP DOI BibTeX RDF
16	Ulrich Holtmann, Rolf Ernst	Speculative Computation for Coprocessor Synthesis.	ICCD	1993	DBLP DOI BibTeX RDF
16	Jing Pan, Karl N. Levitt, Myla Archer, Saraswati Kalvala	Towards a Formal Verification of a Floating Point Coprocessor and its Composition with a Central Processing Unit.	TPHOLs	1992	DBLP BibTeX RDF
16	Jukka Saarinen, Martti Lindroos, Jouni Tomberg, Kimmo Kaski	Parallel Coprocessor for Kohonen's Self-Organizing Neural Network.	IPPS	1992	DBLP DOI BibTeX RDF
16	André Seznec, Karl Courtel	OPAC: A floating-point coprocessor dedicated to compute-bound kernels.	ISCA	1992	DBLP DOI BibTeX RDF
16	Alain Guyot	OCAPI: architecture of a VLSI coprocessor for the GCD and the extended GCD of large numbers.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
16	Thomas E. Hull, Marty S. Cohen, C. B. Hall	Specifications for a variable-precision arithmetic coprocessor.	IEEE Symposium on Computer Arithmetic	1991	DBLP DOI BibTeX RDF
16	Vicente Fuentes-Sánchez, Peter Y. K. Cheung	A Tag Coprocessor Architecture for Symbolic Languages.	ICCD	1991	DBLP DOI BibTeX RDF
16	Paul T. Hulina, Lee D. Coraor, Shih-Wei Sun	Performance Analysis of an Address Generation Coprocessor.	ICPP (1)	1991	DBLP BibTeX RDF
16	Lawrence Rauchwerger, P. Michael Farmwald	A multiple floating point coprocessor architecture.	SIGARCH Comput. Archit. News	1990	DBLP DOI BibTeX RDF
16	Merrick Darley, Bill Kronlage, Dvaid Bural, Bob Churchill, David Pulling, Paul Wang, Rick Iwamoto, Larry Yang	The TMS390C602A floating-point coprocessor for Sparc systems.	IEEE Micro	1990	DBLP DOI BibTeX RDF
16	D. M. Goodeve, R. W. Taylor	Communications coprocessor for the Acorn RISC machine.	Microprocess. Microsystems	1990	DBLP DOI BibTeX RDF
16	Paul T. Hulina, Lee D. Coraor	Coprocessor architectures for efficient address computation and memory accessing.	Comput. Syst. Sci. Eng.	1990	DBLP BibTeX RDF
16	Lawrence Rauchwerger, P. Michael Farmwald	A multiple floating point coprocessor architecture.	MICRO	1990	DBLP BibTeX RDF
16	T. H. Jensen, Christian Müller-Schloer	Ein Coprocessor Communication System als Basis für modulare Workstations.	ARCS	1990	DBLP BibTeX RDF
16	Joachim Roos	The performance of a prototype coprocessor for Ada tasking.	TRI-Ada	1990	DBLP DOI BibTeX RDF
16	Yaohan Chu	Application-specific coprocessor computer architecture.	ASAP	1990	DBLP DOI BibTeX RDF
16	Yaohon Chu, Kozo Itano	Coprocessor Parallel Architecture for Compilation.	ICPP (1)	1990	DBLP BibTeX RDF
16	Thomas M. Schwair, Hartmut C. Ritter	Complete self-test architecture for a coprocessor [cryptography].	ITC	1990	DBLP DOI BibTeX RDF
16	Pierluigi Civera, Gianluca Piccinini, Maurizio Zamboni	Implementation studies for a VLSI Prolog coprocessor.	IEEE Micro	1989	DBLP DOI BibTeX RDF
16	Huw Jones	Designing a 6809 coprocessor for the BBC microcomputer.	Microprocess. Microsystems	1989	DBLP DOI BibTeX RDF
16	Jörg Lohse, Reinhard Rauscher, Bernd Schütz	A coprocessor for implementing the LISP-dialect scheme.	Microprocessing and Microprogramming	1989	DBLP DOI BibTeX RDF
16	Fadi N. Sibai, Karan L. Watson, Mi Lu	A parallel unification coprocessor.	TAI	1989	DBLP DOI BibTeX RDF
16	George G. Robertson, Stuart K. Card, Jock D. Mackinlay	The cognitive coprocessor architecture for interactive user interfaces.	UIST	1989	DBLP DOI BibTeX RDF
16	Jörg Kaiser	MUTABOR, a coprocessor supporting memory management in an object-oriented architecture.	IEEE Micro	1988	DBLP DOI BibTeX RDF
16	Chris Rowen, Mark Johnson, Paul Ries	The MIPS R3010 floating-point coprocessor.	IEEE Micro	1988	DBLP DOI BibTeX RDF
16	Eddy H. Debaere	A language coprocessor as a HLL directed architecture.	Microprocess. Microprogramming	1988	DBLP DOI BibTeX RDF
16	Vojin G. Oklobdzija	Issues in CPU-coprocessor communication and synchronization.	Microprocess. Microprogramming	1988	DBLP DOI BibTeX RDF
16	Rubén González-Rubio, Michel Couprie	DDC: Delta driven computer, and μSyC: microprogrammable symbolic coprocessor.	Microprocess. Microprogramming	1988	DBLP DOI BibTeX RDF
16	Venkatesh Krishnaswamy, Sudhir Ahuja, Nicholas Carriero, David Gelernter	The Architecture of a Linda Coprocessor.	ISCA	1988	DBLP DOI BibTeX RDF
16	Robert E. Jenkins, D. Gilbert Lee	An Application-Specific Coprocessor for High-Speed Cellular Logic Operations.	IEEE Micro	1987	DBLP DOI BibTeX RDF
16	Jan M. Van Campenhout, Eddy H. Debaere	Language coprocessor to support the interpretation of MODULA-2 programs.	Microprocess. Microsystems	1987	DBLP DOI BibTeX RDF
16	Milan S. Vlajnié, Teodor Maksimovié	Coprocessor design for GaAs technology.	Microprocess. Microprogramming	1987	DBLP DOI BibTeX RDF
16	Eddy H. Debaere	A language coprocessor for the interpretation of threaded coded.	Microprocess. Microprogramming	1987	DBLP DOI BibTeX RDF
16	Tep P. Dobry	A Coprocessor for AI: LISP, Prolog and Databases.	COMPCON	1987	DBLP BibTeX RDF
16	Randy L. Ribler	The Integration of the Xenologic X-1 Artificial Intelligence Coprocessor with General Purpose Computers.	COMPCON	1987	DBLP BibTeX RDF
16	L. Ackler	An Overview of the Xenologic X-1 Coprocessor.	COMPCON	1987	DBLP BibTeX RDF
16	Michel Cosnard, Alain Guyot, Bertrand Hochet, Jean-Michel Muller, Hassan Ouaouicha, P. Paul, Eytan Zysman	The FELIN arithmetic coprocessor chip.	IEEE Symposium on Computer Arithmetic	1987	DBLP DOI BibTeX RDF
16	B. T. G. Tan, L. C. Sia	6800 coprocessor for a 6502 bus.	Microprocess. Microsystems	1986	DBLP DOI BibTeX RDF
16	Glen Shires	A New VLSI Graphics Coprocessor-The Intel 82786.	IEEE Computer Graphics and Applications	1986	DBLP DOI BibTeX RDF
16	Yves Crouzet, Jacques Chavade	A 6800 coprocessor for error detection in microcomputers: The PAD.	Proc. IEEE	1986	DBLP DOI BibTeX RDF
16	Luis A. Basto, John R. Kuban	Test Features ot the MC68881 Floating-Point Coprocessor.	ITC	1985	DBLP BibTeX RDF
16	Clayton Huntsman, Duane Cawthron	The MC68881 Floating-point Coprocessor.	IEEE Micro	1983	DBLP DOI BibTeX RDF
11	Junaid Ansari, Xi Zhang 0001, Andreas Achtzehn, Marina Petrova, Petri Mähönen	A flexible MAC development framework for cognitive radio systems.	WCNC	2011	DBLP DOI BibTeX RDF
11	Ananth Nallamuthu, Melissa C. Smith, Scott S. Hampton, Pratul K. Agarwal, Sadaf R. Alam	Energy efficient biomolecular simulations with FPGA-based reconfigurable computing.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	biomolecular simulations, lammps, fpga, reconfigurable computing, molecular dynamics
11	Tian Song, Dongsheng Wang 0002, Zhizhong Tang	A parameterized multilevel pattern matching architecture on FPGAs for network intrusion detection and prevention.	Sci. China Ser. F Inf. Sci.	2009	DBLP DOI BibTeX RDF	network intrusion prevention, network security, pattern matching, network intrusion detection