Search results for "decoder"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
15	Mengyao Ma, Oscar C. Au, Liwei Guo, Xiaopeng Fan, Ling Hou, Shueng-Han Gary Chan	A multi-hypothesis decoder for multiple description video coding.	ISCAS	2008	DBLP DOI BibTeX RDF
15	Hazem Moussa, Amer Baghdadi, Michel Jézéquel	Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder.	ISCAS	2008	DBLP DOI BibTeX RDF
15	Chun-Nan Liu, Jui Hong Hung, Tsung-Han Tsai 0001	Optimization techniques of AAC decoder on PACDSP VLIW processor.	ISCAS	2008	DBLP DOI BibTeX RDF
15	Fernando Pereira 0001	Analysis for Video Coding: Moving It from the Encoder to the Decoder.	ICIAR	2008	DBLP DOI BibTeX RDF	analysis for coding, predictive video coding, video coding, distributed video coding
15	Ertem Tuncel	Kraft Inequality and Zero-Error Source Coding With Decoder Side Information.	IEEE Trans. Inf. Theory	2007	DBLP DOI BibTeX RDF
15	Szu-Wei Lee, C.-C. Jay Kuo	Complexity Modeling for Motion Compensation in H.264/AVC Decoder.	ICIP (5)	2007	DBLP DOI BibTeX RDF
15	Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt	FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder.	SAMOS	2007	DBLP DOI BibTeX RDF
15	Bruno Zatt, Arnaldo Azevedo, Luciano Volcan Agostini, Altamiro Amadeu Susin, Sergio Bampi	Memory Hierarchy Targeting Bi-Predictive Motion Compensation for H.264/AVC Decoder.	ISVLSI	2007	DBLP DOI BibTeX RDF
15	John Dielissen, Andries Hekstra	Non-fractional parallelism in LDPC decoder implementations.	DATE	2007	DBLP DOI BibTeX RDF
15	Pankaj Golani, Georgios D. Dimou, Mallika Prakash, Peter A. Beerel	Design of a High-Speed Asynchronous Turbo Decoder.	ASYNC	2007	DBLP DOI BibTeX RDF
15	Kentaro Kawakami, Mitsuhiko Kuroda, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto	Power and Memory Bandwidth Reduction of an H.264/AVC HDTV Decoder LSI with Elastic Pipeline Architecture.	ASP-DAC	2007	DBLP DOI BibTeX RDF
15	K. Mori, M. Suzuki, Y. Ohara, S. Matsuo, A. Asano	Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G).	ASP-DAC	2007	DBLP DOI BibTeX RDF
15	Lupin Chen, Jinjin He, Zhongfeng Wang 0001	Design of Low-Power Memory-Efficient Viterbi Decoder.	SiPS	2007	DBLP DOI BibTeX RDF
15	Mahendra Kumar Angamuthu Ganesan, Sundeep Singh, Frank May, Jürgen Becker 0001	H.264 Decoder at HD Resolution on a Coarse Grain Dynamically Reconfigurable Architecture.	FPL	2007	DBLP DOI BibTeX RDF
15	George Sobral Silveira, Karina R. G. da Silva, Elmar U. K. Melcher	Functional verification of an MPEG-4 decoder design using a random constrained movie generator.	SBCCI	2007	DBLP DOI BibTeX RDF	VeriSC, randmovie, stimuli, verification, SystemC, movie, functional coverage
15	Mohamed A. Haleem, K. P. Subbalakshmi	Optimal Source-Channel Decoder for Correlated Markov Sources over Additive Markov Channels.	DCC	2007	DBLP DOI BibTeX RDF
15	Eun Sung Jeon, Yohan Kim, Dong Ku Kim	Two New Types of Candidate Symbol Sorting Schemes for Complexity Reduction of a Sphere Decoder.	FGCN (1)	2007	DBLP DOI BibTeX RDF
15	Mu-Huo Cheng, Jin-Yen Lee, Yu-Hao Lu	A Numerical Huffman Decoder.	ISCC	2007	DBLP DOI BibTeX RDF
15	Xing Fang, Dong Wang, Shuming Chen	Exploiting Thread-Level Parallelism of Irregular LDPC Decoder with Simultaneous Multi-threading Technique.	APPT	2007	DBLP DOI BibTeX RDF
15	André Sülflow, Rolf Drechsler	Modeling a Fully Scalable Reed-Solomon Encoder/Decoder over GF(p^{m}) in SystemC.	ISMVL	2007	DBLP DOI BibTeX RDF
15	Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin	FPGA Prototyping Strategy for a H.264/AVC Video Decoder.	IEEE International Workshop on Rapid System Prototyping	2007	DBLP DOI BibTeX RDF
15	Vaidyanathan Ramadurai, Sanjay Jinturkar, Mayan Moudgill, C. John Glossner	Design and Implementation of a Multithreaded High Resolution MPEG4 Decoder on Sandblaster DSP.	ESTIMedia	2007	DBLP DOI BibTeX RDF
15	Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt	System level power estimation methodology with H.264 decoder prediction IP case study.	ICCD	2007	DBLP DOI BibTeX RDF
15	Kiran K. Gunnam, Gwan Choi, Weihuang Wang, Mark B. Yeary	Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard.	ISCAS	2007	DBLP DOI BibTeX RDF
15	Woong Hwangbo, Jaemoon Kim, Chong-Min Kyung	A High-Performance 2-D Inverse Transform Architecture for the H.264/AVC Decoder.	ISCAS	2007	DBLP DOI BibTeX RDF
15	Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi	MoCHA: a Bi-Predictive Motion Compensation Hardware for H.264/AVC Decoder Targeting HDTV.	ISCAS	2007	DBLP DOI BibTeX RDF
15	Tzu-Chieh Kuo, Alan N. Willson Jr.	Low-latency Memory-efficient 150-Mbps Turbo FEC Encoder and Decoder.	ISCAS	2007	DBLP DOI BibTeX RDF
15	O. Eljamaly Toumaz, P. Sweeney	Alternative Approximation of Check Node Algorithm for DVB-S2 LDPC Decoder.	ICSNC	2007	DBLP DOI BibTeX RDF	Min-Sum, check nodes algorithm, alternative approximation, computational complexity, LDPC codes
15	Vu-Duc Ngo, June-Young Chang, Younghwan Bae, Hanjin Cho, Hae-Wook Choi	Latency Optimization for NoC Design of H.264 Decoder Based on Self-similar Traffic Modeling.	ISPA	2007	DBLP DOI BibTeX RDF
15	Junhao Zheng, Lei Deng, Peng Zhang, Don Xie	An Efficient VLSI Architecture for Motion Compensation of AVS HDTV Decoder.	J. Comput. Sci. Technol.	2006	DBLP DOI BibTeX RDF	motion compensation, VLSI architecture, AVS
15	Chien-Ching Lin, Yen-Hsu Shih, Hsie-Chia Chang, Chen-Yi Lee	A low power turbo/Viterbi decoder for 3GPP2 applications.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
15	Huai-Yi Hsu, Jih-Chiang Yeo, An-Yeu Wu	Multi-Symbol-Sliced Dynamically Reconfigurable Reed-Solomon Decoder Design Based on Unified Finite-Field Processing Element.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
15	Chih-Da Chien, Keng-Po Lu, Yu-Min Chen, Jiun-In Guo, Yuan-Sun Chu, Ching-Lung Su	An Area-Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications.	IEEE Trans. Circuits Syst. Video Technol.	2006	DBLP DOI BibTeX RDF
15	Xinjia Chen, Kemin Zhou, Jorge L. Aravena	A new family of unitary space-time codes with a fast parallel sphere decoder algorithm.	IEEE Trans. Inf. Theory	2006	DBLP DOI BibTeX RDF
15	Tsachy Weissman, Abbas El Gamal	Source Coding With Limited-Look-Ahead Side Information at the Decoder.	IEEE Trans. Inf. Theory	2006	DBLP DOI BibTeX RDF
15	Arnaldo Azevedo, Bruno Zatt, Luciano Volcan Agostini, Sergio Bampi	Motion Compensation Decoder Architecture for H.264/AVC Main Profile Targeting HDTV.	VLSI-SoC	2006	DBLP DOI BibTeX RDF
15	Van-Su Pham, Minh-Tuan Le, Linh Mai, Giwan Yoon	Low Complexity Maximum-likelihood Decoder for VBLAST-STBC scheme in MIMO Wireless Communication Systems.	VTC Spring	2006	DBLP DOI BibTeX RDF
15	Torben Brack, Frank Kienle, Norbert Wehn	Disclosing the LDPC code decoder design space.	DATE	2006	DBLP DOI BibTeX RDF
15	Víctor Reyes, Wido Kruijtzer, Tomás Bautista, Ghiath Alkadi, Antonio Núñez	A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study.	DATE	2006	DBLP DOI BibTeX RDF
15	John Dielissen, Andries Hekstra, Vincent Berg	Low cost LDPC decoder for DVB-S2.	DATE Designers' Forum	2006	DBLP DOI BibTeX RDF
15	Lami Kaya, Mohammad Al-Qudah	A visual tool for trellis construction and Viterbi decoder of augmented RAC array codes.	IWCMC	2006	DBLP DOI BibTeX RDF	array codes, row and column code, trellis decoding, Viterbi decoding
15	Chih-Hung Li, Chih-Chieh Chen, Drew Wei-Chi Su, Ming-Jiun Wang, Wen-Hsiao Peng, Tihao Chiang, Gwo Giun Lee	A unified systolic architecture for combined inter and intra predictions in H.264/AVC decoder.	IWCMC	2006	DBLP DOI BibTeX RDF	H.264, motion compensation, intra prediction
15	Suh Ho Lee, Ji Hwan Park, Seon Wook Kim, Sung-Jea Ko, Suki Kim	Implementation of H.264/AVC decoder for mobile video applications.	ASP-DAC	2006	DBLP DOI BibTeX RDF
15	Yang Liu 0016, Tong Zhang 0002, Jiang Hu	Low Power Trellis Decoder with Overscaled Supply Voltage.	SiPS	2006	DBLP DOI BibTeX RDF
15	Ning Chen 0004, Yongmei Dai, Zhiyuan Yan 0001	Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes.	SiPS	2006	DBLP DOI BibTeX RDF
15	Geoff Knagge, Mark Bickerstaff, Brett Ninness, Steven R. Weller, Graeme Woodward	A VLSI 8×8 MIMO Near-ML Decoder Engine.	SiPS	2006	DBLP DOI BibTeX RDF
15	Luciano Volcan Agostini, Arnaldo Azevedo, Vagner S. Rosa, Eduardo A. Berriel, Tatiana Gadelha Serra dos Santos, Sergio Bampi, Altamiro Amadeu Susin	FPGA Design of A H.264/AVC Main Profile Decoder for HDTV.	FPL	2006	DBLP DOI BibTeX RDF
15	Luis G. Barbero, John S. Thompson	FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems.	FPL	2006	DBLP DOI BibTeX RDF
15	Slawomir Cichon, Marek Gorgon, Miroslaw Pac	Handel-C Design Enhancement for FPGA-Based DV Decoder.	ARC	2006	DBLP DOI BibTeX RDF	video decompression, field programmable gate array, Parallel algorithm, high level languages
15	Peng Zhang 0018, Wen Gao 0001, Di Wu 0022, Don Xie	An Efficient Reference Frame Storage Scheme for H.264 HDTV Decoder.	ICME	2006	DBLP DOI BibTeX RDF
15	Guang-Tung Jian, Mei-Juan Chen, Ming-Chieh Chi	Effective Error Concealment Algorithm by Boundary Information for H.264 Video Decoder.	ICME	2006	DBLP DOI BibTeX RDF
15	Shu Shi, Feng Liu, Xu Cheng 0001	A Low Complexity MPEG Video Decoder with Arbitrary Downscaling Capability.	ESTIMedia	2006	DBLP DOI BibTeX RDF
15	Christos Koulamas, Aggeliki S. Prayati, Gauthier Lafruit, George D. Papadopoulos	Measurements and modeling of resource consumption in wireless video streaming: the decoder case.	WMuNeP	2006	DBLP DOI BibTeX RDF	CPU cycles, time, energy, video streaming, resource consumption
15	Georgi I. Radulov, Patrick J. Quinn, Pieter C. W. van Beek, Johannes A. Hegt, Arthur H. M. van Roermund	A binary-to-thermometer decoder with built-in redundancy for improved DAC yield.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Suh Ho Lee, Jeong Hun Kim, Ji Hwan Park, Seon Wook Kim, Suki Kim	Implementation of H.264/AVC decoder for mobile video applications.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Appaya Devaraj Swaminathan, Nastooh Avessta	Integer linear programming method for spatial temporal mapping of the Viterbi decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Heng-Yao Lin, Ying-Hong Lu, Bin-Da Liu, Jar-Ferr Yang	Low power design of H.264 CAVLC decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Michael K. Cheng, Bruce E. Moision, Jon Hamkins, Michael A. Nakashima	An interleaver implementation for the serially concatenated pulse-position modulation decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Vasily G. Moshnyaga, Kenji Wakisaka	Reducing computations in MPEG2 video decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Pasin Israsena, Izzet Kale	A high-speed, low-power interleaved trace-back memory for Viterbi decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Jaehyun Baek, Myung Hoon Sunwoo	Enhanced degree computationless modified Euclid's algorithm for Reed-Solomon decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Fariborz Sobhanmanesh, Saeid Nooshabadi	VLSI architecture for 4×4 16-QAM V-BLAST decoder.	ISCAS	2006	DBLP DOI BibTeX RDF
15	Woo Hyung Lee, Pinaki Mazumder	Parallel Processing Based Power Reduction in a 256 State Viterbi Decoder.	ASAP	2006	DBLP DOI BibTeX RDF
15	Vu-Duc Ngo, Huy Nam Nguyen, Younghwan Bae, Hanjin Cho, Hae-Wook Choi	Throughput Aware Mapping for Network on Chip Design of H.264 Decoder.	ISPA Workshops	2006	DBLP DOI BibTeX RDF
15	Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi	The Optimum Network on Chip Architectures for Video Object Plane Decoder Design.	ISPA	2006	DBLP DOI BibTeX RDF
15	Koushik Maharatna, Alfonso Troya, Milos Krstic, Eckhard Grass	On the Implementation of a Low-Power IEEE 802.11a Compliant Viterbi Decoder.	VLSI Design	2006	DBLP DOI BibTeX RDF
15	Junhao Zheng, Di Wu 0022, Lei Deng 0007, Don Xie, Wen Gao 0001	A Motion Vector Predictor Architecture for AVS and MPEG-2 HDTV Decoder.	PCM	2006	DBLP DOI BibTeX RDF	Motion vector prediction, MPEG, Motion compensation, VLSI architecture, AVS
15	Min Woo Kim, Jun Dong Cho	A VLSI Design of High Speed Bit-level Viterbi Decoder.	APCCAS	2006	DBLP DOI BibTeX RDF
15	Ya-Nan Wen, Guan-Lin Wu, Sao-Jie Chen, Yu Hen Hu	Multiple-Symbol Parallel CAVLC Decoder for H.264/AVC.	APCCAS	2006	DBLP DOI BibTeX RDF
15	Jin Sha, Minglun Gao, Zhongjin Zhang, Li Li 0003, Zhongfeng Wang 0001	An FPGA Implementation of Array LDPC Decoder.	APCCAS	2006	DBLP DOI BibTeX RDF
15	Jia-Bin Huang 0001, Yu-Kun Lin, Tian-Sheuan Chang	A Display Order Oriented Scalable Video Decoder.	APCCAS	2006	DBLP DOI BibTeX RDF
15	Sang-yong Yoon, Sanggyu Park, Soolk Chae	Implementation of a H.264 decoder with Template-based Communication Refinement.	APCCAS	2006	DBLP DOI BibTeX RDF
15	Tsu-Ming Liu, Ching-Che Chung, Chen-Yi Lee, Ting-An Lin, Sheng-Zen Wang	Design of a 125muW, fully-scalable MPEG-2 and H.264/AVC video decoder for mobile applications.	DAC	2006	DBLP DOI BibTeX RDF	mobile, low-power, H.264/AVC, MPEG-2
15	Pedro Henrique Cox, Aparecido Augusto de Carvalho	FPGA Discrete Wavelet Transform Encoder/Decoder Implementation.	ICONIP (3)	2006	DBLP DOI BibTeX RDF
15	Ketan Mayer-Patel, Brian C. Smith, Lawrence A. Rowe	The berkeley software MPEG-1 video decoder.	ACM Trans. Multim. Comput. Commun. Appl.	2005	DBLP DOI BibTeX RDF	MPEG, Video compression
15	Alberto La Rosa, Luciano Lavagno, Claudio Passerone	Implementation of a UMTS turbo decoder on a dynamically reconfigurable platform.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
15	Yasutada Oohama	Rate-distortion theory for Gaussian multiterminal source coding systems with several side informations at the decoder.	IEEE Trans. Inf. Theory	2005	DBLP DOI BibTeX RDF
15	Minh-Tuan Le, Van-Su Pham, Linh Mai, Giwan Yoon	Low-complexity maximum-likelihood decoder for four-transmit-antenna quasi-orthogonal space-time block code.	IEEE Trans. Commun.	2005	DBLP DOI BibTeX RDF
15	Paul R. Schumacher, Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Nick Fedele, Kees A. Vissers, Jan Bormans	A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications.	ICIP (2)	2005	DBLP DOI BibTeX RDF
15	Bo Shen, Junhua Tian, Zheng Li, Jianing Su, Qianling Zhang	A high performance QAM receiver for digital cable TV with integrated A/D and FEC decoder.	ASP-DAC	2005	DBLP DOI BibTeX RDF
15	Robert Cleary, Michael O'Neill 0001	An Attribute Grammar Decoder for the 01 MultiConstrained Knapsack Problem.	EvoCOP	2005	DBLP DOI BibTeX RDF
15	Jiang Xu 0001, Wayne H. Wolf, Jörg Henkel, Srimat T. Chakradhar	H.264 HDTV Decoder Using Application-Specific Networks-On-Chip.	ICME	2005	DBLP DOI BibTeX RDF
15	Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra	Quantized LDPC decoder design for binary symmetric channels.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
15	Jin Jie, Chi-Ying Tsui, Wai Ho Mow	A threshold-based algorithm and VLSI architecture of a K-best lattice decoder for MIMO systems.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
15	Byonghyo Shim, Hyung G. Myung	A novel metric representation for low-complexity log-MAP decoder.	ISCAS (6)	2005	DBLP DOI BibTeX RDF
15	Yasuyuki Hatakawa, Shingo Yoshizawa, Yoshikazu Miyanaga	Robust VLSI architecture for system-on-chip design and its implementation in Viterbi decoder.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
15	Tsung-Han Tsai 0001, Cheng-Hung Lin, An-Yeu Wu	A memory-reduced log-MAP kernel for turbo decoder.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
15	Wen-Kai Huang, I-Ting Lin, Shi-Wei Chen, Ing-Jer Huang	A cost-effective media processor for embedded applications [audio decoder example].	ISCAS (6)	2005	DBLP DOI BibTeX RDF
15	Qingsheng Hu, Zhigong Wang, Jun Zhang, Jie Xiao	Low complexity parallel Chien search architecture for RS decoder.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
15	Zhan Guo, Peter Nilsson 0001	A 53.3 Mb/s 4×4 16-QAM MIMO decoder in 0.35-µm CMOS.	ISCAS (5)	2005	DBLP DOI BibTeX RDF
15	Fengfan Yang, Tho Le-Ngoc	GGD model of extrinsic information with dynamic parameter assignment for turbo decoder.	IEEE Trans. Wirel. Commun.	2004	DBLP DOI BibTeX RDF
15	Ayman Elezabi, Alexandra Duel-Hallen	Improved Viterbi decoder metrics for two-stage detectors in DS-CDMA.	IEEE Trans. Wirel. Commun.	2004	DBLP DOI BibTeX RDF
15	Adriana Dumitras, Barry G. Haskell	An encoder-decoder texture replacement method with application to content-based movie coding.	IEEE Trans. Circuits Syst. Video Technol.	2004	DBLP DOI BibTeX RDF
15	Sila Ekmekci, Thomas Sikora	Recursive decoder distortion estimation based on AF(1) source modeling for video.	ICIP	2004	DBLP DOI BibTeX RDF
15	Prakash Ishwar, Kannan Ramchandran	On decoder-latency versus performance tradeoffs in differential predictive coding.	ICIP	2004	DBLP DOI BibTeX RDF
15	Gabriella Cincotti, Naoya Wada, Ken-ichi Kitayama	An Accurate Model of a Full Optical Encoder/Decoder in a WGR Configuration.	OpNeTec	2004	DBLP DOI BibTeX RDF
15	Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit	Evaluating Alternative Implementations for LDPC Decoder Check Node Function.	ISVLSI	2004	DBLP DOI BibTeX RDF
15	Krishnan Srinivasan, Vijay Ramamurthi, Karam S. Chatha	A Technique for Energy versus Quality of Service Trade-Off for MPEG-2 Decoder.	ISVLSI	2004	DBLP DOI BibTeX RDF
15	Weiyu Xu, Youzheng Wang, Jing Wang 0001	A fast exact ML sphere decoder with efficient two-layer enumeration.	VTC Fall (2)	2004	DBLP DOI BibTeX RDF
15	Peng Zhang, Guangguo Bi, Xiaohu You 0001	An effective simplifying scheme for Viterbi decoder.	VTC Fall (2)	2004	DBLP DOI BibTeX RDF