Search results for "DFT"

Hits ?▲	Authors	Title	Venue	Year	Link
27	Martin Omaña 0001, Daniele Rossi 0001, Cecilia Metra	Novel High Speed Robust Latch.	DFT	2009	DBLP DOI BibTeX RDF
27	Syed Zafar Shazli, Mehdi Baradaran Tahoori	Transient Error Detection and Recovery in Processor Pipelines.	DFT	2009	DBLP DOI BibTeX RDF
27	Adit D. Singh	A Defect Tolerant and Performance Tunable Gate Architecture for End-of-Roadmap CMOS.	DFT	2009	DBLP DOI BibTeX RDF
27	Fan Yang 0060, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz	Improving the Detectability of Resistive Open Faults in Scan Cells.	DFT	2009	DBLP DOI BibTeX RDF
27	Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue	Reliability and Performance Analysis of FPGA-Based Fault Tolerant System.	DFT	2009	DBLP DOI BibTeX RDF
27	Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici	Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR).	DFT	2009	DBLP DOI BibTeX RDF
27	Yuu Maeda, Haruhiko Kaneko	Error Control Coding for Multilevel Cell Flash Memories Using Nonbinary Low-Density Parity-Check Codes.	DFT	2009	DBLP DOI BibTeX RDF
27	Martin Omaña 0001, Marcin Marzencki, Roberto Specchia, Cecilia Metra, Bozena Kaminska	Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors.	DFT	2009	DBLP DOI BibTeX RDF
27	Yu Liu, Kaijie Wu 0001	An ILP formulation to Unify Power Efficiency and Fault Detection at Register-Transfer Level.	DFT	2009	DBLP DOI BibTeX RDF
27	Souheib Baarir, Cécile Braunstein, Renaud Clavel, Emmanuelle Encrenaz, Jean-Michel Ilié, Régis Leveugle, Isabelle Mounier, Laurence Pierre, Denis Poitrenaud	Complementary Formal Approaches for Dependability Analysis.	DFT	2009	DBLP DOI BibTeX RDF
27	George J. Starr, Jie Qin, Bradley F. Dutton, Charles E. Stroud, Foster F. Dai, Victor P. Nelson	Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems.	DFT	2009	DBLP DOI BibTeX RDF
27	Jenny Leung, Glenn H. Chapman, Israel Koren, Zahava Koren	Characterization of Gain Enhanced In-Field Defects in Digital Imagers.	DFT	2009	DBLP DOI BibTeX RDF
27	Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano	Error Correction Codes for SEU and SEFI Tolerant Memory Systems.	DFT	2009	DBLP DOI BibTeX RDF
27	Giuseppe Di Guglielmo, Franco Fummi, Graziano Pravadelli, Mark Hampton, Florian Letombe	On the Functional Qualification of a Platform Model.	DFT	2009	DBLP DOI BibTeX RDF
27	Bo Fu, Paul Ampadu	Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects.	DFT	2009	DBLP DOI BibTeX RDF
27	Hyoung-Kook Kim, Wen-Ben Jone, Laung-Terng Wang	Analysis of Resistive Open Defects in a Synchronizer.	DFT	2009	DBLP DOI BibTeX RDF
27	Cristiana Bolchini, Fabrizio Castro, Antonio Miele	A Fault Analysis and Classifier Framework for Reliability-Aware SRAM-Based FPGA Systems.	DFT	2009	DBLP DOI BibTeX RDF
27	Nader Alawadhi, Ozgur Sinanoglu	Improving the Effectiveness of XOR-based Decompressors through Horizontal/Vertical Move of Stimulus Fragments.	DFT	2009	DBLP DOI BibTeX RDF
27	Unni Chandran, Dan Zhao	Thermal Driven Test Access Routing in Hyper-interconnected Three-Dimensional System-on-Chip.	DFT	2009	DBLP DOI BibTeX RDF
27	Muhammad Tauseef Rab, Asad Amin Bawa, Nur A. Touba	Improving Memory Repair by Selective Row Partitioning.	DFT	2009	DBLP DOI BibTeX RDF
27	Sandeep P. Kumar	Low DPM: Why Do We Need it and What Does it Cost!	DFT	2009	DBLP DOI BibTeX RDF
27	Meng Zhang 0017, Anita Lungu, Daniel J. Sorin	Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms.	DFT	2009	DBLP DOI BibTeX RDF
27	Nor Zaidi Haron, Said Hamdioui	Using RRNS Codes for Cluster Faults Tolerance in Hybrid Memories.	DFT	2009	DBLP DOI BibTeX RDF
27	Yusuke Fukushima, Masaru Fukushi, Susumu Horiguchi	Fault-Tolerant Routing Algorithm for Network on Chip without Virtual Channels.	DFT	2009	DBLP DOI BibTeX RDF
27	Hans-Joachim Wunderlich	Software-Based Hardware Fault Tolerance for Many-Core Architectures.	DFT	2009	DBLP DOI BibTeX RDF
27	Yiorgos Makris	Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors.	DFT	2009	DBLP DOI BibTeX RDF
27	Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba	Reducing Test Point Area for BIST through Greater Use of Functional Flip-Flops to Drive Control Points.	DFT	2009	DBLP DOI BibTeX RDF
27	Michael Campbell	The Future of Test - Product Integration and its Impact on Test.	DFT	2009	DBLP DOI BibTeX RDF
27	Bradley F. Dutton, Charles E. Stroud	Soft Core Embedded Processor Based Built-In Self-Test of FPGAs.	DFT	2009	DBLP DOI BibTeX RDF
27	Mingjing Chen, Alex Orailoglu	Flip-Flop Hardening and Selection for Soft Error and Delay Fault Resilience.	DFT	2009	DBLP DOI BibTeX RDF
27	Stefano Di Carlo, Nadereh Hatami, Paolo Prinetto, Alessandro Savino	System Level Testing via TLM 2.0 Debug Transport Interface.	DFT	2009	DBLP DOI BibTeX RDF
27	Zahra Mashreghian Arani, Masoud Hashempour, Fabrizio Lombardi	Coded DNA Self-Assembly for Error Detection/Location.	DFT	2009	DBLP DOI BibTeX RDF
27	Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor (eds.)	23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA	DFT	2008	DBLP BibTeX RDF
27	Rui Gong, Kui Dai, Zhiying Wang 0003	A Framework to Evaluate the Trade-off among AVF Performance and Area of Soft Error Tolerant Microprocessors.	DFT	2008	DBLP DOI BibTeX RDF
27	Manoj Kumar Goparaju, Ashok Kumar Palaniswamy, Spyros Tragoudas	A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks.	DFT	2008	DBLP DOI BibTeX RDF
27	Yukiya Miura, Jiro Kato	Diagnosis of Analog Circuits by Using Multiple Transistors and Data Sampling.	DFT	2008	DBLP DOI BibTeX RDF
27	Jae-Young Choi, Yoon-Hwa Choi	Fault Detection of Bloom Filters for Defect Maps.	DFT	2008	DBLP DOI BibTeX RDF
27	Cristiana Bolchini, Antonio Miele	Design Space Exploration for the Design of Reliable.	DFT	2008	DBLP DOI BibTeX RDF
27	Waleed K. Al-Assadi, Sindhu Kakarla	A BIST Technique for Crosstalk Noise Detection in FPGAs.	DFT	2008	DBLP DOI BibTeX RDF
27	Shianling Wu, Laung-Terng Wang, Zhigang Jiang, Jiayong Song, Boryau Sheu, Xiaoqing Wen, Michael S. Hsiao, James Chien-Mo Li, Jiun-Lang Huang, Ravi Apte	On Optimizing Fault Coverage, Pattern Count, and ATPG Run Time Using a Hybrid Single-Capture Scheme for Testing Scan Designs.	DFT	2008	DBLP DOI BibTeX RDF
27	Ilia Polian, Sudhakar M. Reddy, Irith Pomeranz, Xun Tang, Bernd Becker 0001	On Reducing Circuit Malfunctions Caused by Soft Errors.	DFT	2008	DBLP DOI BibTeX RDF
27	Rajsekhar Adapa, Spyros Tragoudas	Prioritization of Paths for Diagnosis.	DFT	2008	DBLP DOI BibTeX RDF
27	David Wolpert 0001, Paul Ampadu	A Low-Power Safety Mode for Variation Tolerant Systems-on-Chip.	DFT	2008	DBLP DOI BibTeX RDF
27	Nimay Shah, Rupak Samanta, Ming Zhang, Jiang Hu, Duncan Walker	Built-In Proactive Tuning System for Circuit Aging Resilience.	DFT	2008	DBLP DOI BibTeX RDF
27	Hamed Tabkhi, Seyed Ghassem Miremadi, Alireza Ejlali	An Asymmetric Checkpointing and Rollback Error Recovery Scheme for Embedded Processors.	DFT	2008	DBLP DOI BibTeX RDF
27	Vikas Chandra, Robert C. Aitken	Impact of Technology and Voltage Scaling on the Soft Error Susceptibility in Nanoscale CMOS.	DFT	2008	DBLP DOI BibTeX RDF
27	Osnat Keren, Ilya Levin, Vladimir Ostrovsky, Beni Abramov	Arbitrary Error Detection in Combinational Circuits by Using Partitioning.	DFT	2008	DBLP DOI BibTeX RDF
27	Abhisek Pan, James W. Tschanz, Sandip Kundu	A Low Cost Scheme for Reducing Silent Data Corruption in Large Arithmetic Circuit.	DFT	2008	DBLP DOI BibTeX RDF
27	Kazuteru Namba, Hideo Ito	Delay Fault Testability on Two-Rail Logic Circuits.	DFT	2008	DBLP DOI BibTeX RDF
27	Franco Fummi, Davide Quaglia, Francesco Stefanni	Network Fault Model for Dependability Assessment of Networked Embedded Systems.	DFT	2008	DBLP DOI BibTeX RDF
27	Xingguo Xiong, Yu-Liang Wu, Wen-Ben Jone	Material Fatigue and Reliability of MEMS Accelerometers.	DFT	2008	DBLP DOI BibTeX RDF
27	Kevin Sliech, Martin Margala	A Digital BIST for Phase-Locked Loops.	DFT	2008	DBLP DOI BibTeX RDF
27	Francesco Abate, Massimo Violante	Coping with Obsolescence of Processor Cores in Critical Applications.	DFT	2008	DBLP DOI BibTeX RDF
27	Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti	Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller.	DFT	2008	DBLP DOI BibTeX RDF
27	Laura Frigerio, Matteo Alan Radaelli, Fabio Salice	A Generalized Approach for the Use of Convolutional Coding in SEU Mitigation.	DFT	2008	DBLP DOI BibTeX RDF
27	Zahi S. Abuhamdeh	A Case Study of ATPG Delay Path Performance Based on Measured Power Rail Integrity.	DFT	2008	DBLP DOI BibTeX RDF
27	Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano	A Novel Error Detection and Correction Technique for RNS Based FIR Filters.	DFT	2008	DBLP DOI BibTeX RDF
27	Carlos Arthur Lang Lisbôa, Luigi Carro	XOR-based Low Cost Checkers for Combinational Logic.	DFT	2008	DBLP DOI BibTeX RDF
27	Yoshiaki Asao, Masayoshi Iwayama, Kenji Tsuchida, Akihiro Nitayama, Hiroaki Yoda, Hisanori Aikawa, Sumio Ikegawa, Tatsuya Kishi	A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access Memory.	DFT	2008	DBLP DOI BibTeX RDF
27	Prashant D. Joshi	Error Detect Logic Resulting in Faster Address Generate and Decode for Caches.	DFT	2008	DBLP DOI BibTeX RDF
27	Francesco Regazzoni 0001, Thomas Eisenbarth 0001, Luca Breveglieri, Paolo Ienne, Israel Koren	Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?.	DFT	2008	DBLP DOI BibTeX RDF
27	Shuangyu Ruan, Kazuteru Namba, Hideo Ito	Soft Error Hardened FF Capable of Detecting Wide Error Pulse.	DFT	2008	DBLP DOI BibTeX RDF
27	Xiaoxiao Wang 0001, Hassan Salmani, Mohammad Tehranipoor, James F. Plusquellic	Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis.	DFT	2008	DBLP DOI BibTeX RDF
27	Cecilia Metra, Martin Omaña 0001, T. M. Mak, Asifur Rahman, Simon Tam 0001	Novel On-Chip Clock Jitter Measurement Scheme for High Performance Microprocessors.	DFT	2008	DBLP DOI BibTeX RDF
27	Stephen Frechette, Yong-Bin Kim, Fabrizio Lombardi	Checkpointing of Rectilinear Growth in DNA Self-Assembly.	DFT	2008	DBLP DOI BibTeX RDF
27	Hongbin Sun 0001, Nanning Zheng 0001, Tong Zhang 0002	Realization of L2 Cache Defect Tolerance Using Multi-bit ECC.	DFT	2008	DBLP DOI BibTeX RDF
27	Muhammad Ibrahim, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu	Minimization of CTS of k-CNOT Circuits for SSF and MSF Model.	DFT	2008	DBLP DOI BibTeX RDF
27	Hyunbean Yi, Sandip Kundu	Core Test Wrapper Design to Reduce Test Application Time for Modular SoC Testing.	DFT	2008	DBLP DOI BibTeX RDF
27	Timothy J. Dysart, Peter M. Kogge	System Reliabilities When Using Triple Modular Redundancy in Quantum-Dot Cellular Automata.	DFT	2008	DBLP DOI BibTeX RDF
27	Jenny Leung, Glenn H. Chapman, Israel Koren, Zahava Koren	Automatic Detection of In-field eld Defect Growth in Image Sensors.	DFT	2008	DBLP DOI BibTeX RDF
27	Joon-Sung Yang, Nur A. Touba	Enhancing Silicon Debug via Periodic Monitoring.	DFT	2008	DBLP DOI BibTeX RDF
27	Michael T. Niemier, Michael Crocker, Xiaobo Sharon Hu	Fabrication Variations and Defect Tolerance for Nanomagnet-Based QCA.	DFT	2008	DBLP DOI BibTeX RDF
27	Julien Vial, Alberto Bosio, Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel	Using TMR Architectures for Yield Improvement.	DFT	2008	DBLP DOI BibTeX RDF
27	Konstantin Likharev	Defect-Tolerant Hybrid CMOS/Nanoelectronic Circuits.	DFT	2008	DBLP DOI BibTeX RDF
27	Ilia Polian, Wenjing Rao	Selective Hardening of NanoPLA Circuits.	DFT	2008	DBLP DOI BibTeX RDF
27	Mahdi Fazeli, Seyed Ghassem Miremadi	A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SET.	DFT	2008	DBLP DOI BibTeX RDF
27	Masoud Hashempour, Zahra Mashreghian Arani, Fabrizio Lombardi	A Tile-Based Error Model for Forward Growth of DNA Self-Assembly.	DFT	2008	DBLP DOI BibTeX RDF
27	Santiago Remersaro, Janusz Rajski, Thomas Rinderknecht, Sudhakar M. Reddy, Irith Pomeranz	ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction.	DFT	2008	DBLP DOI BibTeX RDF
27	John E. Savage	Computing at the Nanoscale.	DFT	2008	DBLP DOI BibTeX RDF
27	Fan Yang 0060, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz	Detection of Transistor Stuck-Open Faults in Asynchronous Inputs of Scan Cells.	DFT	2008	DBLP DOI BibTeX RDF
27	Nilanjan Banerjee, Charles Augustine, Kaushik Roy 0001	Fault-Tolerance with Graceful Degradation in Quality: A Design Methodology and Its Application to Digital Signal Processing Systems.	DFT	2008	DBLP DOI BibTeX RDF
27	Zachary D. Patitz, Nohpill Park	Modeling and Evaluation of Threshold Defect Tolerance.	DFT	2008	DBLP DOI BibTeX RDF
27	Qiaoyan Yu, Paul Ampadu	Adaptive Error Control for NoC Switch-to-Switch Links in a Variable Noise Environment.	DFT	2008	DBLP DOI BibTeX RDF
27	Shubu Mukherjee	Architectural Vulnerability Factor (or, does a soft error matter?).	DFT	2008	DBLP DOI BibTeX RDF
27	Xiaojun Ma, Fabrizio Lombardi	Fault Tolerant Schemes for QCA Systems.	DFT	2008	DBLP DOI BibTeX RDF
27	Yiwen Shi, Kellie DiPalma, Jennifer Dworak	Efficient Determination of Fault Criticality for Manufacturing Test Set Optimization.	DFT	2008	DBLP DOI BibTeX RDF
27	Yoonjae Huh, Yoon-Hwa Choi	Module Grouping for Defect Tolerance in Nanoscale Memory.	DFT	2008	DBLP DOI BibTeX RDF
27	Andrey V. Zykov, Gustavo de Veciana	Exploring Density-Reliability Tradeoffs on Nanoscale Substrates: When do smaller less reliable devices make sense?.	DFT	2008	DBLP DOI BibTeX RDF
27	Oscar Kuiken, Xiao Zhang 0002, Hans G. Kerkhoff	Built-in-Self-Diagnostics for a NoC-Based Reconfigurable IC for Dependable Beamforming Applications.	DFT	2008	DBLP DOI BibTeX RDF
27	Kartik Mohanram	Error Detection and Tolerance for Scaled Electronic Technologies.	DFT	2008	DBLP DOI BibTeX RDF
27	Glenn H. Chapman, Vijay K. Jain	Defect Tolerance for a Capacitance Based Nanoscale Biosensor.	DFT	2008	DBLP DOI BibTeX RDF
27	Syed Zafar Shazli, Mehdi Baradaran Tahoori	Obtaining Microprocessor Vulnerability Factor Using Formal Methods.	DFT	2008	DBLP DOI BibTeX RDF
27	Phil Nigh	The Evolving Role of Test ... it is now a "Value Add" Operation.	DFT	2008	DBLP DOI BibTeX RDF
27	Cristiana Bolchini, Yong-Bin Kim, Adelio Salsano, Nur A. Touba (eds.)	22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy.	DFT	2007	DBLP BibTeX RDF
27	Irith Pomeranz, Sudhakar M. Reddy	A-Diagnosis: A Complement to Z-Diagnosis.	DFT	2007	DBLP DOI BibTeX RDF
27	Monica Alderighi, Fabio Casini, Sergio D'Angelo, Marcello Mancini, Sandro Pastore, Giacomo R. Sechi, Roland Weigand	Evaluation of Single Event Upset Mitigation Schemes for SRAM Based FPGAs Using the FLIPPER Fault Injection Platform.	DFT	2007	DBLP DOI BibTeX RDF
27	Haruhiko Kaneko, Eiji Fujiwara	Reconstruction of Erasure Correcting Codes for Dependable Distributed Storage System without Spare Disks.	DFT	2007	DBLP DOI BibTeX RDF
27	Sybille Hellebrand, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, Bernd Straube	A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction.	DFT	2007	DBLP DOI BibTeX RDF
27	Young Bok Kim, Yong-Bin Kim	Fault Tolerant Source Routing for Network-on-Chip.	DFT	2007	DBLP DOI BibTeX RDF
27	Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Riccardo Mariani	A Functional Verification Based Fault Injection Environment.	DFT	2007	DBLP DOI BibTeX RDF