Search results for "IOLTS"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Raul Chipana, Letícia Maria Veiras Bolzani, Fabian Vargas 0001, Jorge Semião, Juan J. Rodríguez-Andina, Isabel C. Teixeira, João Paulo Teixeira 0001	Investigating the Use of BICS to detect resistive-open defects in SRAMs.	IOLTS	2010	DBLP DOI BibTeX RDF
1	Anna Vaskova, Celia López-Ongil, Alejandro Jiménez-Horas, Enrique San Millán, Luis Entrena	Robust cryptographic ciphers with on-line statistical properties validation.	IOLTS	2010	DBLP DOI BibTeX RDF
1	Michelangelo Grosso, Matteo Sonza Reorda, Marta Portela-García, Mario García-Valderas, Celia López-Ongil, Luis Entrena	An on-line fault detection technique based on embedded debug features.	IOLTS	2010	DBLP DOI BibTeX RDF
1		16th IEEE International On-Line Testing Symposium (IOLTS 2010), 5-7 July, 2010, Corfu, Greece	IOLTS	2010	DBLP BibTeX RDF
1	Navid Farazmand, Masoud Zamani, Mehdi Baradaran Tahoori	Online fault testing of reversible logic using dual rail coding.	IOLTS	2010	DBLP DOI BibTeX RDF
1	Xavier Vera, Jaume Abella 0001, Javier Carretero, Pedro Chaparro, Antonio González 0001	Online error detection and correction of erratic bits in register files.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Eberhard Böhl, Paul Duplys	Nonlinear compression functions using the MISR approach for security purposes in automotive applications.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Michelangelo Grosso, Matteo Sonza Reorda	Exploiting embedded FPGA in on-line software-based test strategies for microprocessor cores.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Elie Maricau, Georges G. E. Gielen	A methodology for measuring transistor ageing effects towards accurate reliability simulation.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Marc Hunger, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, Bernd Becker 0001	ATPG-based grading of strong fault-secureness.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Massimo Violante, M. L. Esposti	A low-cost solution for developing reliable Linux-based space computers for on-board data handling.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Steffen Zeidler 0001, Marcus Ehrig, Milos Krstic, Michael Augustin, Christoph Wolf, Rolf Kraemer	Ultra low cost asynchronous handshake checker.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Vikas Chandra	Designing dependable multicore system with unreliable components.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Samary Baranov, Ilya Levin, Osnat Keren, Mark G. Karpovsky	Designing fault tolerant FSM by nano-PLA.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas 0001, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001	Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Pedro Reviriego, Juan Antonio Maestro, Anne O'Donnell, Chris J. Bleakley	Soft error detection and correction for FFT based convolution using different block lengths.	IOLTS	2009	DBLP DOI BibTeX RDF
1	José F. da Rocha, Nuno Dias, Angelo Monteiro, Alexandre Neves, Gabriel Santos, Marcelino B. Santos, João Paulo Teixeira 0001	Controllability and observability in mixed signal cores.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Dan Alexandrescu, Anne-Lise Lhomme-Perrot, Erwin Schäfer, Cyrille Beltrando	Highs and lows of radiation testing.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Xavier Vera	DFx for massively multiprocessors.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Abhijit Chatterjee, Jacob A. Abraham, Adit D. Singh, Elie Maricau, Rakesh Kumar 0002, Christos A. Papachristou	Panel: Realistic low power design: Let errors occur and correct them later or mitigate errors via design guardbanding and process control?.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Rodrigo Possamai Bastos, Yannick Monnet, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis 0001	Comparing transient-fault effects on synchronous and on asynchronous circuits.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Amit Dutta, Malav Shah, G. Swathi, Rubin A. Parekhji	Design techniques and tradeoffs in implementing non-destructive field test using logic BIST self-test.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis	An Input Vector Monitoring Concurrent BIST scheme exploiting .	IOLTS	2009	DBLP DOI BibTeX RDF
1	Niccolò Battezzati, Filomena Decuzzi, Massimo Violante, Michel Briet	Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Guillaume Hubert, Raoul Velazco, Paul Peronnard	A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Gilles Bizot, Nacer-Eddine Zergainoh, Michael Nicolaidis	Variability and reliability-aware application tasks scheduling and power control (Voltage and Frequency Scaling) in the future nanoscale multiprocessors system on chip.	IOLTS	2009	DBLP DOI BibTeX RDF
1	C. Guardiani, A. Shibkov, Angelo Brambilla, Giancarlo Storti Gajani, Davide Appello, Fausto Piazza, Paolo Bernardi	An I-IP based approach for the monitoring of NBTI effects in SoCs.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Michael Richter 0002, Michael Gössel	Concurrent checking with split-parity codes.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Junfeng Fan, Miroslav Knezevic, Dusko Karaklajic, Roel Maes, Vladimir Rozic, Lejla Batina, Ingrid Verbauwhede	FPGA-based testing strategy for cryptographic chips: A case study on Elliptic Curve Processor for RFID tags.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Yuriy Shiyanovskii, Francis G. Wolff, Christos A. Papachristou	SRAM cell design using tri-state devices for SEU protection.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Houssein Jaber, Fabrice Monteiro, Abbas Dandache	An effective fast and small-area parallel-pipeline architecture for OTM-convolutional encoders.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Kenneth M. Zick, John P. Hayes	On-line characterization and reconfiguration for single event upset variations.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Mario García-Valderas, Marta Portela-García, Celia López-Ongil, Luis Entrena	In-depth analysis of digital circuits against soft errors for selective hardening.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Hafizur Rahaman 0001, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan	C-testable S-box implementation for secure advanced encryption standard.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano	Error detection in addition chain based ECC Point Multiplication.	IOLTS	2009	DBLP DOI BibTeX RDF
1		15th IEEE International On-Line Testing Symposium (IOLTS 2009), 24-26 June 2009, Sesimbra-Lisbon, Portugal	IOLTS	2009	DBLP BibTeX RDF
1	Eleftherios Kolonis, Michael Nicolaidis, Dimitris Gizopoulos, Mihalis Psarakis, Jacques Henri Collet, Piotr Zajac	Enhanced self-configurability and yield in multicore grids.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Fabian Vargas 0001, Claudia A. Rocha, Bernardo Pianta, Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena	Briefing power/reliability optimization in embedded software design.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Antonin Bougerol, Florent Miller, Nadine Buard	Novel DRAM mitigation technique.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Costas Argyrides, Carlos Arthur Lang Lisbôa, Dhiraj K. Pradhan, Luigi Carro	A fast error correction technique for matrix multiplication algorithms.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Dominik Lorenz, Georg Georgakos, Ulf Schlichtmann	Aging analysis of circuit timing considering NBTI and HCI.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Abbas Ramazani, Mohsin Amin, Fabrice Monteiro, Camille Diou, Abbas Dandache	A fault tolerant journalized stack processor architecture.	IOLTS	2009	DBLP DOI BibTeX RDF
1	José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt	Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Jose Luis Garcia-Gervacio, Víctor H. Champac	Detectability analysis of small delays due to resistive opens considering process variations.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Alejandro Jiménez-Horas, Enrique San Millán, Celia López-Ongil, Marta Portela-García, Mario García-Valderas, Luis Entrena	Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Caroline Concatto, Pedro Almeida, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski, Marcos Hervé	Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults.	IOLTS	2009	DBLP DOI BibTeX RDF
1	André V. Fidalgo, Gustavo R. Alves, Manuel C. Felgueiras, Manuel G. Gericota	Using test infrastructures for (remote) online evaluation of the sensitivity to SEUs of FPGAs.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Paolo Rech, Simone Gerardin, Alessandro Paccagnella, Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda, Davide Appello	Evaluating Alpha-induced soft errors in embedded microprocessors.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Sebastià A. Bota, Gabriel Torrens, Bartomeu Alorda	Critical charge characterization in 6-T SRAMs during read mode.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis 0001, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira 0001	Built-in aging monitoring for safety-critical applications.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Alireza Namazi, Yasser Sedaghat, Seyed Ghassem Miremadi, Alireza Ejlali	A low-cost fault-tolerant technique for Carry Look-Ahead adder.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Zhen Wang 0001, Mark G. Karpovsky, Berk Sunar	Multilinear codes for robust error detection.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Paul Duplys, Eberhard Böhl	Linear and nonlinear MISR operations for safety and security in automotive applications.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Shih-Hsin Hu, Jacob A. Abraham	Error detection in 2-D Discrete Wavelet lifting transforms.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Ashkan Eghbal, Pooria M. Yaghini, Hossein Pedram, Hamid R. Zarandi	Fault injection-based evaluation of a synchronous NoC router.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Paolo Maistri, Régis Leveugle	Towards automated fault pruning with Petri Nets.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Jayaram Natarajan, Gokul Kumar, Shreyas Sen, Muhammad Mudassar Nisar, Deuk Lee, Abhijit Chatterjee	Aggressively voltage overscaled adaptive RF systems using error control at the bit and symbol levels.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Pablo Maqueda, Josep Rius 0001	Analysis of the extra delay on interconnects caused by resistive opens and shorts.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Carmela Noro Grando, Carlos Arthur Lang Lisbôa, Álvaro Freitas Moreira, Luigi Carro	Invariant checkers: An efficient low cost technique for run-time transient errors detection.	IOLTS	2009	DBLP DOI BibTeX RDF
1	Rob Aitken	Special Session 4: Reliability and Circuit Simulation.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Kiamal Z. Pekmestzi, Nicholas Axelos, Isidoros Sideris, Nikos K. Moshopoulos	A BISR Architecture for Embedded Memories.	IOLTS	2008	DBLP DOI BibTeX RDF
1	M. Kiran Kumar Reddy, Bharadwaj S. Amrutur, Rubin A. Parekhji	False Error Study of On-line Soft Error Detection Mechanisms.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Costas Argyrides, Fabian Vargas 0001, Marlon Moraes, Dhiraj K. Pradhan	Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Muhammad Mudassar Nisar, Abhijit Chatterjee	Guided Probabilistic Checksums for Error Control in Low Power Digital-Filters.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Shi-Jie Wen, Dan Alexandrescu, Renaud Perez	A Systematical Method of Quantifying SEU FIT.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante	On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Tino Heijmen	Soft-Error Vulnerability of Sub-100-nm Flip-Flops.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Michael Nicolaidis	Special Session 2: Benchmarking and Standardization in Software-Based SER Characterization: Towards an IEEE Task Force?	IOLTS	2008	DBLP DOI BibTeX RDF
1	Ashish Darbari, Bashir M. Al-Hashimi, Peter Harrod, Daryl Bradley	A New Approach for Transient Fault Injection Using Symbolic Simulation.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Philippe Roche, Mark Lysinger, Gilles Gasiot, Jean-Marc Daveau, Mehdi Zamanian, Pierre Dautriche	Growing Interest of Advanced Commercial CMOS Technologies for Space and Medical Applications. Illustration with a New Nano-Power and Radiation-Hardened SRAM in 130nm CMOS.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan	Fault Tolerant Reversible Finite Field Arithmetic Circuits.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Michel Pignol, Thierry Parrain, Vincent Claverie, Christian Boléat, Guy Estaves	Development of a Testbench for Validation of DMT and DT2 Fault-Tolerant Architectures on SOI PowerPC7448.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Piotr Gawkowski, Janusz Sosnowski	Developing Fault Injection Environment for Complex Experiments.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Paolo Maistri, Cyril Excoffon, Régis Leveugle	Software Self-Testing of a Symmetric Cipher with Error Detection Capability.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Nachiketa Das, Pranab Roy, Hafizur Rahaman 0001	On Line Testing of Single Feedback Bridging Fault in Cluster Based FPGA by Using Asynchronous Element.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Fatemeh Refan, Homa Alemzadeh, Saeed Safari, Paolo Prinetto, Zainalabedin Navabi	Reliability in Application Specific Mesh-Based NoC Architectures.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Naghmeh Karimi, Soheil Aminzadeh, Saeed Safari, Zainalabedin Navabi	A Novel GA-Based High-Level Synthesis Technique to Enhance RT-Level Concurrent Testing.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Tobias Koal, Heinrich Theodor Vierhaus	Basic Architecture for Logic Self Repair.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Marc Hunger, Sybille Hellebrand	Verification and Analysis of Self-Checking Properties through ATPG.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano	Totally Fault Tolerant RNS Based FIR Filters.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Yang Zhao 0001, Krishnendu Chakrabarty	On-Line Testing of Lab-on-Chip Using Digital Microfluidic Compactors.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Yuriy Shiyanovskii, Francis G. Wolff, Christos A. Papachristou	SRAM Cell Design Protected from SEU Upsets.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Andreas Merentitis, George Theodorou, Mihalis Giorgaras, Nektarios Kranitis	Directed Random SBST Generation for On-Line Testing of Pipelined Processors.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Ramtilak Vemu, Jacob A. Abraham	Budget-Dependent Control-Flow Error Detection.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Michael Richter 0002, Klaus Oberländer, Michael Gössel	New Linear SEC-DED Codes with Reduced Triple Bit Error Miscorrection Probability.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Samara Sudireddy, Jayawant Kakade, Dimitri Kagaris	Deterministic Built-in TPG with Segmented FSMs.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Richard Ruzicka, Lukás Sekanina, Roman Prokop	Physical Demonstration of Polymorphic Self-Checking Circuits.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Subhasish Mitra	Soft Error Protection Techniques.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Michael E. Imhof, Hans-Joachim Wunderlich, Christian G. Zoellin	Integrating Scan Design and Soft Error Correction in Low-Power Applications.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Florence Azaïs, Laurent Larguier, Yves Bertrand, Michel Renovell	On the Detection of SSN-Induced Logic Errors through On-Chip Monitoring.	IOLTS	2008	DBLP DOI BibTeX RDF
1		14th IEEE International On-Line Testing Symposium (IOLTS 2008), 7-9 July 2008, Rhodes, Greece	IOLTS	2008	DBLP BibTeX RDF
1	Vincent Pouget, Alexandre Douin, Gilles Foucard, Paul Peronnard, Dean Lewis, Pascal Fouillat, Raoul Velazco	Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Norbert Seifert	Special Session 1: Radiation Hardening Techniques.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Alodeep Sanyal, Syed M. Alam, Sandip Kundu	A Built-In Self-Test Scheme for Soft Error Rate Characterization.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Claudia Rusu, Cristian Grecu, Lorena Anghel	Communication Aware Recovery Configurations for Networks-on-Chip.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Nikolaos G. Bartzoudis, Vasileios Tantsios, Klaus D. McDonald-Maier	Dynamic Scheduling of Test Routines for Efficient Online Self-Testing of Embedded Microprocessors.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Antonin Bougerol, Florent Miller, Nadine Buard	SDRAM Architecture & Single Event Effects Revealed with Laser.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Celia López-Ongil, Alejandro Jiménez-Horas, Marta Portela-García, Mario García-Valderas, Enrique San Millán, Luis Entrena	Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris	On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD.	IOLTS	2008	DBLP DOI BibTeX RDF
1	Julien Vial, Alberto Bosio, Patrick Girard 0001, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel	Yield Improvement, Fault-Tolerance to the Rescue?.	IOLTS	2008	DBLP DOI BibTeX RDF

Publications at "IOLTS"( http://dblp.L3S.de/Venues/IOLTS )