Search results for "MICRO"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Kaige Yan, Xingyao Zhang, Xin Fu	Characterizing, modeling, and improving the QoE of mobile devices with low battery level.	MICRO	2015	DBLP DOI BibTeX RDF
1	Kathryn E. Gray, Gabriel Kerneis, Dominic P. Mulligan, Christopher Pulte, Susmit Sarkar, Peter Sewell	An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors.	MICRO	2015	DBLP DOI BibTeX RDF
1	Yazhou Zu, Charles R. Lefurgy, Jingwen Leng, Matthew Halpern, Michael S. Floyd, Vijay Janapa Reddi	Adaptive guardband scheduling to improve system-level efficiency of the POWER7+.	MICRO	2015	DBLP DOI BibTeX RDF
1	Binh Pham 0003, Ján Veselý, Gabriel H. Loh, Abhishek Bhattacharjee	Large pages and lightweight memory management in virtualized environments: can you have it both ways?	MICRO	2015	DBLP DOI BibTeX RDF
1	Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, Scott A. Mahlke	DynaMOS: dynamic schedule migration for heterogeneous cores.	MICRO	2015	DBLP DOI BibTeX RDF
1	Rajib Nath, Dean M. Tullsen	The CRISP performance model for dynamic voltage and frequency scaling in a GPGPU.	MICRO	2015	DBLP DOI BibTeX RDF
1	Yaosheng Fu, Tri Minh Nguyen 0003, David Wentzlaff	Coherence domain restriction on large scale systems.	MICRO	2015	DBLP DOI BibTeX RDF
1	Dibakar Gope, Mikko H. Lipasti	Bias-Free Branch Predictor.	MICRO	2014	DBLP DOI BibTeX RDF
1	Haofan Yang 0001, Jyoti Tripathi, Natalie D. Enright Jerger, Dan Gibson	Dodec: Random-Link, Low-Radix On-Chip Networks.	MICRO	2014	DBLP DOI BibTeX RDF
1	Daya Shanker Khudia, Scott A. Mahlke	Harnessing Soft Computations for Low-Budget Fault Tolerance.	MICRO	2014	DBLP DOI BibTeX RDF
1	Ruisheng Wang, Lizhong Chen	Futility Scaling: High-Associativity Cache Partitioning.	MICRO	2014	DBLP DOI BibTeX RDF
1	Robert Locke Callan, Alenka G. Zajic, Milos Prvulovic	A Practical Methodology for Measuring the Side-Channel Signal Available to the Attacker for Instruction-Level Events.	MICRO	2014	DBLP DOI BibTeX RDF
1	Nagendra Dwarakanath Gulur, Mahesh Mehendale, R. Manikantan, R. Govindarajan	Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth.	MICRO	2014	DBLP DOI BibTeX RDF
1	Supreet Jeloka, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw	Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration.	MICRO	2014	DBLP DOI BibTeX RDF
1	Dmitry Evtyushkin, Jesse Elwell, Meltem Ozsoy, Dmitry V. Ponomarev, Nael B. Abu-Ghazaleh, Ryan Riley	Iso-X: A Flexible Architecture for Hardware-Managed Isolated Execution.	MICRO	2014	DBLP DOI BibTeX RDF
1	Michael A. Laurenzano, Yunqi Zhang, Lingjia Tang, Jason Mars	Protean Code: Achieving Near-Free Online Code Transformations for Warehouse Scale Computers.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jayneel Gandhi, Arkaprava Basu, Mark D. Hill, Michael M. Swift	Efficient Memory Virtualization: Reducing Dimensionality of Nested Page Walks.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jeffrey R. Diamond, Donald S. Fussell, Stephen W. Keckler	Arbitrary Modulus Indexing.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jorge Albericio, Joshua San Miguel, Natalie D. Enright Jerger, Andreas Moshovos	Wormhole: Wisely Predicting Multidimensional Branches.	MICRO	2014	DBLP DOI BibTeX RDF
1	Wei Ding 0008, Diana R. Guttman, Mahmut T. Kandemir	Compiler Support for Optimizing Memory Bank-Level Parallelism.	MICRO	2014	DBLP DOI BibTeX RDF
1	Waclaw Godycki, Christopher Torng, Ivan Bukreyev, Alyssa B. Apsel, Christopher Batten	Enabling Realistic Fine-Grain Voltage Scaling with Reconfigurable Power Distribution Networks.	MICRO	2014	DBLP DOI BibTeX RDF
1	Ankit Sethia, Scott A. Mahlke	Equalizer: Dynamic Tuning of GPU Resources for Efficient Execution.	MICRO	2014	DBLP DOI BibTeX RDF
1	Praveen Yedlapalli, Nachiappan Chidambaram Nachiappan, Niranjan Soundararajan, Anand Sivasubramaniam, Mahmut T. Kandemir, Chita R. Das	Short-Circuiting Memory Traffic in Handheld Platforms.	MICRO	2014	DBLP DOI BibTeX RDF
1	Linhai Song, Min Feng 0001, Nishkam Ravi, Yi Yang 0018, Srimat T. Chakradhar	COMP: Compiler Optimizations for Manycore Processors.	MICRO	2014	DBLP DOI BibTeX RDF
1	Guoyang Chen, Bo Wu 0002, Dong Li 0001, Xipeng Shen	PORPLE: An Extensible Optimizer for Portable Data Placement on GPU.	MICRO	2014	DBLP DOI BibTeX RDF
1	Yunji Chen, Tao Luo, Shaoli Liu, Shijin Zhang, Liqiang He, Jia Wang, Ling Li 0001, Tianshi Chen 0002, Zhiwei Xu 0002, Ninghui Sun, Olivier Temam	DaDianNao: A Machine-Learning Supercomputer.	MICRO	2014	DBLP DOI BibTeX RDF
1	Gwangsun Kim, Minseok Lee, Jiyun Jeong, John Kim	Multi-GPU System Design with Memory Networks.	MICRO	2014	DBLP DOI BibTeX RDF
1	Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, Christopher Batten	Architectural Specialization for Inter-Iteration Loop Dependence Patterns.	MICRO	2014	DBLP DOI BibTeX RDF
1	Erdem Aktas, Furat Afram, Kanad Ghose	Continuous, Low Overhead, Run-Time Validation of Program Executions.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jishen Zhao, Onur Mutlu, Yuan Xie 0001	FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems.	MICRO	2014	DBLP DOI BibTeX RDF
1	Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic	Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures.	MICRO	2014	DBLP DOI BibTeX RDF
1	Joshua San Miguel, Mario Badr, Natalie D. Enright Jerger	Load Value Approximation.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jeongseob Ahn, Chang Hyun Park 0001, Jaehyuk Huh 0001	Micro-Sliced Virtual Processors to Hide the Effect of Discontinuous CPU Availability for Consolidated Systems.	MICRO	2014	DBLP DOI BibTeX RDF
1		47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2014, Cambridge, United Kingdom, December 13-17, 2014	MICRO	2014	DBLP BibTeX RDF
1	Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose, Timothy J. Slegel, Gerard Salem, Sean M. Carey, Richard F. Rizzolo, Thomas Strach	Voltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities.	MICRO	2014	DBLP DOI BibTeX RDF
1	Ryota Shioya, Masahiro Goshima, Hideki Ando	A Front-End Execution Architecture for High Energy Efficiency.	MICRO	2014	DBLP DOI BibTeX RDF
1	Derek Lockhart, Gary Zibrat, Christopher Batten	PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research.	MICRO	2014	DBLP DOI BibTeX RDF
1	Adi Fuchs, Shie Mannor, Uri C. Weiser, Yoav Etsion	Loop-Aware Memory Prefetching Using Code Block Working Sets.	MICRO	2014	DBLP DOI BibTeX RDF
1	Anys Bacha, Radu Teodorescu	Using ECC Feedback to Guide Voltage Speculation in Low-Voltage Processors.	MICRO	2014	DBLP DOI BibTeX RDF
1	Djordje Jevdjic, Gabriel H. Loh, Cansu Kaynak, Babak Falsafi	Unison Cache: A Scalable and Effective Die-Stacked DRAM Cache.	MICRO	2014	DBLP DOI BibTeX RDF
1	Stavros Volos, Javier Picorel, Babak Falsafi, Boris Grot	BuMP: Bulk Memory Access Prediction and Streaming.	MICRO	2014	DBLP DOI BibTeX RDF
1	Yunqi Zhang, Michael A. Laurenzano, Jason Mars, Lingjia Tang	SMiTe: Precise QoS Prediction on Real-System SMT Processors to Improve Utilization in Warehouse Scale Computers.	MICRO	2014	DBLP DOI BibTeX RDF
1	Somayeh Sardashti, André Seznec, David A. Wood 0001	Skewed Compressed Caches.	MICRO	2014	DBLP DOI BibTeX RDF
1	HyoukJoong Lee, Kevin J. Brown, Arvind K. Sujeeth, Tiark Rompf, Kunle Olukotun	Locality-Aware Mapping of Nested Parallel Patterns on GPUs.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jen-Cheng Huang, Joo Hwan Lee, Hyesoon Kim, Hsien-Hsin S. Lee	GPUMech: GPU Performance Modeling Technique Based on Interval Analysis.	MICRO	2014	DBLP DOI BibTeX RDF
1	David Kadjo, Jinchun Kim, Prabal Sharma, Reena Panda, Paul Gratz, Daniel A. Jiménez	B-Fetch: Branch Prediction Directed Prefetching for Chip-Multiprocessors.	MICRO	2014	DBLP DOI BibTeX RDF
1	Fangfei Liu, Ruby B. Lee	Random Fill Cache Architecture.	MICRO	2014	DBLP DOI BibTeX RDF
1	Michael McKeown, Jonathan Balkind, David Wentzlaff	Execution Drafting: Energy Efficiency through Computation Deduplication.	MICRO	2014	DBLP DOI BibTeX RDF
1	Bo Su, Junli Gu, Li Shen 0007, Wei Huang 0004, Joseph L. Greathouse, Zhiying Wang 0003	PPEP: Online Performance, Power, and Energy Prediction Framework and DVFS Space Exploration.	MICRO	2014	DBLP DOI BibTeX RDF
1	Chia-Chen Chou, Aamer Jaleel, Moinuddin K. Qureshi	CAMEO: A Two-Level Memory Organization with Capacity of Main Memory and Flexibility of Hardware-Managed Cache.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jie Chen 0020, Guru Venkataramani	CC-Hunter: Uncovering Covert Timing Channels on Shared Processor Hardware.	MICRO	2014	DBLP DOI BibTeX RDF
1	Prashant J. Nair, David A. Roberts, Moinuddin K. Qureshi	Citadel: Efficiently Protecting Stacked Memory from Large Granularity Failures.	MICRO	2014	DBLP DOI BibTeX RDF
1	Onur Kayiran, Nachiappan Chidambaram Nachiappan, Adwait Jog, Rachata Ausavarungnirun, Mahmut T. Kandemir, Gabriel H. Loh, Onur Mutlu, Chita R. Das	Managing GPU Concurrency in Heterogeneous Architectures.	MICRO	2014	DBLP DOI BibTeX RDF
1	Ji Yun Kim, Christopher Batten	Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists.	MICRO	2014	DBLP DOI BibTeX RDF
1	Natalie D. Enright Jerger, Ajaykumar Kannan, Zimo Li, Gabriel H. Loh	NoC Architectures for Silicon Interposer Systems: Why Pay for more Wires when you Can Get them (from your interposer) for Free?	MICRO	2014	DBLP DOI BibTeX RDF
1	Xuhao Chen 0001, Li-Wen Chang, Christopher I. Rodrigues, Jie Lv, Zhiying Wang 0003, Wen-mei W. Hwu	Adaptive Cache Management for Energy-Efficient GPU Computing.	MICRO	2014	DBLP DOI BibTeX RDF
1	Qing Yi, Qian Wang, Huimin Cui	Specializing Compiler Optimizations through Programmable Composition for Dense Matrix Computations.	MICRO	2014	DBLP DOI BibTeX RDF
1	Daniel Lustig, Michael Pellauer, Margaret Martonosi	Pipe Check: Specifying and Verifying Microarchitectural Enforcement of Memory Consistency Models.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim	Transparent Hardware Management of Stacked DRAM as Part of Memory.	MICRO	2014	DBLP DOI BibTeX RDF
1	Jaewon Lee, Hanhwi Jang, Jangwoo Kim	RpStacks: Fast and Accurate Processor Design Space Exploration Using Representative Stall-Event Stacks.	MICRO	2014	DBLP DOI BibTeX RDF
1	Mark Wilkening, Vilas Sridharan, Si Li, Fritz Previlon, Sudhanva Gurumurthi, David R. Kaeli	Calculating Architectural Vulnerability Factors for Spatial Multi-Bit Transient Faults.	MICRO	2014	DBLP DOI BibTeX RDF
1	Adrian Sampson, Jacob Nelson 0001, Karin Strauss, Luis Ceze	Approximate storage in solid-state memories.	MICRO	2013	DBLP DOI BibTeX RDF
1	Timothy Creech, Aparna Kotha, Rajeev Barua	Efficient multiprogramming for multicores with SCAF.	MICRO	2013	DBLP DOI BibTeX RDF
1	Minsoo Rhu, Michael B. Sullivan 0001, Jingwen Leng, Mattan Erez	A locality-aware memory hierarchy for energy-efficient GPU architectures.	MICRO	2013	DBLP DOI BibTeX RDF
1	Mehrzad Samadi, Janghaeng Lee, Davoud Anoushe Jamshidi, Amir Hormati, Scott A. Mahlke	SAGE: self-tuning approximation for graphics engines.	MICRO	2013	DBLP DOI BibTeX RDF
1	Chao Li 0009, Yang Hu 0001, Ruijin Zhou, Ming Liu 0006, Longjun Liu, Jingling Yuan, Tao Li 0006	Enabling datacenter servers to scale out economically and sustainably.	MICRO	2013	DBLP DOI BibTeX RDF
1	Gennady Pekhimenko, Vivek Seshadri, Yoongu Kim, Hongyi Xin, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry	Linearly compressed pages: a low-complexity, low-latency main memory compression framework.	MICRO	2013	DBLP DOI BibTeX RDF
1	Xuehai Qian, Josep Torrellas, Benjamín Sahelices, Depei Qian	BulkCommit: scalable and fast commit of atomic blocks in a lazy multiprocessor environment.	MICRO	2013	DBLP DOI BibTeX RDF
1	Jishen Zhao, Sheng Li 0007, Doe Hyun Yoon, Yuan Xie 0001, Norman P. Jouppi	Kiln: closing the performance gap between systems with and without persistence support.	MICRO	2013	DBLP DOI BibTeX RDF
1	Wilson W. L. Fung, Tor M. Aamodt	Energy efficient GPU transactional memory via space-time optimizations.	MICRO	2013	DBLP DOI BibTeX RDF
1	Jie Fan 0004, Song Jiang 0001, Jiwu Shu, Youhui Zhang, Weimin Zhen	Aegis: partitioning data block for efficient recovery of stuck-at-faults in phase change memory.	MICRO	2013	DBLP DOI BibTeX RDF
1	Abhisek Pan, Vijay S. Pai	Imbalanced cache partitioning for balanced data-parallel programs.	MICRO	2013	DBLP DOI BibTeX RDF
1	Abhishek Bhattacharjee	Large-reach memory management unit caches.	MICRO	2013	DBLP DOI BibTeX RDF
1	Yusuf Onur Koçberber, Boris Grot, Javier Picorel, Babak Falsafi, Kevin T. Lim, Parthasarathy Ranganathan	Meet the walkers: accelerating index traversals for in-memory databases.	MICRO	2013	DBLP DOI BibTeX RDF
1	Jason Zebchuk, Babak Falsafi, Andreas Moshovos	Multi-grain coherence directories.	MICRO	2013	DBLP DOI BibTeX RDF
1	Jayesh Gaur, Raghuram Srinivasan, Sreenivas Subramoney, Mainak Chaudhuri	Efficient management of last-level caches in graphics processors for 3D scene rendering workloads.	MICRO	2013	DBLP DOI BibTeX RDF
1	Daniel A. Jiménez	Insertion and promotion for tree-based PseudoLRU last-level caches.	MICRO	2013	DBLP DOI BibTeX RDF
1	Hongbo Rong, Hyunchul Park, Cheng Wang 0013, Youfeng Wu	Allocating rotating registers by scheduling.	MICRO	2013	DBLP DOI BibTeX RDF
1	Mohammad Abdel-Majeed, Daniel Wong 0001, Murali Annavaram	Warped gates: gating aware scheduling and power gating for GPGPUs.	MICRO	2013	DBLP DOI BibTeX RDF
1	Aasheesh Kolli, Ali G. Saidi, Thomas F. Wenisch	RDIP: return-address-stack directed instruction prefetching.	MICRO	2013	DBLP DOI BibTeX RDF
1	Yuya Kora, Kyohei Yamaguchi, Hideki Ando	MLP-aware dynamic instruction window resizing for adaptively exploiting both ILP and MLP.	MICRO	2013	DBLP DOI BibTeX RDF
1	Ritesh Parikh, Valeria Bertacco	uDIREC: unified diagnosis and reconfiguration for frugal bypass of NoC faults.	MICRO	2013	DBLP DOI BibTeX RDF
1	Augusto Vega, Alper Buyuktosunoglu, Heather Hanson, Pradip Bose, Srinivasan Ramani	Crank it up or dial it down: coordinated multiprocessor frequency and folding control.	MICRO	2013	DBLP DOI BibTeX RDF
1	Mahdi Nazm Bojnordi, Engin Ipek	DESC: energy-efficient data exchange using synchronized counters.	MICRO	2013	DBLP DOI BibTeX RDF
1	Yiannakis Sazeides, Emre Özer 0001, Danny Kershaw, Panagiota Nikolaou, Marios Kleanthous, Jaume Abella 0001	Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes.	MICRO	2013	DBLP DOI BibTeX RDF
1	Akanksha Jain, Calvin Lin	Linearizing irregular memory accesses for improved correlated prefetching.	MICRO	2013	DBLP DOI BibTeX RDF
1	Matthew K. Farrens, Christos Kozyrakis (eds.)	The 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, Davis, CA, USA, December 7-11, 2013	MICRO	2013	DBLP DOI BibTeX RDF
1	Vivek Seshadri, Yoongu Kim, Chris Fallin, Donghyuk Lee, Rachata Ausavarungnirun, Gennady Pekhimenko, Yixin Luo, Onur Mutlu, Phillip B. Gibbons, Michael A. Kozuch, Todd C. Mowry	RowClone: fast and energy-efficient in-DRAM bulk data copy and initialization.	MICRO	2013	DBLP DOI BibTeX RDF
1	Hyungjun Kim, Arseniy Vitkovskiy, Paul V. Gratz, Vassos Soteriou	Use it or lose it: wear-out and lifetime in future chip multiprocessors.	MICRO	2013	DBLP DOI BibTeX RDF
1	Jason Power, Arkaprava Basu, Junli Gu, Sooraj Puthoor, Bradford M. Beckmann, Mark D. Hill, Steven K. Reinhardt, David A. Wood 0001	Heterogeneous system coherence for integrated CPU-GPU systems.	MICRO	2013	DBLP DOI BibTeX RDF
1	Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte	Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latency.	MICRO	2013	DBLP DOI BibTeX RDF
1	Somayeh Sardashti, David A. Wood 0001	Decoupled compressed cache: exploiting spatial locality for energy-optimized compressed caching.	MICRO	2013	DBLP DOI BibTeX RDF
1	Cansu Kaynak, Boris Grot, Babak Falsafi	SHIFT: shared history instruction fetch for lean-core server processors.	MICRO	2013	DBLP DOI BibTeX RDF
1	Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José M. Llabería	The reuse cache: downsizing the shared last-level cache.	MICRO	2013	DBLP DOI BibTeX RDF
1	Swagath Venkataramani, Vinay K. Chippa, Srimat T. Chakradhar, Kaushik Roy 0001, Anand Raghunathan	Quality programmable vector processors for approximate computing.	MICRO	2013	DBLP DOI BibTeX RDF
1	Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt	Divergence-aware warp scheduling.	MICRO	2013	DBLP DOI BibTeX RDF
1	Raghuraman Balasubramanian, Karthikeyan Sankaralingam	Virtually-aged sampling DMR: unifying circuit failure prediction and circuit failure detection.	MICRO	2013	DBLP DOI BibTeX RDF
1	Andreas Sembrant, Erik Hagersten, David Black-Schaffer	TLC: a tag-less cache for reducing dynamic first level cache energy.	MICRO	2013	DBLP DOI BibTeX RDF
1	Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N. Udipi	Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device.	MICRO	2013	DBLP DOI BibTeX RDF
1	Arslan Zulfiqar, Pranay Koka, Herb Schwetman, Mikko H. Lipasti, Xuezhe Zheng, Ashok V. Krishnamoorthy	Wavelength stealing: an opportunistic approach to channel sharing in multi-chip photonic interconnects.	MICRO	2013	DBLP DOI BibTeX RDF

Publications at "MICRO"( http://dblp.L3S.de/Venues/MICRO )