Search results for "accelerators"

Hits ?▲	Authors	Title	Venue	Year	Link
12	Enrico Calore, Sebastiano Fabio Schifano	FER: A Benchmark for the Roofline Analysis of FPGA Based HPC Accelerators.	IEEE Access	2022	DBLP DOI BibTeX RDF
12	Nikolay N. Nagornov, Pavel Alekseevich Lyakhov, Maria V. Valueva, Maxim V. Bergerman	RNS-Based FPGA Accelerators for High-Quality 3D Medical Image Wavelet Processing Using Scaled Filter Coefficients.	IEEE Access	2022	DBLP DOI BibTeX RDF
12	Sunwoo Kim 0002, Sungkyung Park 0001, Chester Sungchung Park	Optimization of Scatter Network Architectures and Bank Allocations for Sparse CNN Accelerators.	IEEE Access	2022	DBLP DOI BibTeX RDF
12	Asma Baobaid, Mahmoud Méribout, Varun Kumar Tiwari, Juan Pablo Pena	Hardware Accelerators for Real-Time Face Recognition: A Survey.	IEEE Access	2022	DBLP DOI BibTeX RDF
12	Enrico Russo, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Andrea Mineo, Giuseppe Ascia, Vincenzo Catania	DNN Model Compression for IoT Domain-Specific Hardware Accelerators.	IEEE Internet Things J.	2022	DBLP DOI BibTeX RDF
12	Xiu Ma, Huaxiao Liu, Guang-Li Li, Lei Liu	FlexPDA: A Flexible Programming Framework for Deep Learning Accelerators.	J. Comput. Sci. Technol.	2022	DBLP DOI BibTeX RDF
12	Xiaobing Chen, Hao Qi 0004, Shaohui Peng, Yimin Zhuang, Tian Zhi, Yunji Chen	Tetris: A Heuristic Static Memory Management Framework for Uniform Memory Multicore Neural Network Accelerators.	J. Comput. Sci. Technol.	2022	DBLP DOI BibTeX RDF
12	Mohamadreza Zolfagharinejad, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram	Posit Process Element for Using in Energy-Efficient DNN Accelerators.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
12	Wenlong Zhao 0011, Wu Wang, Qiao Wang	Optimization of cosmological N-body simulation with FMM-PM on SIMT accelerators.	J. Supercomput.	2022	DBLP DOI BibTeX RDF
12	Parul Sohal, Rohan Tabish, Ulrich Drepper, Renato Mancuso 0001	Profile-driven memory bandwidth management for accelerators and CPUs in QoS-enabled platforms.	Real Time Syst.	2022	DBLP DOI BibTeX RDF
12	Mohd Saqib Akhoon, Shahrel Azmin Suandi, Abdullah S. Alshahrani, Abdul-Malik H. Y. Saad, Fahad R. Albogamy, Mohd Zaid Bin Abdullah, Sajad A. Loan	High performance accelerators for deep neural networks: A review.	Expert Syst. J. Knowl. Eng.	2022	DBLP DOI BibTeX RDF
12	Dusan Bozilov, Miroslav Knezevic, Ventzislav Nikov	Optimized threshold implementations: securing cryptographic accelerators for low-energy and low-latency applications.	J. Cryptogr. Eng.	2022	DBLP DOI BibTeX RDF
12	Xing Liu 0002, Jianfeng Yang, Chengming Zou, Qimei Chen, Xin Yan 0003, Yuao Chen, Chenran Cai	Collaborative Edge Computing With FPGA-Based CNN Accelerators for Energy-Efficient and Time-Aware Face Tracking System.	IEEE Trans. Comput. Soc. Syst.	2022	DBLP DOI BibTeX RDF
12	Gunjan Rajput, Kunika Naresh Biyani, V. Logashree, Santosh Kumar Vishvakarma	SCAN: Streamlined Composite Activation Function Unit for Deep Neural Accelerators.	Circuits Syst. Signal Process.	2022	DBLP DOI BibTeX RDF
12	Hongmin Huang, Xianghong Hu, Xueming Li, Xiaoming Xiong	An efficient loop tiling framework for convolutional neural network inference accelerators.	IET Circuits Devices Syst.	2022	DBLP DOI BibTeX RDF
12	Alessandro Curcio, Jon Imanol Apiñaniz Aginako, Teresa Cebriano Ramírez, Michael Ehret, Berkahoum Kebladj, Antonia Morabito, Alberto Pérez Delgado, Carlos Salgado-López, Luca Volpe, Giancarlo Gatti	Liouville Theory for Fully Analytic Studies of Transverse Beam Dynamics in Laser-Plasma Ion Accelerators.	Symmetry	2022	DBLP DOI BibTeX RDF
12	Siqin Liu, Talha Furkan Canan, Harshavardhan Chenji, Soumyasanta Laha, Savas Kaya, Avinash Karanth	Exploiting Wireless Technology for Energy-Efficient Accelerators With Multiple Dataflows and Precision.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
12	Leonardo Rezende Juracy, Alexandre de Morais Amory, Fernando Gehm Moraes	A Fast, Accurate, and Comprehensive PPA Estimation of Convolutional Hardware Accelerators.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
12	Brunno Alves Abreu, Guilherme Paim, Mateus Grellert, Sergio Bampi	C2PAx: Complexity-Aware Constant Parameter Approximation for Energy-Efficient Tree-Based Machine Learning Accelerators.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
12	Yuan Cao 0003, Yanze Wu, Lan Qin, Shuai Chen, Chip-Hong Chang	Area, Time and Energy Efficient Multicore Hardware Accelerators for Extended Merkle Signature Scheme.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
12	Zhaokun Jing, Bonan Yan, Yuchao Yang, Ru Huang	VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators.	IEEE Trans. Circuits Syst. I Regul. Pap.	2022	DBLP DOI BibTeX RDF
12	Michele Caselli, Peter Debacker, Andrea Boni	Memory Devices and A/D Interfaces: Design Tradeoffs in Mixed-Signal Accelerators for Machine Learning Applications.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
12	Youngbeom Jung, Hyeonuk Kim, Yeongjae Choi, Lee-Sup Kim	Quantization-Error-Robust Deep Neural Network for Embedded Accelerators.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
12	Muhammad Ibtesam, Umair Saeed Solangi, Jinuk Kim, Muhammad Adil Ansari, Sungju Park	Reliable Test Architecture With Test Cost Reduction for Systolic-Based DNN Accelerators.	IEEE Trans. Circuits Syst. II Express Briefs	2022	DBLP DOI BibTeX RDF
12	Shun Li, Yuxuan Tao, Enhao Tang, Ting Xie, Ruiqi Chen	A survey of field programmable gate array (FPGA)-based graph convolutional neural network accelerators: challenges and opportunities.	PeerJ Comput. Sci.	2022	DBLP DOI BibTeX RDF
12	Niko Zurstraßen, Lukas Jünger 0001, Tim Kogel, Holger Keding, Rainer Leupers	AMAIX In-Depth: A Generic Analytical Model for Deep Learning Accelerators.	Int. J. Parallel Program.	2022	DBLP DOI BibTeX RDF
12	Steve Keckler 0001, Dejan S. Milojicic	Accelerators.	Computer	2022	DBLP DOI BibTeX RDF
12	Georgios Zervakis 0001, Iraklis Anagnostopoulos, Sami Salamin, Ourania Spantidi, Isai Roman-Ballesteros, Jörg Henkel, Hussam Amrouch	Thermal-Aware Design for Approximate DNN Accelerators.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Guilherme Paim, Hussam Amrouch, Leandro M. G. Rocha, Brunno Abreu, Eduardo Antônio César da Costa, Sergio Bampi, Jörg Henkel	A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Arash AziziMazreah, Lizhong Chen	Polymorphic Accelerators for Deep Neural Networks.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Duseok Kang, Donghyun Kang, Soonhoi Ha	Multi-Bank On-Chip Memory Management Techniques for CNN Accelerators.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Serena Curzel, Nicolas Bohm Agostini, Vito Giovanni Castellana, Marco Minutoli, Ankur Limaye, Joseph B. Manzano, Jeff Zhang 0001, David Brooks 0001, Gu-Yeon Wei, Fabrizio Ferrandi, Antonino Tumeo	End-to-End Synthesis of Dynamically Controlled Machine Learning Accelerators.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Yandong Luo, Yuan-Chun Luo, Shimeng Yu	A Ferroelectric-Based Volatile/Non-Volatile Dual-Mode Buffer Memory for Deep Neural Network Accelerators.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Marco Minutoli, Vito Giovanni Castellana, Nicola Saporetti, Stefano Devecchi, Marco Lattuada 0001, Pietro Fezzardi, Antonino Tumeo, Fabrizio Ferrandi	Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics.	IEEE Trans. Computers	2022	DBLP DOI BibTeX RDF
12	Seyed Morteza Nabavinejad, Sherief Reda, Masoumeh Ebrahimi	Coordinated Batching and DVFS for DNN Inference on GPU Accelerators.	IEEE Trans. Parallel Distributed Syst.	2022	DBLP DOI BibTeX RDF
12	Konstantinos Iliakis, Helga Timko, Sotirios Xydis, Panagiotis Tsapatsaris, Dimitrios Soudris	Enabling Large Scale Simulations for Particle Accelerators.	IEEE Trans. Parallel Distributed Syst.	2022	DBLP DOI BibTeX RDF
12	Rui Xu, Sheng Ma, Yaohua Wang, Yang Guo 0003, Dongsheng Li 0001, Yuran Qiao	Heterogeneous Systolic Array Architecture for Compact CNNs Hardware Accelerators.	IEEE Trans. Parallel Distributed Syst.	2022	DBLP DOI BibTeX RDF
12	Raju Machupalli, Masum Hossain, Mrinal Kr. Mandal	Review of ASIC accelerators for deep neural network.	Microprocess. Microsystems	2022	DBLP DOI BibTeX RDF
12	Giovanni Agosta, Marco Aldinucci, Carlos Álvarez 0001, Roberto Ammendola, Yasir Arfat, Olivier Beaumont, Massimo Bernaschi, Andrea Biagioni, Tommaso Boccali, Bérenger Bramas, Carlo Brandolese, Barbara Cantalupo, Mauro Carrozzo, Daniele Cattaneo 0002, Alessandro Celestini, Massimo Celino, Iacopo Colonnelli, Paolo Cretaro, Pasqua D'Ambra, Marco Danelutto, Roberto Esposito, Lionel Eyraud-Dubois, Antonio Filgueras, William Fornaciari, Ottorino Frezza, Andrea Galimberti, Francesco Giacomini, Brice Goglin, Daniele Gregori, Abdou Guermouche, Francesco Iannone, Michal Kulczewski, Francesca Lo Cicero, Alessandro Lonardo, Alberto Riccardo Martinelli, Michele Martinelli, Xavier Martorell, Giuseppe Massari, Simone Montangero, Gianluca Mittone, Raymond Namyst, Ariel Oleksiak, Paolo Palazzari, Pier Stanislao Paolucci, Federico Reghenzani, Cristian Rossi, Sergio Saponara, Francesco Simula, Federico Terraneo, Samuel Thibault, Massimo Torquati, Matteo Turisini, Piero Vicini, Miquel Vidal, Davide Zoni, Giuseppe Zummo	Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach.	Microprocess. Microsystems	2022	DBLP DOI BibTeX RDF
12	Cheng-Hung Lin, Jin-Kun Shen, Cheng-Kai Lu	Reconfigurable Turbo and Low-Density Parity-Check (LDPC) Decoding Accelerators for Powerline Communications.	J. Circuits Syst. Comput.	2022	DBLP DOI BibTeX RDF
12	Arjun Chaudhuri, Jonti Talukdar, Fei Su, Krishnendu Chakrabarty	Functional Criticality Analysis of Structural Faults in AI Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Qilin Zheng, Xingchen Li, Yijin Guan, Zongwei Wang, Yimao Cai, Yiran Chen 0001, Guangyu Sun 0003, Ru Huang	PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Ying Wang 0001, Yintao He, Long Cheng 0003, Huawei Li 0001, Xiaowei Li 0001	A Fast Precision Tuning Solution for Always-On DNN Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Mehdi Sadi, Ujjwal Guin	Test and Yield Loss Reduction of AI and Deep Learning Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Salim Ullah, Semeen Rehman, Muhammad Shafique 0001, Akash Kumar 0001	High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Elbruz Ozen, Alex Orailoglu	Architecting Decentralization and Customizability in DNN Accelerators for Hardware Defect Adaptation.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Ching-Yuan Chen, Krishnendu Chakrabarty	Efficient Identification of Critical Faults in Memristor-Based Inferencing Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Ang Li, Huiyu Mo, Wenping Zhu, Qiang Li, Shouyi Yin, Shaojun Wei, Leibo Liu	BitCluster: Fine-Grained Weight Quantization for Load-Balanced Bit-Serial Neural Network Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Sairam Sri Vatsavai, Ishan G. Thakkar	Photonic Reconfigurable Accelerators for Efficient Inference of CNNs With Mixed-Sized Tensors.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Ourania Spantidi, Georgios Zervakis 0001, Iraklis Anagnostopoulos, Jörg Henkel	Energy-Efficient DNN Inference on Approximate Accelerators Through Formal Property Exploration.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Arjun Chaudhuri, Chunsheng Liu, Xiaoxin Fan, Krishnendu Chakrabarty	C-Testing and Efficient Fault Localization for AI Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Muhammad Ibtesam, Umair Saeed Solangi, Jinuk Kim, Muhammad Adil Ansari, Sungju Park	Highly Efficient Test Architecture for Low-Power AI Accelerators.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2022	DBLP DOI BibTeX RDF
12	Adedamola Wuraola, Nitish D. Patel	Resource efficient activation functions for neural network accelerators.	Neurocomputing	2022	DBLP DOI BibTeX RDF
12	Jiansong Li, Xueying Wang, Xiaobing Chen, Guangli Li, Xiao Dong, Peng Zhao 0008, Xianzhi Yu, Yongxin Yang, Wei Cao, Lei Liu 0030, Xiaobing Feng 0002	An Application-oblivious Memory Scheduling System for DNN Accelerators.	ACM Trans. Archit. Code Optim.	2022	DBLP DOI BibTeX RDF
12	Christof Schlaak, Tzung-Han Juang, Christophe Dubach	Memory-Aware Functional IR for Higher-Level Synthesis of Accelerators.	ACM Trans. Archit. Code Optim.	2022	DBLP DOI BibTeX RDF
12	Prasanth Chatarasi, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, Tushar Krishna, Vivek Sarkar	Marvel: A Data-Centric Approach for Mapping Deep Learning Operators on Spatial Accelerators.	ACM Trans. Archit. Code Optim.	2022	DBLP DOI BibTeX RDF
12	Wei-Ting Lin, Hsiang-Yun Cheng, Chia-Lin Yang, Meng-Yao Lin, Kai Lien, Han-Wen Hu, Hung-Sheng Chang, Hsiang-Pang Li, Meng-Fan Chang, Yen-Ting Tsou, Chin-Fu Nien	DL-RSIM: A Reliability and Deployment Strategy Simulation Framework for ReRAM-based CNN Accelerators.	ACM Trans. Embed. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Subhankar Pal, Swagath Venkataramani, Viji Srinivasan, Kailash Gopalakrishnan	OnSRAM: Efficient Inter-Node On-Chip Scratchpad Management in Deep Learning Accelerators.	ACM Trans. Embed. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Nader Khammassi, Imran Ashraf, J. van Someren 0001, Razvan Nane, Anna M. Krol, M. A. Rol, Lingling Lao, Koen Bertels, Carmen G. Almudéver	OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Ge Li, Mohit Tiwari, Michael Orshansky	Power-based Attacks on Spatial DNN Accelerators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Yulhwa Kim, Hyungjun Kim, Jae-Joon Kim	Extreme Partial-Sum Quantization for Analog Computing-In-Memory Neural Network Accelerators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Mario Barbareschi, Salvatore Barone, Alberto Bosio, Jie Han 0001, Marcello Traiola	A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Jianhui Han, Xiang Fei, Zhaolin Li, Youhui Zhang	Polyhedral-Based Compilation Framework for In-Memory Neural Network Accelerators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Weijia Wang 0002, Bill Lin 0001	Optimizing 3D U-Net-based Brain Tumor Segmentation with Integer-arithmetic Deep Learning Accelerators.	ACM J. Emerg. Technol. Comput. Syst.	2022	DBLP DOI BibTeX RDF
12	Nihat Mert Cicek, Xipeng Shen, Ozcan Ozturk 0001	Energy Efficient Boosting of GEMM Accelerators for DNN via Reuse.	ACM Trans. Design Autom. Electr. Syst.	2022	DBLP DOI BibTeX RDF
12	Atefeh Sohrabizadeh, Cody Hao Yu, Min Gao 0003, Jason Cong	AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators.	ACM Trans. Design Autom. Electr. Syst.	2022	DBLP DOI BibTeX RDF
12	Rachmad Vidya Wicaksana Putra, Muhammad Abdullah Hanif, Muhammad Shafique 0001	SoftSNN: Low-Cost Fault Tolerance for Spiking Neural Network Accelerators under Soft Errors.	CoRR	2022	DBLP DOI BibTeX RDF
12	Hsu-Tung Shih, Tian-Sheuan Chang	Zebra: Memory Bandwidth Reduction for CNN Accelerators With Zero Block Regularization of Activation Maps.	CoRR	2022	DBLP DOI BibTeX RDF
12	Maarten Molendijk, Floran de Putter, Henk Corporaal	Low- and Mixed-Precision Inference Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Ali Alshaarawy, Amirali Amirsoleimani, Roman Genov	PRUNIX: Non-Ideality Aware Convolutional Neural Network Pruning for Memristive Accelerators.	CoRR	2022	DBLP BibTeX RDF
12	Seung-Hun Chung, Tarek S. Abdelrahman	A Compilation Flow for the Generation of CNN Inference Accelerators on FPGAs.	CoRR	2022	DBLP DOI BibTeX RDF
12	Midia Reshadi, David Gregg	LOCAL: Low-Complex Mapping Algorithm for Spatial DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Zhijing Li 0002, Yuwei Ye, Stephen Neuendorffer, Adrian Sampson	Compiler-Driven Simulation of Reconfigurable Hardware Accelerators.	CoRR	2022	DBLP BibTeX RDF
12	Ahmet Inci, Siri Garudanagiri Virupaksha, Aman Jain, Venkata Vivek Thallam, Ruizhou Ding, Diana Marculescu	QAPPA: Quantization-Aware Power, Performance, and Area Modeling of DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Pradnya Khalate, Xin-Chuan Wu, Shavindra P. Premaratne, Justin Hogaboam, Adam Holmes, Albert T. Schmitz, Gian Giacomo Guerreschi, Xiang Zou, Anne Y. Matsuura	An LLVM-based C++ Compiler Toolchain for Variational Hybrid Quantum-Classical Algorithms and Quantum Accelerators.	CoRR	2022	DBLP BibTeX RDF
12	Abhishek Tyagi, Yiming Gan, Shaoshan Liu, Bo Yu 0014, Paul N. Whatmough, Yuhao Zhu 0001	Thales: Formulating and Estimating Architectural Vulnerability Factors for DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Gabriele Montanaro, Andrea Galimberti, Ernesto Colizzi, Davide Zoni	Hardware-Software Co-Design of BIKE with HLS-Generated Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Sheng-Chun Kao, Xiaoyu Huang, Tushar Krishna	DNNFuser: Generative Pre-Trained Transformer as a Generalized Mapper for Layer Fusion in DNN Accelerators.	CoRR	2022	DBLP BibTeX RDF
12	Zheyu Yan, Xiaobo Sharon Hu, Yiyu Shi 0001	Computing-In-Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Device Variations Be Disastrous?	CoRR	2022	DBLP DOI BibTeX RDF
12	Jonathan Kern, Sébastien Henwood, Gonçalo Mordido, Elsa Dupraz, Abdeldjalil Aïssa-El-Bey, Yvon Savaria, François Leduc-Primeau	MemSE: Fast MSE Prediction for Noisy Memristor-Based DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Giorgos Armeniakos, Georgios Zervakis 0001, Dimitrios Soudris, Jörg Henkel	Hardware Approximate Techniques for Deep Neural Network Accelerators: A Survey.	CoRR	2022	DBLP DOI BibTeX RDF
12	Jan Klhufek, Vojtech Mrazek	ArithsGen: Arithmetic Circuit Generator for Hardware Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Tom Glint, Chandan Kumar Jha 0001, Manu Awasthi, Joycee Mekie	A Fresh Perspective on DNN Accelerators by Performing Holistic Analysis Across Paradigms.	CoRR	2022	DBLP DOI BibTeX RDF
12	Stylianos I. Venieris, Christos-Savvas Bouganis, Nicholas D. Lane	Multi-DNN Accelerators for Next-Generation AI Systems.	CoRR	2022	DBLP DOI BibTeX RDF
12	Bo-Yuan Huang 0001, Steven Lyubomirsky, Yi Li, Mike He, Thierry Tambe, Gus Henry Smith, Akash Gaonkar, Vishal Canumalla, Gu-Yeon Wei, Aarti Gupta, Zachary Tatlock, Sharad Malik	Specialized Accelerators and Compiler Flows: Replacing Accelerator APIs with a Formal Software/Hardware Interface.	CoRR	2022	DBLP DOI BibTeX RDF
12	Sadasivan Shankar, Albert Reuther	Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications.	CoRR	2022	DBLP DOI BibTeX RDF
12	Axel Huebl, Rémi Lehe, Chad E. Mitchell, Ji Qiang, Robert D. Ryne, Ryan T. Sandberg, Jean-Luc Vay	Next Generation Computational Tools for the Modeling and Design of Particle Accelerators at Exascale.	CoRR	2022	DBLP DOI BibTeX RDF
12	Sadiq M. Sait, Aiman El-Maleh, Mohammad Altakrouri, Ahmad Shawahna	Optimization of FPGA-based CNN Accelerators Using Metaheuristics.	CoRR	2022	DBLP DOI BibTeX RDF
12	Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun	Temperature-Aware Monolithic 3D DNN Accelerators for Biomedical Applications.	CoRR	2022	DBLP DOI BibTeX RDF
12	Indhumathi Kandaswamy, Saurabh Farkya, Zachary Daniels, Gooitzen van der Wal, Aswin Raghavan, Yuzheng Zhang, Jun Hu, Michael Lomnitz, Michael A. Isnardi, David C. Zhang, Michael R. Piacentino	Real-time Hyper-Dimensional Reconfiguration at the Edge using Hardware Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Dmitrii Kuvaiskii, Gaurav Kumar, Mona Vij	Computation offloading to hardware accelerators in Intel SGX and Gramine Library OS.	CoRR	2022	DBLP DOI BibTeX RDF
12	Raghuram S	Reduced Softmax Unit for Deep Neural Network Accelerators.	CoRR	2022	DBLP BibTeX RDF
12	Abhijit Das 0002, Enrico Russo, Maurizio Palesi	Multi-Objective Hardware-Mapping Co-Optimisation for Multi-Tenant DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Johannes Kirschner, Mojmír Mutný, Andreas Krause 0001, Jaime Coello de Portugal, Nicole Hiller, Jochem Snuverink	Tuning Particle Accelerators with Safety Constraints using Bayesian Optimization.	CoRR	2022	DBLP DOI BibTeX RDF
12	Junxue Zhang 0001, Xiaodian Cheng, Liu Yang 0008, Jinbin Hu, Ximeng Liu, Kai Chen 0005	SoK: Fully Homomorphic Encryption Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Sebastian Werner 0001, Trever Schirmer	Hardless: A Generalized Serverless Compute Architecture for Hardware Processing Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Sheng-Chun Kao, Michael Pellauer, Angshuman Parashar, Tushar Krishna	DiGamma: Domain-aware Genetic Algorithm for HW-Mapping Co-optimization for DNN Accelerators.	CoRR	2022	DBLP BibTeX RDF
12	Payman Behnam, Uday Kamal, Saibal Mukhopadhyay	An Algorithm-Hardware Co-design Framework to Overcome Imperfections of Mixed-signal DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Jung Hwan Heo, Arash Fayyazi, Amirhossein Esmaili, Massoud Pedram	Sparse Periodic Systolic Dataflow for Lowering Latency and Power Dissipation of Convolutional Neural Network Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF
12	Axel Stjerngren, Perry Gibson, José Cano 0001	Bifrost: End-to-End Evaluation and Optimization of Reconfigurable DNN Accelerators.	CoRR	2022	DBLP DOI BibTeX RDF