Search results for "lookahead"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
10	Oscal T.-C. Chen, Robin R.-B. Sheen, S. Wang	A low-power adder operating on effective dynamic data ranges.	IEEE Trans. Very Large Scale Integr. Syst.	2002	DBLP DOI BibTeX RDF
10	Hoang Q. Dao, Vojin G. Oklobdzija	Performance Comparison of VLSI Adders Using Logical Effort.	PATMOS	2002	DBLP DOI BibTeX RDF
10	Gilbert Chen, Boleslaw K. Szymanski	Lookback: a new way of exploiting parallelism in discrete event simulation.	PADS	2002	DBLP DOI BibTeX RDF
10	Bryan Ford	Packrat parsing: : simple, powerful, lazy, linear time, functional pearl.	ICFP	2002	DBLP DOI BibTeX RDF	scannerless parsing, top-down parsing, Haskell, backtracking, memoization, lexical analysis, parser combinators
10	Shabbir H. Batterywala, Narendra V. Shenoy, William Nicholls, Hai Zhou 0001	Track assignment: a desirable intermediate step between global routing and detailed routing.	ICCAD	2002	DBLP DOI BibTeX RDF
10	Daqing Yang, Gouri Nair, Balaji Sivaramakrishnan, Harishkumar Jayakumar, Arunabha Sen	Round Robin with Look Ahead: A New Scheduling Algorithm for Bluetoot.	ICPP Workshops	2002	DBLP DOI BibTeX RDF
10	Zhipei Chi, Keshab K. Parhi	High speed VLSI architecture design for block turbo decoder.	ISCAS (1)	2002	DBLP DOI BibTeX RDF
10	Ha Yoon Song, Sung Hyun Cho, Sang-Yong Han	A Null Message Count of a Conservative Parallel Simulation.	VECPAR	2002	DBLP DOI BibTeX RDF
10	Berthe Y. Choueiry, Amy M. Davis	Dynamic Bundling: Less Effort for More Solutions.	SARA	2002	DBLP DOI BibTeX RDF
10	Suhwan Kim, Marios C. Papaefthymiou	True single-phase adiabatic circuitry.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
10	Javier D. Bruguera, Tomás Lang	Multilevel reverse most-significant carry computation.	IEEE Trans. Very Large Scale Integr. Syst.	2001	DBLP DOI BibTeX RDF
10	Prashant Saxena, C. L. Liu 0001	Optimization of the maximum delay of global interconnects duringlayer assignment.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
10	Jeff B. Pelz, Roxanne L. Canosa, Jason S. Babcock, Jenn Barber	Visual perception in familiar, complex tasks.	ICIP (2)	2001	DBLP DOI BibTeX RDF
10	Sebastian Sardiña	Local Conditional High-Level Robot Programs.	LPAR	2001	DBLP DOI BibTeX RDF
10	Hao Wu 0001, Richard Fujimoto, George F. Riley	Experiences parallelizing a commercial network simulator.	WSC	2001	DBLP DOI BibTeX RDF
10	Deborah Vakas, John Prince, H. Ric Blacksten, Chuck Burdick	Commander behavior and course of action selection in JWARS.	WSC	2001	DBLP DOI BibTeX RDF
10	Marius-Calin Silaghi, Djamila Sam-Haroud, Boi Faltings	Search Techniques for Non-linear Constraint Satisfaction Problems with Inequalities.	AI	2001	DBLP DOI BibTeX RDF
10	Jason Liu 0001, David M. Nicol, King Tan	Lock-free scheduling of logical processes in parallel simulation.	Workshop on Parallel and Distributed Simulation	2001	DBLP DOI BibTeX RDF
10	Bu-Sung Lee, Wentong Cai 0001, Junlan Zhou	A causality based time management mechanism for federated simulation.	Workshop on Parallel and Distributed Simulation	2001	DBLP DOI BibTeX RDF	causal order delivery, direct dependency, happen-before relationship, time stamp ordering, multicasting, distributed simulation, time management
10	Yves Lespérance	On the Epistemic Feasibility of Plans in Multiagent Systems Specifications.	ATAL	2001	DBLP DOI BibTeX RDF
10	Ronald D. Blanton, John P. Hayes	On the design of fast, easily testable ALU's.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
10	Scott Hauck, Matthew M. Hosler, Thomas W. Fry	High-performance carry chains for FPGA's.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
10	Christian Pacha, Uwe Auer, Christian Burwick, Peter Glösekötter, Andreas Brennemann, Werner Prost, Franz-Josef Tegude, Karl F. Goser	Threshold logic circuit design of parallel adders using resonant tunneling devices.	IEEE Trans. Very Large Scale Integr. Syst.	2000	DBLP DOI BibTeX RDF
10	Shantanu Dutt, Wenyong Deng	Probability-based approaches to VLSI circuit partitioning.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2000	DBLP DOI BibTeX RDF
10	Ahmed F. Shalash, Keshab K. Parhi	Power Efficient Folding of Pipelined LMS Adaptive Filters with Applications to Wireline Digital Communications.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF	LMS design, power efficient folding, wireline communications, traveling sales person, relaxed LMS, low power design, greedy algorithm, algorithm transformation
10	Maybin K. Muyeba, John A. Keane	Interestingness in Attribute-Oriented Induction (AOI): Multiple-Level Rule Generation.	PKDD	2000	DBLP DOI BibTeX RDF
10	Yang Xiang, Xiaohua Hu 0001, Nick Cercone, Howard J. Hamilton	Learning Pseudo-independent Models: Analytical and Experimental Results.	AI	2000	DBLP DOI BibTeX RDF	data mining, learning, uncertainty, belief networks
10	Andrea Prati 0001	Exploring multimedia applications locality to improve cache performance.	ACM Multimedia	2000	DBLP DOI BibTeX RDF
10	Margaret L. Loper, Richard M. Fujimoto	Pre-sampling as an approach for exploiting temporal uncertainty.	PADS	2000	DBLP DOI BibTeX RDF
10	Boon-Ping Gan, Yoke-Hean Low, Sanjay Jain 0003, Stephen John Turner, Wentong Cai 0001, Wen-Jing Hsu, Shell-Ying Huang	Load balancing for conservative simulation on shared memory multiprocessor systems.	PADS	2000	DBLP DOI BibTeX RDF
10	Adelinde M. Uhrmacher, K. Gugler	Distributed, parallel simulation of multiple, deliberative agents.	PADS	2000	DBLP DOI BibTeX RDF
10	Gilles Audemard, Belaid Benhamou, Laurent Henocque	Two Techniques to Improve Finite Model Search.	CADE	2000	DBLP DOI BibTeX RDF
10	José Fernández Ramos, Alfonso Gago Bohórquez	Two Operand Binary Adders with Threshold Logic.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	neural networks, logic design, computer arithmetic, Threshold logic, threshold gate, binary adders
10	Chi-Hung Chi, Jun-Li Yuan	Design Considerations of High Performance Data Cache with Prefetching.	Euro-Par	1999	DBLP DOI BibTeX RDF
10	Lokesh Bajaj, Rajive L. Bagrodia, Richard A. Meyer	Case Study: Parallelizing a Sequential Simulation Model.	Workshop on Parallel and Distributed Simulation	1999	DBLP DOI BibTeX RDF
10	Richard Fujimoto	Exploiting Temporal Uncertainty in Parallel and Distributed Simulations.	Workshop on Parallel and Distributed Simulation	1999	DBLP DOI BibTeX RDF
10	Yossi Matias, Nasir M. Rajpoot, Süleyman Cenk Sahinalp	The Effect of Flexible Parsing for Dynamic Dictionary Based Data Compression.	Data Compression Conference	1999	DBLP DOI BibTeX RDF
10	Harry Hsieh, Felice Balarin	Synchronous equivalence for embedded systems: a tool for design exploration.	ICCAD	1999	DBLP DOI BibTeX RDF
10	Robin R.-B. Sheen, S. Wang, Oscal T.-C. Chen, Ruey-Liang Ma	Power consumption of a 2's complement adder minimized by effective dynamic data ranges.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
10	R. D. (Shawn) Blanton	IDDQ-Testability of Tree Circuits.	VLSI Design	1999	DBLP DOI BibTeX RDF
10	Richard Kelsey, William D. Clinger, Jonathan Rees	Revised5 Report on the Algorithmic Language Scheme.	ACM SIGPLAN Notices	1998	DBLP DOI BibTeX RDF	SCHEME
10	Tzuoo-Hawn Yeh, Cheng-Ming Kuo, Chin-Laung Lei, Hsu-Chun Yen	Competitive Analysis of On-Line Disk Scheduling.	Theory Comput. Syst.	1998	DBLP DOI BibTeX RDF
10	Srinivas R. Kadaba, Saul B. Gelfand, Michael P. Fitz, Rangasami L. Kashyap	Soft output interference suppression in TDMA wireless communications.	Wirel. Networks	1998	DBLP DOI BibTeX RDF
10	Srinivas R. Kadaba, Saul B. Gelfand, Rangasami L. Kashyap	Recursive estimation of images using non-Gaussian autoregressive models.	IEEE Trans. Image Process.	1998	DBLP DOI BibTeX RDF
10	Scott Hauck, Matthew M. Hosler, Thomas W. Fry	High-Performance Carry Chains for FPGAs.	FPGA	1998	DBLP DOI BibTeX RDF
10	Donald F. Beal, Martin C. Smith	First Results from Using Temporal Difference Learning in Shogi.	Computers and Games	1998	DBLP DOI BibTeX RDF	Temporal Difference, Learning, Search, Game-playing, Minimax, Shogi
10	Suhwan Kim, Marios C. Papaefthymiou	True single-phase energy-recovering logic for low-power, high-speed VLSI.	ISLPED	1998	DBLP DOI BibTeX RDF
10	Peter Martini, Markus Rümekasten, Jens Tölle	Tolerant Synchronization for Distributed Simulations of Interconnected Computer Networks.	Workshop on Parallel and Distributed Simulation	1997	DBLP DOI BibTeX RDF
10	Ravichandran Ramachandran, Shih-Lien Lu	Efficient arithmetic using self-timing.	IEEE Trans. Very Large Scale Integr. Syst.	1996	DBLP DOI BibTeX RDF
10	Joseph Thomas	Pipelined systolic architectures for DLMS adaptive filtering.	J. VLSI Signal Process.	1996	DBLP DOI BibTeX RDF
10	Srinivas R. Kadaba, Saul B. Gelfand, Rangasami L. Kashyap	Bayesian decision feedback for segmentation of binary images.	IEEE Trans. Image Process.	1996	DBLP DOI BibTeX RDF
10	Radharamanan Radhakrishnan, Timothy J. McBrayer, Krishnan Subramani, Malolan Chetlur, Vijay Balakrishnan, Philip A. Wilsey	A Comparative Analysis of Various Time Warp Algorithms Implemented in the WARPED Simulation Kernel.	Annual Simulation Symposium	1996	DBLP DOI BibTeX RDF
10	Edwin Naroska, Uwe Schwiegelshohn	A New Scheduling Method for Parallel Discrete-Event Simulation.	Euro-Par, Vol. II	1996	DBLP DOI BibTeX RDF
10	Sashikanth Chandrasekaran, Mark D. Hill	Optimistic Simulation of Parallel Architectures Using Program Executables.	Workshop on Parallel and Distributed Simulation	1996	DBLP DOI BibTeX RDF	Parallel Machines, Optimistic Simulation, State Saving, Direct Execution
10	Gin Yee, Carl Sechen	Clock-Delayed Domino for Adder and Combinational Logic Desig.	ICCD	1996	DBLP DOI BibTeX RDF
10	Uming Ko, T. Balsara, Wai Lee	Low-power design techniques for high-performance CMOS adders.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
10	Uming Ko, Poras T. Balsara	Short-circuit power driven gate sizing technique for reducing power dissipation.	IEEE Trans. Very Large Scale Integr. Syst.	1995	DBLP DOI BibTeX RDF
10	Bruce J. McKenzie, Corey Yeatman, Lorraine De Vere	Error Repair in Shift-Reduce Parsers	ACM Trans. Program. Lang. Syst.	1995	DBLP DOI BibTeX RDF	Bison, least cost, shift-reduce, error recovery, Yacc
10	Chetana Nagendra, Robert Michael Owens, Mary Jane Irwin	Power-delay characteristics of CMOS adders.	IEEE Trans. Very Large Scale Integr. Syst.	1994	DBLP DOI BibTeX RDF
10	Terence John Parr, Russell W. Quong	Adding Semantic and Syntactic Predicates To LL(k): pred-LL(k).	CC	1994	DBLP DOI BibTeX RDF
10	Simon S. Lam, Simon Chow, David K. Y. Yau	An Algorithm for Lossless Smoothing of MPEG Video.	SIGCOMM	1994	DBLP DOI BibTeX RDF
10	David M. Nicol	The Cost of Conservative Synchronization in Parallel Discrete Event Simulations.	J. ACM	1993	DBLP DOI BibTeX RDF	conservative synchronization
10	Dinesh Gadwal, Jim E. Greer, Gordon I. McCalla	Tutoring bishop-pawn endgames: An experiment in using knowledge-based chess as a domain for intelligent tutoring.	Appl. Intell.	1993	DBLP DOI BibTeX RDF	Knowledge-based chess, planning, diagnosis, intelligent tutoring systems
10	Rabin A. Sugumar, Santosh G. Abraham	Efficient Simulation of Caches under Optimal Replacement with Applications to Miss Characterization.	SIGMETRICS	1993	DBLP DOI BibTeX RDF
10	Thomas K. Callaway, Earl E. Swartzlander Jr.	Estimating the power consumption of CMOS adders.	IEEE Symposium on Computer Arithmetic	1993	DBLP DOI BibTeX RDF
10	David M. Nicol	Conservative Parallel Simulation of Priority Class Queuing Networks.	IEEE Trans. Parallel Distributed Syst.	1992	DBLP DOI BibTeX RDF	priority class, conservative synchronization protocol, parallelsimulation, parallel algorithms, protocols, queueing theory, queuing networks
10	José Fortes Gálvez	Generating LR(1) Parsers of Small Size.	CC	1992	DBLP DOI BibTeX RDF
10	David M. Nicol	Performance Bounds on Parallel Self-Initiating Discrete-Event Simulations.	ACM Trans. Model. Comput. Simul.	1991	DBLP DOI BibTeX RDF	parallel simulation, synchronization protocol
10	Brian D. Lee, Vojin G. Oklobdzija	Improved CLA scheme with optimized delay.	J. VLSI Signal Process.	1991	DBLP DOI BibTeX RDF
10	Moon-Jung Chung, Yunmo Chung	Efficient parallel logic simulation techniques for the connection machine.	SC	1990	DBLP DOI BibTeX RDF
10	Naoyoshi Tamura, Hiroaki Numazaki, Hozumi Tanaka	Table-Driven Bottom Up Parser in Prolog.	LP	1989	DBLP DOI BibTeX RDF
10	David Spector	Efficient full LR(I) parser generation.	ACM SIGPLAN Notices	1988	DBLP DOI BibTeX RDF
10	J. M. Daper	Compiling on horizon.	SC	1988	DBLP DOI BibTeX RDF
10	Rand Methfessel	Implementing an Access and Object Oriented Paradigm in a Language That Supports Neither.	ACM SIGPLAN Notices	1987	DBLP DOI BibTeX RDF	C
10	Ronald T. House	Thoughts on "Extended Pascal - Illustrative Examples".	ACM SIGPLAN Notices	1987	DBLP DOI BibTeX RDF	Pascal
10	Doron Tal	A multiprogramming stand alone systolic data flow machine (abstract only).	ACM Conference on Computer Science	1987	DBLP DOI BibTeX RDF
10	Phillip B. Gibbons, Steven S. Muchnick	Efficient instruction scheduling for a pipelined architecture.	SIGPLAN Symposium on Compiler Construction	1986	DBLP DOI BibTeX RDF
10	Steven S. Muchnick, Phillip B. Gibbons	Efficient instruction scheduling for a pipelined architecture (with retrospective)	Best of PLDI	1986	DBLP DOI BibTeX RDF
10	David R. Fuchs, Donald E. Knuth	Optimal Prepaging and Font Caching.	ACM Trans. Program. Lang. Syst.	1985	DBLP DOI BibTeX RDF
10	David R. Jefferson	Virtual Time.	ACM Trans. Program. Lang. Syst.	1985	DBLP DOI BibTeX RDF
10	Joseph C. H. Park, Kwang-Moo Choe, C. H. Chang	A New Analysis of LALR Formalisms.	ACM Trans. Program. Lang. Syst.	1985	DBLP DOI BibTeX RDF
10	Morris E. Kranc	A Separate Compilation Facility for Pascal.	ACM SIGPLAN Notices	1982	DBLP DOI BibTeX RDF
10	David R. Barach, David H. Taenzer	A Technique for Finding Storage Allocation Errors in C-language Programs.	ACM SIGPLAN Notices	1982	DBLP DOI BibTeX RDF
10	Kuo-Chung Tai	Noncanonical SLR(1) Grammars.	ACM Trans. Program. Lang. Syst.	1979	DBLP DOI BibTeX RDF