Search results for "VHDL"

Hits ?▲	Authors	Title	Venue	Year	Link
14	Abdullah Al Muhit, Md. Shabiul Islam, Masuri Othman	Design and Analysis of Discrete Wavelet Transform(DWT) for Image Compression using VHDL.	PDPTA	2005	DBLP BibTeX RDF
14	Caitriona Carr	Automatic generation of VHDL-AMS from UML representations of mixed signal systems.		2005	RDF
14	Jan Gutsche	Effizienter Entwurfsfluss durch neue Verfahren der Logiksynthese und Technologieabbildung von VHDL-Hardwarebeschreibungen		2005	RDF
14	Georgios Ch. Sirakoulis	A TCAD system for VLSI implementation of the CVD process using VHDL.	Integr.	2004	DBLP DOI BibTeX RDF
14	Yanhui Tong, Tet Hin Yeap, Jean-Yves Chouinard	VHDL implementation of a turbo decoder with log-MAP-based iterative decoding.	IEEE Trans. Instrum. Meas.	2004	DBLP DOI BibTeX RDF
14	Richard E. Haskell, Darrin M. Hanna	A VHDL--Forth Core for FPGAs.	Microprocess. Microsystems	2004	DBLP DOI BibTeX RDF
14	Richard Perdriau, Mohammed Ramdani, Jean-Luc Levant, Eric Tinlot, Anne-Marie Trullemans-Anckaert	An EMC-oriented VHDL-AMS simulation methodology for dynamic current activity assessment.	Microelectron. J.	2004	DBLP DOI BibTeX RDF
14	Paul Molitor, Jörg Ritter 0002	VHDL - eine Einführung.		2004	RDF
14	Bret Woz, Andreas E. Savakis	A VHDL MPEG-7 shape descriptor extractor.	FPGA	2004	DBLP DOI BibTeX RDF
14	Jiri Gaisler	An open-source VHDL IP library with Plug&Play configuration.	IFIP Congress Topical Sessions	2004	DBLP DOI BibTeX RDF
14	Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Tom J. Kazmierski, Jerzy Baranowski	Efficient Mixed-Domain Behavioural Modeling of Ferromagnetic Hysteresis Implemented in VHDL-AMS.	DATE	2004	DBLP DOI BibTeX RDF
14	Jan Gutsche, Hans-Ulrich Post	Erhöhung der Synthesegenauigkeit durch Sprachraumerweiterung synthesefähiger sequentieller VHDL-Beschreibungen.	MBMV	2004	DBLP BibTeX RDF
14	Jan Borgosz	Object Oriented Programming Paradigms for the VHDL.	FPL	2004	DBLP DOI BibTeX RDF
14	Patricia Desgreys, Yannick Hervé, Jean Oudinot, S. Snaidero, Mohamed Karray	SoC modelling for virtual prototyping with VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	Elena Martín, Laura Barrachina, Carles Ferrer 0001	Practical Case Example of Inertial MEMS Modeling with VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	C. T. Carr, T. Martin McGinnity, L. J. McDaid	VHDL-AMS code gneration from UML structural representations.	FDL	2004	DBLP BibTeX RDF
14	E.-P. Wagner, Joachim Haase	Monte Carlo Simulation Using VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	M. Garon, Jean-Francois Diouris, Serge Toutain, Emmanuel Cottais, Yide Wang	Behavioural modelling of a power amplifier in VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	Yannick Hervé, Ahmed Fakhfakh	Requirements and Verifications through an extension of VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	Foudil Dadouche, Annick Alexandre, Bertrand Granado, Andréa Pinna 0001, Patrick Garda	A VHDL-AMS Configuration for Active Pixel Sensors.	FDL	2004	DBLP BibTeX RDF
14	Peter R. Wilson, Tom J. Kazmierski	A novel approach to mixed-domain behavioral modeling of ferromagnetic hysteresis in VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	J. Shields, Ernst Christen	Mixed Nets, Conversion Models, and VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	Rachid Guelaz, Djilali Kourtiche, Yannick Hervé, Mustapha Nadi	Modeling of the ultrasonic nonlinear propagation with VHDL-AMS.	FDL	2004	DBLP BibTeX RDF
14	S. Loued, Ahmed Fakhfakh, Mourad Loulou, Nouri Masmoudi, Yannick Hervé	High Level Self-adjusted Models and VHDL-AMS; Application for a freguency synthesizer modelling.	FDL	2004	DBLP BibTeX RDF
14	Marco Zorzi, Francesco Franzè, Nicolò Speciale, Guido Masetti	A tool for the integration of new VHDL-AMS models in SPICE.	ISCAS (4)	2004	DBLP BibTeX RDF
14	Mark Zwolinski, Andrew D. Brown	Behavioural modelling of analogue faults in VHDL-AMS - a case study.	ISCAS (5)	2004	DBLP BibTeX RDF
14	Peter R. Wilson, J. Neil Ross, Andrew D. Brown, Andrew J. Rushton	Multiple domain behavioral modeling using VHDL-AMS.	ISCAS (5)	2004	DBLP BibTeX RDF
14	Tom J. Kazmierski, Fazrena A. Hamid	Behavioral modelling of RF filters in VHDL-AMS for automated architectural and parametric optimization.	ISCAS (1)	2004	DBLP BibTeX RDF
14	Patrick Robinson, Tai-Chi Lee, Erik Henne	Framework for Executing VHDL Code on FPGA.	PDPTA	2004	DBLP BibTeX RDF
14	Bernhard Peischl, Franz Wotawa	Are Error Traces Enough for Automated Fault Localization in VHDL Designs?	WISES	2004	DBLP BibTeX RDF
14	Odysseas Efremides, Michael P. Bekakos, David J. Evans 0001	Integrated classifier simulator and neurochip VHDL implementation.	Int. J. Comput. Math.	2003	DBLP DOI BibTeX RDF
14	Georgios Ch. Sirakoulis, Ioannis Karafyllidis, Adonios Thanailakis	A CAD system for the construction and VLSI implementation of Cellular Automata algorithms using VHDL.	Microprocess. Microsystems	2003	DBLP DOI BibTeX RDF
14	Daniel Gil, Joaquin Gracia, Juan Carlos Baraza, Pedro J. Gil	Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system.	Microelectron. J.	2003	DBLP DOI BibTeX RDF
14	Bernhard Peischl, Franz Wotawa	Modeling State in Software Debugging of VHDL-RTL Designs - A Model-Based Diagnosis Approach	CoRR	2003	DBLP BibTeX RDF
14	Haifeng Zhou, Wei Cao, Zhenghui Lin	Formal semantics analysis for VHDL RTL synthesis.	Comput. Syst. Sci. Eng.	2003	DBLP BibTeX RDF
14	B. Mongellaz, François Marc, Yves Danto	Ageing simulation of MOSFET circuit using a VHDL-AMS behavioural modelling: an experimental case study.	Microelectron. Reliab.	2003	DBLP DOI BibTeX RDF
14	Peter J. Ashenden	VHDL-200X: The Next Revision.	IEEE Des. Test Comput.	2003	DBLP BibTeX RDF
14	Anneliese Amschler Andrews, Andrew O'Fallon, Tom Chen 0001	A Rule-Based Software Testing Method for VHDL Models.	VLSI-SOC	2003	DBLP BibTeX RDF
14	Nazeih Botros, Adil Akaaboune, Jaafar Alghazo	Modeling and Realization of the Human Growth Hormone Secretion Mechanism using VHDL and FPGAs.	Modelling, Simulation, and Optimization	2003	DBLP BibTeX RDF
14	Richard Sandige, Albert A. Liddicoat, Bryan Mealy	Synchronous State Machine Design Methodologies with VHDL and Implementations using CAD Tools.	Modelling, Simulation, and Optimization	2003	DBLP BibTeX RDF
14	Fanny Garnier, Wolfgang Ecker	Incremental Design: A VHDL based Case Study.	MBMV	2003	DBLP BibTeX RDF
14	Marco Beyer, Hans-Ulrich Post	VHDL-Hardware/Software-Board-Level-Simulation innerhalb eines FPGA/DSP-Entwicklungssystems.	MBMV	2003	DBLP BibTeX RDF
14	Joachim Haase	Regeln für die Erstellung von VHDL-AMS-Modellen.	MBMV	2003	DBLP BibTeX RDF
14	Laurent Capocchi, Fabrice Bernardi, Dominique Federici, Paul Bisgambiglia	Transformation of VHDL descriptions into DEVS models for fault modeling.	SMC	2003	DBLP DOI BibTeX RDF
14	François Marc, B. Mongellaz, Yves Danto	Reliability simulation of electronic circuits with VHDL-AMS.	FDL	2003	DBLP BibTeX RDF
14	Jean Oudinot, G. Overton, Aitor Endemaño Isasi, Marc P. Y. Desmulliez, Jean-Yves Fourniols, Sylvaine Muratet	Micromotor Simulation with VHDL-AMS.	FDL	2003	DBLP BibTeX RDF
14	Alex Doboli, Hua Tang, Hui Zhang 0057	Towards High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS Specifications.	FDL	2003	DBLP BibTeX RDF
14	Fabien Mieyeville, Matthieu Briere, Ian O'Connor, Frédéric Gaffiot, Gilles Jacquemod	A VHDL-AMS library of hierarchical optoelectronic device models.	FDL	2003	DBLP BibTeX RDF
14	Joachim Haase	Rules for Analog and Mixed-Signal VHDL-AMS Modeling.	FDL	2003	DBLP BibTeX RDF
14	Guillaume Monnerie, Noëlle Lewis, Dominique Dallet, Hervé Levi, M. Robbe	Modelling of transient noise sources with VHDL-AMS and normative spectral interpretation.	FDL	2003	DBLP BibTeX RDF
14	Ahmed Fakhfakh, Mourad Loulou, Nesrine Ksentini, Nouri Masmoudi, Jean-Jacques Charlot	VHDL-AMS Behavioural Modelling of a Switched Current Sigma-Delta Modulator.	FDL	2003	DBLP BibTeX RDF
14	Fazrena A. Hamid, Tom J. Kazmierski	FIST - a VHDL-AMS based architectural synthesis strategy for integrated high-frequency analogue filters.	FDL	2003	DBLP BibTeX RDF
14	Rachid Guelaz, Djilali Kourtiche, Mustapha Nadi	A behavioural description with VHDL-AMS of a piezo-ceramic ultrasound transducer based on the Redwood's model.	FDL	2003	DBLP BibTeX RDF
14	Rafael Castro-López, Francisco V. Fernández 0001, Fernando Medeiro, Ángel Rodríguez-Vázquez	Accurate VHDL-based simulation of Sigma-Delta modulators.	ISCAS (4)	2003	DBLP DOI BibTeX RDF
14	S. R. Seward, Parag K. Lala	Fault Injection in Digital Logic Circuits at the VHDL Level.	IOLTS	2003	DBLP DOI BibTeX RDF
14	Ignacio Bravo Muñoz, Álvaro Hernández, Alfredo Gardel Vicente, Raúl Mateos, José Luis Lázaro, V. Diaz	Different proposals to the multiplication of 3×3 vision mask in VHDL for FPGA's.	ETFA (2)	2003	DBLP DOI BibTeX RDF
14	Raúl Mateos, Alfredo Gardel Vicente, Álvaro Hernández, Ignacio Bravo Muñoz, C. Garcia	Lossless implementation in VHDL of an image wavelet transform.	ETFA (2)	2003	DBLP DOI BibTeX RDF
14	Mohamed Karray, Patricia Desgreys, Jean-Jacques Charlot	A CMOS inverter TIA modeling with VHDL-AMS.	IWSOC	2003	DBLP DOI BibTeX RDF
14	Jochen Mades	Strukturelle Konsistenz und Regularisierung von VHDL-AMS-Modellen.		2003	RDF
14	Nazeih M. Botros, Jian Yang, Philip Feinsilver, René Schott	Hardware realization of Krawtchouk transform using VHDL modeling and FPGAs.	IEEE Trans. Ind. Electron.	2002	DBLP DOI BibTeX RDF
14	Mustapha Bourahla, Mohamed Benmohamed	Predicate Abstraction and Refinement for Model Checking VHDL State Machines.	FMICS	2002	DBLP DOI BibTeX RDF
14	László Varga 0003, Gábor Hosszú, Ferenc Kovács	Design Procedure Based on VHDL Language Transformations.	VLSI Design	2002	DBLP DOI BibTeX RDF
14	Ralph Bucher, Durga Misra	A Synthesizable VHDL Model of the Exact Solution for Three-dimensional Hyperbolic Positioning System.	VLSI Design	2002	DBLP DOI BibTeX RDF
14	Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon	Fault security analysis of CMOS VLSI circuits using defect-injectable VHDL models.	Integr.	2002	DBLP DOI BibTeX RDF
14	Liyi Xiao, Yizheng Ye, Bin Li	A New Synchronization Algorithm for VHDL-AMS Simulation.	J. Comput. Sci. Technol.	2002	DBLP DOI BibTeX RDF
14	B. Mongellaz, François Marc, N. Milet-Lewis, Yves Danto	Contribution to ageing simulation of complex analogue circuit using VHDL-AMS behavioural modelling language.	Microelectron. Reliab.	2002	DBLP DOI BibTeX RDF
14	Juan Carlos Baraza, Joaquin Gracia, Daniel Gil, Pedro J. Gil	A prototype of a VHDL-based fault injection tool: description and application.	J. Syst. Archit.	2002	DBLP DOI BibTeX RDF
14	Peter J. Ashenden	The designer's guide to VHDL, 2nd Edition.		2002	RDF
14	Peter R. Wilson, J. Neil Ross, Mark Zwolinski, Andrew D. Brown, Yavuz Kiliç	Behavioural Modelling of Operational Amplifier Faults Using VHDL-AMS.	DATE	2002	DBLP DOI BibTeX RDF
14	David A. Sigüenza-Tortosa, Jari Nurmi	VHDL-based simulation environment for Proteo NoC.	HLDVT	2002	DBLP DOI BibTeX RDF
14	Mathias Schmalisch, Hagen Ploog, Dirk Timmermann	Laufzeitoptimierte VHDL Bibliothek zur Verifikation und Simulation Kryptographischer Prozessoren.	MBMV	2002	DBLP BibTeX RDF
14	Gert Voland	Is VHDL-AMS suited to meet the Challenges of Deep Submicron Integration?.	ESM	2002	DBLP BibTeX RDF
14	Jean Oudinot, Serge Scotti, Jean Ravatin, Audrey Le-clercq, Jacky Lebrun	Full Transceiver Circuit Simulation using VHDL-AMS.	ESM	2002	DBLP BibTeX RDF
14	João M. S. Alcântara, Antônio C. C. Vieira, Federico Gálvez-Durand, Vladimir Castro Alves	A Methodology for Dynamic Power Consumption Estimation Using VHDL Descriptions.	SBCCI	2002	DBLP BibTeX RDF
14	Ahmed Fakhfakh, Hervé Levi, N. Milet-Lewis, Yves Danto	Behavioral Modeling of Analogue and Mixed Integrated Systems with VHDL-AMS for RF Applications.	SBCCI	2002	DBLP BibTeX RDF
14	Christian Côté, Zeljko Zilic	Automated SystemC to VHDL translation in hardware/software codesign.	ICECS	2002	DBLP DOI BibTeX RDF
14	Raja Maghrebi, Mohamed Masmoudi	Multi-slope analog-to-digital converters modeling based on VHDL-AMS.	SMC	2002	DBLP DOI BibTeX RDF
14	Ivan de Paúl, Miquel Roca 0001, Oscar Calvo, Raul Velazco	SEU fault injection in simulation environments: example of VHDL configuration on FPGA device.	LATW	2002	DBLP BibTeX RDF
14	Norbert Bierlox	Ein VHDL-Koprozessorkern für das exakte Skalarprodukt.		2002	RDF
14	Daryl Stewart	A uniform semantics for verilog and VHDL suitable for both simulation and verification		2002	RDF
14	Krishnaprasad Thirunarayan, Robert L. Ewing	Structural Operational Semantics for a Portable Subset of Behavioral VHDL-93.	Formal Methods Syst. Des.	2001	DBLP DOI BibTeX RDF
14	Masoud Sabaei, Mehdi Dehghan 0001, Karim Faez, Majid Ahmadi	A VHDL-based HW/SW cosimulation of communication systems.	Comput. Electr. Eng.	2001	DBLP DOI BibTeX RDF
14	Mark Zwolinski	A technique for transparent fault injection and simulation in VHDL.	Microelectron. Reliab.	2001	DBLP DOI BibTeX RDF
14	Peter J. Ashenden	VHDL Standards.	IEEE Des. Test Comput.	2001	DBLP BibTeX RDF
14	Marco Rona, Gunter Krampl	A VHDL-based virtual test concept for pre-silicon test-program debug.	ETW	2001	DBLP DOI BibTeX RDF
14	Andrew J. Erickson, Muhammad E. Shaaban, Kenneth W. Hsu, Roy Czernikowski	VHDL design for hardware assistance of fractal image compression.	VCIP	2001	DBLP BibTeX RDF
14	J. Casal-Gimenez, Les T. Walczowski	Distributed simulation of VHDL using Jini.	ICECS	2001	DBLP DOI BibTeX RDF
14	Donald B. Shaw, Dhamin Al-Khalili, Côme Rozon	Accurate CMOS Bridge Fault Modeling with Neural Network-Based VHDL Saboteurs.	ICCAD	2001	DBLP DOI BibTeX RDF
14	Dragos Lungeanu, C.-J. Richard Shi	Distributed Event-Driven Simulation of VHDL-SPICE Mixed-Signal Circuits.	ICCD	2001	DBLP DOI BibTeX RDF
14	Joaquin Gracia, Juan Carlos Baraza, Daniel Gil, Pedro J. Gil	A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques.	IOLTW	2001	DBLP DOI BibTeX RDF
14	Raoul Velazco, A. Bragagnini, Oscar Calvo	Upset-like fault injection in VHDL descriptions: A Method and Preliminary Results.	LATW	2001	DBLP BibTeX RDF
14	Volodymyr Beletskyy, Krzysztof Kraska	Method and Validation for VHDL Case Statement Optimization.	ACS	2001	DBLP DOI BibTeX RDF
14	Massimiliano Erba, Roberto Rossi, Valentino Liberali, Andrea Tettamanzi	An Evolutionary Approach to Automatic Generation of VHDL Code for Low-Power Digital Filters.	EuroGP	2001	DBLP DOI BibTeX RDF
14	Ireneusz Janiszewski, Bernhard Hoppe, Hermann Meuth	VHDL-Based Design and Design Methodology for Reusable High Performance Direct Digital Frequency Synthesizers.	DAC	2001	DBLP DOI BibTeX RDF
14	Christophe Lallement, François Pêcheux, Yannick Hervé	A VHDL-AMS Case Study: The Incremental Design of an Efficient 3rd Generation MOS Model of a Deep Sub Micron Transistor.	VLSI-SOC	2001	DBLP BibTeX RDF
14	Vanderlei Moraes Rodrigues, Dominique Borrione, Philippe Georgelin	Using the ACL2 Theorem Prover to Reason about VHDL Components.	RITA	2000	DBLP BibTeX RDF
14	Markus Stumptner, Franz Wotawa	Using Model-Based Reasoning for Locating Faults in VHDL Designs.	Künstliche Intell.	2000	DBLP BibTeX RDF
14	Yang Xun, Liu Mingye	Cycle-Based Algorithm Used to Accelerate VHDL Simulation.	J. Comput. Sci. Technol.	2000	DBLP DOI BibTeX RDF
14	Lhaohua Pierre	Induction-Oriented Verification of Replicated Architectures Described in VHDL.	J. Circuits Syst. Comput.	2000	DBLP DOI BibTeX RDF
14	Franz Wotawa	Debugging VHDL designs using model-based reasoning.	Artif. Intell. Eng.	2000	DBLP DOI BibTeX RDF