Search results for "crossbar"

Hits ?▲	Authors	Title	Venue	Year	Link
15	Christopher H. Bennett, Djaafar Chabi, Theo Cabaret, Bruno Jousselme, Vincent Derycke, Damien Querlioz, Jacques-Olivier Klein	Supervised learning with organic memristor devices and prospects for neural crossbar arrays.	NANOARCH	2015	DBLP DOI BibTeX RDF
15	Miguel Angel Lastras-Montaño, Amirali Ghofrani, Kwang-Ting Cheng	Architecting energy efficient crossbar-based memristive random-access memories.	NANOARCH	2015	DBLP DOI BibTeX RDF
15	Peyman Pouyan, Esteve Amat, Antonio Rubio 0001	Analysis and design of an adaptive proactive reconfiguration approach for memristive crossbar memories.	NANOARCH	2015	DBLP DOI BibTeX RDF
15	Raqibul Hasan, Chris Yakopcic, Tarek M. Taha	Ex-situ training of dense memristor crossbar for neuromorphic applications.	NANOARCH	2015	DBLP DOI BibTeX RDF
15	Onur Tunali, Mustafa Alton	Defect tolerance in diode, FET, and four-terminal switch based nano-crossbar arrays.	NANOARCH	2015	DBLP DOI BibTeX RDF
15	Yuhao Wang 0002, Xin Li 0001, Hao Yu 0001, Leibin Ni, Wei Yang, Chuliang Weng, Junfeng Zhao 0003	Optimizing Boolean embedding matrix for compressive sensing in RRAM crossbar.	ISLPED	2015	DBLP DOI BibTeX RDF
15	Cagla Cakir, Ron Ho, Jon K. Lexau, Ken Mai	High-efficiency crossbar switches using capacitively coupled signaling.	ISLPED	2015	DBLP DOI BibTeX RDF
15	Alvaro Velasquez, Sumit Kumar Jha 0001	Fault-tolerant in-memory crossbar computing using quantified constraint solving.	ICCD	2015	DBLP DOI BibTeX RDF
15	Lei Xie 0005, Hoang Anh Du Nguyen, Mottaqiallah Taouil, Koen Bertels, Said Hamdioui	Fast boolean logic mapped on memristor crossbar.	ICCD	2015	DBLP DOI BibTeX RDF
15	Jury Sandrini, Tugba Demirci, Maxime Thammasack, Davide Sacchetto, Yusuf Leblebici	Low-voltage read/write circuit design for transistorless ReRAM crossbar arrays in 180nm CMOS technology.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Ioannis Vourkas, Dimitrios Stathis 0001, Georgios Ch. Sirakoulis	XbarSim: An educational simulation tool for memristive crossbar-based circuits.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Ioannis Vourkas, Dimitrios Stathis 0001, Georgios Ch. Sirakoulis	Live demonstration: XbarSim: An educational simulation tool for memristive crossbar-based circuits.	ISCAS	2015	DBLP DOI BibTeX RDF
15	Beiye Liu, Wei Wen, Yiran Chen 0001, Xin Li 0001, Chi-Ruo Wu, Tsung-Yi Ho	EDA Challenges for Memristor-Crossbar based Neuromorphic Computing.	ACM Great Lakes Symposium on VLSI	2015	DBLP DOI BibTeX RDF
15	Xiaoping Wang, Min Chen, Yi Shen, Xiaoya Hu	A new crossbar architecture based on two serial memristors with threshold.	IJCNN	2015	DBLP DOI BibTeX RDF
15	Irina Kataeva, Farnood Merrikh-Bayat, Elham Zamanidoost, Dmitri B. Strukov	Efficient training algorithms for neural networks based on memristive crossbar circuits.	IJCNN	2015	DBLP DOI BibTeX RDF
15	Manu V. Nair, Piotr Dudek	Gradient-descent-based learning in memristive crossbar arrays.	IJCNN	2015	DBLP DOI BibTeX RDF
15	Peyman Pouyan, Esteve Amat, Antonio Rubio 0001	Statistical lifetime analysis of memristive crossbar matrix.	DTIS	2015	DBLP DOI BibTeX RDF
15	Hai (Helen) Li, Chenchen Liu, Bonan Yan, Chaofei Yang, Linghao Song, Zheng Li, Yiran Chen 0001, Weijie Zhu, Qing Wu 0002, Hao Jiang 0014	Spiking-based matrix computation by leveraging memristor crossbar array.	CISDA	2015	DBLP DOI BibTeX RDF
15	Boxun Li, Lixue Xia, Peng Gu, Yu Wang 0002, Huazhong Yang	Merging the interface: power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system.	DAC	2015	DBLP DOI BibTeX RDF
15	Garrett S. Rose, Chauncey A. Meade	Performance analysis of a memristive crossbar PUF design.	DAC	2015	DBLP DOI BibTeX RDF
15	Chenchen Liu, Bonan Yan, Chaofei Yang, Linghao Song, Zheng Li, Beiye Liu, Yiran Chen 0001, Hai Li 0001, Qing Wu 0002, Hao Jiang 0014	A spiking neuromorphic design with resistive crossbar.	DAC	2015	DBLP DOI BibTeX RDF
15	Devrim Sahin	A locality preserving one-sided binary tree - Crossbar switch wiring design algorithm.	CISS	2015	DBLP DOI BibTeX RDF
15	A. Yavuz Oruç	One-sided binary tree-crossbar switching for on-chip networks.	CISS	2015	DBLP DOI BibTeX RDF
15	Ling Chen 0010, Chuandong Li 0001, Tingwen Huang, Yiran Chen 0001, Xin Wang 0028	Memristor crossbar-based unsupervised image learning.	Neural Comput. Appl.	2014	DBLP DOI BibTeX RDF
15	Bo Yuan 0006, Bin Li 0025, Thomas Weise 0001, Xin Yao 0001	A New Memetic Algorithm With Fitness Approximation for the Defect-Tolerant Logic Mapping in Crossbar-Based Nanoarchitectures.	IEEE Trans. Evol. Comput.	2014	DBLP DOI BibTeX RDF
15	Yuhao Wang 0002, Hao Yu 0001, Wei Zhang 0012	Nonvolatile CBRAM-Crossbar-Based 3-D-Integrated Hybrid Memory for Data Retention.	IEEE Trans. Very Large Scale Integr. Syst.	2014	DBLP DOI BibTeX RDF
15	Dongkook Park, Aniruddha S. Vaidya, Akhilesh Kumar, Mani Azimi	MoDe-X: Microarchitecture of a Layout-Aware Modular Decoupled Crossbar for On-Chip Interconnects.	IEEE Trans. Computers	2014	DBLP DOI BibTeX RDF
15	Weisheng Zhao, Jean-Michel Portal, Wang Kang 0001, Mathieu Moreau, Yue Zhang 0010, Hassen Aziza, Jacques-Olivier Klein, Zhaohao Wang, Damien Querlioz, Damien Deleruyelle, Marc Bocquet, Dafine Ravelosona, Christophe Muller, Claude Chappert	Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.	J. Parallel Distributed Comput.	2014	DBLP DOI BibTeX RDF
15	Mohamed Mazouzi, Oussama Kallel, Ihsen Ben Mbarek, Salem Hasnaoui, Mohamed Abid	SCPN modeling and comparative performance evaluation of bussed and crossbar-based switched fabric CAN.	Comput. Stand. Interfaces	2014	DBLP DOI BibTeX RDF
15	Iman Esmaili Paeen Afrakoti, Saeed Bagheri Shouraki, Bahar Haghighat	An Optimal Hardware Implementation for Active Learning Method Based on Memristor Crossbar Structures.	IEEE Syst. J.	2014	DBLP DOI BibTeX RDF
15	Djaafar Chabi, Damien Querlioz, Weisheng Zhao, Jacques-Olivier Klein	Robust learning approach for neuro-inspired nanoscale crossbar architecture.	ACM J. Emerg. Technol. Comput. Syst.	2014	DBLP DOI BibTeX RDF
15	Bo Yuan 0006, Bin Li 0025	A Fast Extraction Algorithm for Defect-Free Subcrossbar in Nanoelectronic Crossbar.	ACM J. Emerg. Technol. Comput. Syst.	2014	DBLP DOI BibTeX RDF
15	Morteza Gholipour, Nasser Masoumi	Graphene nanoribbon crossbar architecture for low power and dense circuit implementations.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
15	Mohammad Bavandpour, Saeed Bagheri Shouraki, Hamid Soleimani, Arash Ahmadi, Bernabé Linares-Barranco	Spiking neuro-fuzzy clustering system and its memristor crossbar based implementation.	Microelectron. J.	2014	DBLP DOI BibTeX RDF
15	Anne Siemon, Stephan Menzel, Rainer Waser, Eike Linn	A Complementary Resistive Switch-based Crossbar Array Adder.	CoRR	2014	DBLP BibTeX RDF
15	Arun Kant Sharma, Shiva Asapu, Akshay Kumar Salimath, Bahniman Ghosh	Read and Write Analysis for Balanced Pattern Memristor Crossbar Array.	J. Low Power Electron.	2014	DBLP DOI BibTeX RDF
15	Javier Martín-Martínez, Carmen G. Almudéver, Albert Crespo-Yepes, Rosana Rodríguez, Montserrat Nafría, Antonio Rubio 0001	A shapeshifting evolvable hardware mechanism based on reconfigurable memFETs crossbar architecture.	Microelectron. Reliab.	2014	DBLP DOI BibTeX RDF
15	Veeresh Hongal, Raghavendra Kotikalapudi, Minsu Choi	Design, Test, and Repair of MLUT (Memristor Look-Up Table) Based Asynchronous Nanowire Reconfigurable Crossbar Architecture.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2014	DBLP DOI BibTeX RDF
15	Farnood Merrikh-Bayat, Farshad Merrikh-Bayat, Saeed Bagheri Shouraki	The Neuro-Fuzzy Computing System With the Capacity of Implementation on a Memristor Crossbar and Optimization-Free Hardware Training.	IEEE Trans. Fuzzy Syst.	2014	DBLP DOI BibTeX RDF
15	Janusz A. Starzyk, Basawaraj	Memristor Crossbar Architecture for Synchronous Neural Networks.	IEEE Trans. Circuits Syst. I Regul. Pap.	2014	DBLP DOI BibTeX RDF
15	Miao Hu, Hai Li 0001, Yiran Chen 0001, Qing Wu 0002, Garrett S. Rose, Richard W. Linderman	Memristor Crossbar-Based Neuromorphic Computing System: A Case Study.	IEEE Trans. Neural Networks Learn. Syst.	2014	DBLP DOI BibTeX RDF
15	Stefano Ambrogio, Simone Balatti, Daniele Ielmini, D. C. Gilmer	Analytical modelling and leakage optimization in complementary resistive switch (CRS) crossbar arrays.	ESSDERC	2014	DBLP DOI BibTeX RDF
15	Yibo Li, Wenbo Chen 0002, Wenchao Lu, Rashmi Jha	Impact of coupling capacitance on read operation of RRAM devices in 1D1R crossbar architectures.	MWSCAS	2014	DBLP DOI BibTeX RDF
15	Alvaro Velasquez, Sumit Kumar Jha 0001	Parallel computing using memristive crossbar networks: Nullifying the processor-memory bottleneck.	IDT	2014	DBLP DOI BibTeX RDF
15	Raqibul Hasan, Tarek M. Taha	Memristor Crossbar Based Programmable Interconnects.	ISVLSI	2014	DBLP DOI BibTeX RDF
15	Gabriele Miorandi, Alberto Ghiribaldi, Steven M. Nowick, Davide Bertozzi	Crossbar replication vs. sharing for virtual channel flow control in asynchronous NoCs: A comparative study.	VLSI-SoC	2014	DBLP DOI BibTeX RDF
15	Boxun Li, Yu Wang 0002, Yiran Chen 0001, Hai (Helen) Li, Huazhong Yang	ICE: Inline calibration for memristor crossbar-based computing engine.	DATE	2014	DBLP DOI BibTeX RDF
15	Tasho D. Tashev, Vladimir V. Monov	Computer simulations of a modified MiMa-algorithm for a crossbar packet switch.	CompSysTech	2014	DBLP DOI BibTeX RDF
15	Fugui Zhong, Bo Yuan 0006, Bin Li 0025	Hybridization of NSGA-II with greedy re-assignment for variation tolerant logic mapping on nano-scale crossbar architectures.	GECCO (Companion)	2014	DBLP DOI BibTeX RDF
15	Djaafar Chabi, Zhaohao Wang, Weisheng Zhao, Jacques-Olivier Klein	On-chip supervised learning rule for ultra high density neural crossbar using memristor for synapse and neuron.	NANOARCH	2014	DBLP DOI BibTeX RDF
15	Eike Linn	Memristive nano-crossbar arrays enabling novel computing paradigms.	ISCAS	2014	DBLP DOI BibTeX RDF
15	Tarek M. Taha, Raqibul Hasan, Chris Yakopcic	Memristor crossbar based multicore neuromorphic processors.	SoCC	2014	DBLP DOI BibTeX RDF
15	Komal Singh, Chitrakant Sahu, Jawar Singh	Linearly separable pattern classification using memristive crossbar circuits.	ISQED	2014	DBLP DOI BibTeX RDF
15	Zhaohao Wang, Weisheng Zhao, Wang Kang 0001, Youguang Zhang, Jacques-Olivier Klein, Claude Chappert	Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture.	IJCNN	2014	DBLP DOI BibTeX RDF
15	Raqibul Hasan, Tarek M. Taha	Enabling back propagation training of memristor crossbar neuromorphic processors.	IJCNN	2014	DBLP DOI BibTeX RDF
15	Tasho D. Tashev, Vladimir V. Monov	A Numerical Study of the Upper Bound of the Throughput of a Crossbar Switch Utilizing MiMa-Algorithm.	NMA	2014	DBLP DOI BibTeX RDF
15	Supriya Rao, Supreet Jeloka, Reetuparna Das, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge	VIX: Virtual Input Crossbar for Efficient Switch Allocation.	DAC	2014	DBLP DOI BibTeX RDF
15	Kyungtae Kang, Kyung-Joon Park, Lui Sha, Qixin Wang	Design of a crossbar VOQ real-time switch with clock-driven scheduling for a guaranteed delay bound.	Real Time Syst.	2013	DBLP DOI BibTeX RDF
15	Andrea Bianco, Paolo Giaccone, Guido Masera, Marco Ricca	Power Control for Crossbar-Based Input-Queued Switches.	IEEE Trans. Computers	2013	DBLP DOI BibTeX RDF
15	Paolo Lugli, Ahmed Mahmoud, György Csaba, Michael Algasinger, Martin Stutzmann, Ulrich Rührmair	Physical unclonable functions based on crossbar arrays for cryptographic applications.	Int. J. Circuit Theory Appl.	2013	DBLP DOI BibTeX RDF
15	Shuo Wang, Jianwei Dai, Lei Wang 0003	Hybrid Redundancy for Defect Tolerance in Molecular Crossbar Memory.	ACM J. Emerg. Technol. Comput. Syst.	2013	DBLP DOI BibTeX RDF
15	Masoud Zamani, Hanieh Mirzaei, Mehdi Baradaran Tahoori	ILP formulations for variation/defect-tolerant logic mapping on crossbar nano-architectures.	ACM J. Emerg. Technol. Comput. Syst.	2013	DBLP DOI BibTeX RDF
15	Morteza Gholipour, Nasser Masoumi	Design investigation of nanoelectronic circuits using crossbar-based nanoarchitectures.	Microelectron. J.	2013	DBLP DOI BibTeX RDF
15	Mei-Hsiang Tsai, Po-Yang Hsu, Hung-Yi Li, Yi-Huang Hung, Yi-Yu Liu	Routability optimization for crossbar-switch structured ASIC design.	ACM Trans. Design Autom. Electr. Syst.	2013	DBLP DOI BibTeX RDF
15	Mrigank Sharad, Deliang Fan, Kaushik Roy 0001	Ultra Low Power Associative Computing with Spin Neurons and Resistive Crossbar Memory	CoRR	2013	DBLP BibTeX RDF
15	Chris Yakopcic, Tarek M. Taha, Guru Subramanyam	Hybrid Crossbar Architecture for a Memristor Based Cache	CoRR	2013	DBLP BibTeX RDF
15	Iman Esmaili Paeen Afrakoti, Saeed Bagheri Shouraki, Farnood Merrikh-Bayat	Using memristor crossbar structure to implement a novel adaptive real time fuzzy modeling algorithm.	CoRR	2013	DBLP BibTeX RDF
15	Bosheng Liu, Zhiqiang You, Xiangrao Li, Jishun Kuang, Zheng Qin	Comparator and half adder design using complementary resistive switches crossbar.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
15	Janusz A. Starzyk, Basawaraj	Comparison of Two Memristor Based Neural Network Learning Schemes for Crossbar Architecture.	IWANN (1)	2013	DBLP DOI BibTeX RDF
15	Ioannis Vourkas, Dimitrios Stathis 0001, Georgios Ch. Sirakoulis	Improved read voltage margins with alternative topologies for memristor-based crossbar memories.	VLSI-SoC	2013	DBLP DOI BibTeX RDF
15	Yehua Su, Wenjing Rao	Defect-tolerant logic hardening for crossbar-based nanosystems.	DATE	2013	DBLP DOI BibTeX RDF
15	Yuval Cassuto, Shahar Kvatinsky, Eitan Yaakobi	Sneak-path constraints in memristor crossbar arrays.	ISIT	2013	DBLP DOI BibTeX RDF
15	Tasho D. Tashev, Vladimir V. Monov	Large-Scale Simulation of Non-uniform Load Traffic in Studying the Throughput of a Crossbar Packed Switch.	LSSC	2013	DBLP DOI BibTeX RDF
15	Tasho D. Tashev, Vladimir V. Monov	A computer modeling of the throughput of a crossbar switch by PI-patterns for uniform traffic with variable intensity.	CompSysTech	2013	DBLP DOI BibTeX RDF
15	Yoon Kah Leow, Ali Akoglu	A Hybrid FPGA Model to Estimate On-Chip Crossbar Logic Utilization in SoC Platforms.	IPDPS Workshops	2013	DBLP DOI BibTeX RDF
15	Soko Divanovic, Milutin Radonjic, Igor Radusinovic, Gordana Gardasevic	Performance analysis of crosspoint queued crossbar switch with weighted round robin scheduling algorithm under unbalanced bursty traffic.	ISCC	2013	DBLP DOI BibTeX RDF
15	Cao Di, Lotfi Mhamdi	Scheduling multicast traffic in partially buffered crossbar switches.	ISCC	2013	DBLP DOI BibTeX RDF
15	Yibo Li, Branden Long, Saptarshi Mandal, Wenbo Chen 0002, Rashmi Jha	Understanding the impact of diode parameters on sneak current in 1Diode 1ReRAM crossbar architectures.	NANOARCH	2013	DBLP DOI BibTeX RDF
15	Fábio Gonçalves Pessanha, Luiza de Macedo Mourelle, Nadia Nedjah, Luneque Del Rio de Souza e Silva Junior	Implementing an Interconnection Network Based on Crossbar Topology for Parallel Applications in MPSoC.	ICCSA (1)	2013	DBLP DOI BibTeX RDF
15	Chris Yakopcic, Tarek M. Taha, Guru Subramanyam, Robinson E. Pino	Memristor SPICE model and crossbar simulation based on devices with nanosecond switching time.	IJCNN	2013	DBLP DOI BibTeX RDF
15	Chris Yakopcic, Tarek M. Taha	Energy efficient perceptron pattern recognition using segmented memristor crossbar arrays.	IJCNN	2013	DBLP DOI BibTeX RDF
15	Amirali Ghofrani, Miguel Angel Lastras-Montaño, Kwang-Ting Cheng	Towards data reliable crossbar-based memristive memories.	ITC	2013	DBLP DOI BibTeX RDF
15	Wen-Fong Wang, Li-Chuan Hung, Ching-Sung Lu	Design of Partially Buffered Crossbar Switches for Supporting Mixed Traffic.	IIH-MSP	2013	DBLP DOI BibTeX RDF
15	Beiye Liu, Miao Hu, Hai Li 0001, Zhi-Hong Mao, Yiran Chen 0001, Tingwen Huang, Wei Zhang 0012	Digital-assisted noise-eliminating training for memristor crossbar-based analog neuromorphic computing engine.	DAC	2013	DBLP DOI BibTeX RDF
15	Mrigank Sharad, Deliang Fan, Kaushik Roy 0001	Ultra low power associative computing with spin neurons and resistive crossbar memory.	DAC	2013	DBLP DOI BibTeX RDF
15	Alexander Kesselman, Kirill Kogan, Michael Segal 0001	Best Effort and Priority Queuing Policies for Buffered Crossbar Switches.	Chic. J. Theor. Comput. Sci.	2012	DBLP BibTeX RDF
15	Bo Yuan 0006, Bin Li 0025	Coverage Optimization for Defect-Tolerance Logic Mapping on Nanoelectronic Crossbar Architectures.	J. Comput. Sci. Technol.	2012	DBLP DOI BibTeX RDF
15	J.-S. Lee, S. Venkateswaran, M. Choi	Efficient post-configuration testing of an asynchronous nanowire crossbar system for reliability.	IET Comput. Digit. Tech.	2012	DBLP DOI BibTeX RDF
15	Minje Jun, Deumji Woo, Eui-Young Chung	Partial Connection-Aware Topology Synthesis for On-Chip Cascaded Crossbar Network.	IEEE Trans. Computers	2012	DBLP DOI BibTeX RDF
15	Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos	Crossbar NoCs Are Scalable Beyond 100 Nodes.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2012	DBLP DOI BibTeX RDF
15	Xiaofang Hu, Shukai Duan, Lidan Wang 0001, Xiaofeng Liao 0001	Memristive crossbar array with applications in image processing.	Sci. China Inf. Sci.	2012	DBLP DOI BibTeX RDF
15	Farnood Merrikh-Bayat, Farshad Merrikh-Bayat, Saeed Bagheri Shouraki	Neuro-Fuzzy Computing System with the Capacity of Implementation on Memristor-Crossbar and Optimization-Free Hardware Training	CoRR	2012	DBLP BibTeX RDF
15	Deng Pan, Yuanyuan Yang 0001	Flow Based Performance Guarantee Scheduling in Buffered Crossbar Switches.	IEEE Trans. Commun.	2012	DBLP DOI BibTeX RDF
15	Wenmin Hu, Hengzhu Liu, Zhonghai Lu, Axel Jantsch, Guitao Fu	Self-selection pseudo- circuit: a clever crossbar pre-allocation.	IEICE Electron. Express	2012	DBLP DOI BibTeX RDF
15	Ronald G. Dreslinski, Korey Sewell, Thomas Manville, Sudhir Satpathy, Nathaniel Ross Pinckney, Geoffrey Blake, Michael Cieslak, Reetuparna Das, Thomas F. Wenisch, Dennis Sylvester, David T. Blaauw, Trevor N. Mudge	Swizzle Switch: A self-arbitrating high-radix crossbar for NoC systems.	Hot Chips Symposium	2012	DBLP DOI BibTeX RDF
15	Jun Wu, Yong-Bin Kim, Minsu Choi	Configurable logic block (CLB) design for Asynchronous Nanowire Crossbar system.	MWSCAS	2012	DBLP DOI BibTeX RDF
15	Jun Wu, Yong-Bin Kim, Minsu Choi	Post-configuration repair strategy for asynchronous nanowire crossbar system.	MWSCAS	2012	DBLP DOI BibTeX RDF
15	Chin Hau Hoo, Akash Kumar 0001	An area-efficient partially reconfigurable crossbar switch with low reconfiguration delay.	FPL	2012	DBLP DOI BibTeX RDF
15	Tasho D. Tashev, Vladimir V. Monov	A simulation study of the throughput of a crossbar switch node by means of periodic input patterns.	CompSysTech	2012	DBLP DOI BibTeX RDF
15	Yixuan Zhang, Randy Morris, Dominic DiTomaso, Avinash Karanth Kodi	Energy-Efficient and Fault-Tolerant Unified Buffer and Bufferless Crossbar Architecture for NoCs.	IPDPS Workshops	2012	DBLP DOI BibTeX RDF