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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 210 occurrences of 148 keywords
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Results
Found 3186 publication records. Showing 3186 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Tim Todman, Wayne Luk |
Runtime assertions and exceptions for streaming systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang 0002, Wei Xue, Xiaomeng Huang, Youhui Zhang, Guangwen Yang |
Accelerating solvers for global atmospheric equations through mixed-precision data flow engine. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Motoki Amagasaki, Kazuki Inoue, Qian Zhao 0001, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
Defect-robust FPGA architectures for intellectual property cores in system LSI. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-7, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Fangqing Du, Colin Yu Lin, Xiuhai Cui, Jiabin Sun, Feng Liu, Fei Liu 0011, Haigang Yang |
Timing-constrained minimum area/power FPGA memory mapping. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Shane T. Fleming, David B. Thomas |
FPGA based control for real time systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-2, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Pavel Zemcík, Roman Juránek, Petr Musil, Martin Musil, Michal Hradis |
High performance architecture for object detection in streamed videos. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Stefanie Castillo, Armando Astarloa, Jesús Lázaro 0001, Sergio Salas, Isaac Ballesteros |
SDR control interface: An FPGA based infrastructure for control of VPX Software Defined Radio systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Shuai Xie, Yibin Li 0002, Zhiping Jia, Lei Ju 0001 |
Binarization based implementation for real-time human detection. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Zsolt István, Gustavo Alonso, Michaela Blott, Kees A. Vissers |
A flexible hash table design for 10GBPS key-value stores on FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Karel Heyse, Tom Davidson, Elias Vansteenkiste, Karel Bruneel, Dirk Stroobandt |
Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | François Philipp, Manfred Glesner |
An event-based middleware for the remote management of runtime hardware reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Michael Feilen, Andreas Iliopoulos, Michael Vonbun, Walter Stechele |
Weighted partitioning of sequential processing chains for dynamically reconfigurable FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Martin Langhammer, Bogdan Pasca 0001 |
Efficient floating-point polynomial evaluation on FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Vianney Lapotre, Philippe Coussy, Cyrille Chavet, Hugues Wouafo, Robin Danilo |
Dynamic branch prediction for high-level synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yusuke Koizumi, Noriyuki Miura, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura |
Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Brahim Al Farisi, Karel Bruneel, Dirk Stroobandt |
Staticroute: A novel router for the Dynamic Partial Reconfiguration of FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-7, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Tobias Strauch |
Timing driven RTL-to-RTL partitioner for multi-FPGA systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Fengbo Ren, Richard Dorrance, Wenyao Xu, Dejan Markovic |
A single-precision compressive sensing signal reconstruction engine on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Louis Woods, Zsolt István, Gustavo Alonso |
Hybrid FPGA-accelerated SQL query processing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Surendra Guntur, Feike Jansen, Jan Hoogerbrugge, Lotfi Abkari, Eric Vos |
Design of a multi GBPS Single Carrier digital baseband for 60GHz applications and its FPGA implementation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan |
TILT: A multithreaded VLIW soft processor family. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Pavel Zemcík, Roman Juránek, Petr Musil, Martin Musil, Michal Hradis |
High performance FPGA object detector: Hardware prototype. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ricardo Nobre |
Identifying sequences of optimizations for HW/SW compilation. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-2, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Travis Haroldsen, Brent E. Nelson, Brad White |
Rapid FPGA design prototyping through preservation of system logic: A case study. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-7, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yun Rock Qu, Viktor K. Prasanna |
Fast dynamically updatable packet classifier on FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Safeen Huda, Jason Helge Anderson, Hirotaka Tamura |
Charge recycling for power reduction in FPGA interconnect. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Xiaoyan Cheng, Tao Yin, Qisong Wu, Yiping Jia, Haigang Yang |
A CMOS Field Programmable Analog Array for intelligent sensory application. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Christian Pilato, Fabrizio Ferrandi |
Bambu: A modular framework for the high level synthesis of memory-intensive applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Susana Eiroa, Iluminada Baturone |
FPGA implementation and DPA resistance analysis of a lightweight HMAC construction based on photon hash family. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | David B. Thomas, Hideharu Amano |
A fully pipelined FPGA architecture for stochastic simulation of chemical systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-7, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Shweta Jain-Mendon, Ron Sass |
Performance evaluation of Sparse Matrix-Matrix Multiplication. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Hussam Amrouch, Thomas Ebi, Josef Schneider, Sridevan Parameswaran, Jörg Henkel |
Analyzing the thermal hotspots in FPGA-based embedded systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | David May 0003, Walter Stechele |
A resource-efficient probabilistic fault simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Marco Forconesi, Gustavo Sutter, Sergio López-Buedo, Javier Aracil 0001 |
Accurate and flexible flow-based monitoring for high-speed networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Abdulazim Amouri, Mehdi Baradaran Tahoori |
Degradation in FPGAs: Monitoring, modeling and mitigation (PHD forum paper: Thesis broad overview). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-2, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Felix Winterstein, Samuel Bayliss, George A. Constantinides |
FPGA-based K-means clustering using tree-based data structures. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Hsin-Jung Yang, Kermin Fleming, Michael Adler, Joel S. Emer |
Optimizing under abstraction: Using prefetching to improve FPGA performance. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Chun Zhu, Jian Wang 0036, Jinmei Lai |
A novel net-partition-based multithread FPGA routing method. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Antonio de la Piedra, Abdellah Touhafi, An Braeken |
Compact implementation of CCM and GCM modes of AES using DSP blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Andrew Love, Peter Athanas |
Rapid modular assembly of Xilinx FPGA designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kenta Fujinami, Yoshiki Yamaguchi, Akira Sugiura, Yuetsu Kodama |
The study of three-dimensional multiphase-flow simulator. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Sheng Wei 0001, Jason Xin Zheng, Miodrag Potkonjak |
Aging-based leakage energy reduction in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz |
From Quartus to VPR: Converting HDL to BLIF with the Titan flow. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Angel Gallego, Javier Mora 0001, Andrés Otero, Blanca López, Eduardo de la Torre, Teresa Riesgo |
A self-adaptive image processing application based on evolvable and scalable hardware. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Myron King, Asif Khan 0005, Abhinav Agarwal, Oriol Arcas, Arvind |
Generating infrastructure for FPGA-accelerated applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Joshua M. Levine, Edward A. Stott, George A. Constantinides, Peter Y. K. Cheung |
SMI: Slack Measurement Insertion for online timing monitoring in FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Chin Hau Hoo, Yajun Ha, Akash Kumar 0001 |
A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Erdem Ozcan, Yusuf Adibelli, Ilker Hamzaoglu |
A high performance deblocking filter hardware for High Efficiency Video Coding. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Raphael Polig, Kubilay Atasu, Christoph Hagleitner |
Token-based dictionary pattern matching for text analytics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yuki Kamikubo, Minoru Watanabe, Shoji Kawahito |
Image recognition operation on a dynamically reconfigurable vison architecture. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ce Guo, Wayne Luk |
Accelerating maximum likelihood estimation for Hawkes point processes. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Aaron Severance, Guy G. F. Lemieux |
TputCache: High-frequency, multi-way cache for high-throughput FPGA applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Pedro Vieira dos Santos, José Carlos Alves, João Canas Ferreira |
A framework for hardware cellular genetic algorithms: An application to spectrum allocation in cognitive radio. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Anja Niedermeier, Jan Kuper, Gerard J. M. Smit |
A dataflow-inspired CGRA for streaming applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-2, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Mohamed S. Abdelfattah, Vaughn Betz |
The power of communication: Energy-efficient NOCS for FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yi Wang 0016, Yajun Ha |
FPGA based Rekeying for cryptographic key management in Storage Area Network. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kentaro Sano, Ryo Ito, Hayato Suzuki, Yoshiaki Kono |
Parallel and scalable custom computing for real-time fluid simulation on a cluster node with four tightly-coupled FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Sebastian Manz, Jano Gebelein, Andrei Oancea, Heiko Engel, Udo Kebschull |
Radiation mitigation efficiency of scrubbing on the FPGA based CBM-TOF read-out controller. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ruediger Willenberg, Paul Chow |
SimXMD: Simulation-based HW/SW co-debugging. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Di Wu, Kaveh Aasaraai, Andreas Moshovos |
Low-cost, high-performance branch predictors for soft processors. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Fredrik Brosser, Hui Yan Cheah, Suhaib A. Fahmy |
Iterative floating point computation using FPGA DSP blocks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Parthasarathy M. B. Rao, Abdulazim Amouri, Saman Kiamehr, Mehdi Baradaran Tahoori |
Altering LUT configuration for wear-out mitigation of FPGA-mapped designs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai |
Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Oliver Knodel, Rainer G. Spallek |
Integration of a multi-FPGA system in a common cluster environment. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-2, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta |
Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Akihito Tsusaka, Mai Izawa, Rie Uno, Nobuyuki Ozaki, Hideharu Amano |
A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yuhui Bai, Syed Zahid Ahmed, Bertrand Granado |
FPGA implementation of Hierarchical Enumerative Coding for locally stationary image source. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Filipe Moutinho, Luís Gomes 0001 |
Distributed embedded systems design using Petri nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-2, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Luís Gomes 0001, Filipe Moutinho, Fernando Pereira |
IOPT-tools - A Web based tool framework for embedded systems controller development using Petri nets. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Jirí Matousek 0002, Martin Skacan, Jan Korenek |
Memory efficient IP lookup in 100 GBPS networks. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Christopher Lavin, Brent E. Nelson, Brad L. Hutchings |
Impact of hard macro size on FPGA clock rate and place/route time. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | |
23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013 ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![IEEE, 978-1-4799-0004-6 The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP BibTeX RDF |
|
1 | Kiran Kumar Matam, Hoang Le, Viktor K. Prasanna |
Energy efficient architecture for matrix multiplication on FPGAs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ricardo S. Ferreira 0001, Luciana Rocha, André G. Santos, José Augusto Miranda Nacif, Stephan Wong, Luigi Carro |
A run-time graph-based Polynomial Placement and routing algorithm for virtual FPGAS. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Yuan Yao 0006, Zhongyong Lu, Qingsong Shi, Wenzhi Chen |
FPGA based hardware-software co-designed dynamic binary translation system. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Oriol Font-Bach, Nikolaos G. Bartzoudis, Miquel Payaró, Antonio Pascual-Iserte |
Hardware-efficient implementation of a Femtocell/Macrocell interference-mitigation technique for high-performance LTE-based systems. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Ruediger Willenberg, Paul Chow |
Simulation-based HW/SW co-debugging for field-programmable systems-on-chip. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Rodrigo Bernardo, Arley H. Salvador, Eduardo Mobilon, Luis R. Monte, Stephane Boisclair, Avrum Warshawsky |
Design and FPGA implementation of a 100 Gbit/s optical transport network processor. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kubilay Atasu, Raphael Polig, Christoph Hagleitner, Frederick R. Reiss |
Hardware-accelerated regular expression matching for high-throughput text analytics. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-7, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Wilson José, Ana Rita Silva, Horácio C. Neto, Mário P. Véstias |
Analysis of matrix multiplication on high density Virtex-7 FPGA. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Viktor Fischer, Florent Bernard, Patrick Haddad |
An open-source multi-FPGA modular system for fair benchmarking of True Random Number Generators. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Davor Capalija, Tarek S. Abdelrahman |
A high-performance overlay architecture for pipelined execution of data flow graphs. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Shakith Fernando, Mark Wijtvliet, Firew Siyoum, Yifan He, Sander Stuijk, Akash Kumar 0001, Henk Corporaal |
MAMPSX: A demonstration of rapid, predictable HMPSOC synthesis. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Dajung Lee, Pingfan Meng, Matthew Jacobsen, Henry Tse, Dino Di Carlo, Ryan Kastner |
A hardware accelerated approach for imaging flow cytometry. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Georgios Tzimpragos, Christoforos Kachris, Dimitrios Soudris, Ioannis Tomkos |
A low-complexity implementation of QC-LDPC encoder in reconfigurable logic. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Xinyu Niu, José Gabriel F. Coutinho, Wayne Luk |
A scalable design approach for stencil computation on reconfigurable clusters. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Petr Pfeifer, Zdenek Plíva |
On measurement of parameters of programmable microelectronic nanostructures under accelerating extreme conditions (Xilinx 28nm XC7Z020 Zynq FPGA). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Rodolfo Redlich, Miguel E. Figueroa |
A digital architecture for real-time nonuniformity correction of infrared focal-plane arrays. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Hadi Parandeh-Afshar, Grace Zgheib, David Novo, Madhura Purnaprajna, Paolo Ienne |
Shadow And-Inverter Cones. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Meng Yang 0013, Jinmei Lai, Jiarong Tong |
Yet Another Many-Objective Clustering (YAMO-Pack) for FPGA CAD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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1 | Nicolas Brunie, Florent de Dinechin, Matei Istoan, Guillaume Sergent, Kinga Illyes, Bogdan Popa |
Arithmetic core generation using bit heaps. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz |
Titan: Enabling large and complex benchmarks in academic CAD. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Marco Alexandre Cravo Gomes, Vítor Manuel Mendes da Silva, Ricardo Ferrao |
Magnitude modulation on reconfigurable computing devices. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura |
A packet classifier using LUT cascades based on EVMDDS (k). ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
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1 | Sambit Kumar Shukla, Yang Yang 0111, Laxmi N. Bhuyan, Philip Brisk |
Shared memory heterogeneous computation on PCIe-supported platforms. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Giovanni Mariani, Vlad Mihai Sima, Gianluca Palermo, Vittorio Zaccaria, Giacomo Marchiori, Cristina Silvano, Koen Bertels |
Run-time optimization of a dynamically reconfigurable embedded system through performance prediction. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Gabriel L. Nazar, Leonardo P. Santos, Luigi Carro |
Accelerated FPGA repair through shifted scrubbing. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-6, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Piergiorgio Lanza |
FEMIP: A high performance FPGA-based features extractor & matcher for space applications. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-4, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Martin Kumm, Martin Hardieck, Jens Willkomm, Peter Zipf, Uwe Meyer-Baese |
Multiple constant multiplication with ternary adders. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
DBLP DOI BibTeX RDF |
|
1 | Alessandro Cilardo, Edoardo Fusella, Luca Gallo, Antonino Mazzeo |
Automated synthesis of FPGA-based heterogeneous interconnect topologies. ![Search on Bibsonomy](Pics/bibsonomy.png) |
FPL ![In: 23rd International Conference on Field programmable Logic and Applications, FPL 2013, Porto, Portugal, September 2-4, 2013, pp. 1-8, 2013, IEEE, 978-1-4799-0004-6. The full citation details ...](Pics/full.jpeg) |
2013 |
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