Search results for "IOLTS"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
44	Marc Renaudin, Yannick Monnet	Asynchronous Design: Fault Robustness and Security Characteristics.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Arthur Pereira Frantz, Luigi Carro, Érika F. Cota, Fernanda Lima Kastensmidt	Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Damien Leroy, Stanislaw J. Piestrak, Fabrice Monteiro, Abbas Dandache, Stéphane Rossignol, Pascal Moitrel	Characterizing Laser-Induced Pulses in ICs: Methodology and Results.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Christian Galke, René Kothe, Sabine Schultke, K. Winkler, Jeanette Honko, Heinrich Theodor Vierhaus	Embedded Scan Test with Diagnostic Features for Self-Testing SoCs.	IOLTS	2006	DBLP DOI BibTeX RDF
44	G. Cellere, Alessandro Paccagnella, Angelo Visconti, Mauro Bonanomi	Erratic Effects of Irradiation in Floating Gate Memory Cells.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Luca Sterpone, Massimo Violante	Dependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices.	IOLTS	2006	DBLP DOI BibTeX RDF
44	P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis	A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Michael Nicolaidis	A Low-Cost Single-Event Latchup Mitigation Sscheme.	IOLTS	2006	DBLP DOI BibTeX RDF	Latchup, Single-event effects, singleevent lathcup, SEL, mitigation of single-event effects
44	Guillaume Hubert, Antonin Bougerol, Florent Miller, Nadine Buard, Lorena Anghel, Thierry Carrière, Frederic Wrobel, Rémi Gaillard	Prediction of Transient Induced by Neutron/Proton in CMOS Combinational Logic Cells.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis 0001	Design of a Robust 8-Bit Microprocessor to Soft Errors.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Dimitris Nikolos, Dimitrios Kagaris, Spyros Gidaros	Diophantine-Equation Based Arithmetic Test Set Embedding.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Marcello Coppola	Trends and Trade-offs in Designing Highly Robust Throughput on Chip Communication Network.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Cristian Grecu, André Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande	On-line Fault Detection and Location for NoC Interconnects.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Luca Breveglieri, Paolo Maistri, Israel Koren	A Note on Error Detection in an RSA Architecture by Means of Residue Codes.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Vishwanath Natarajan, Ganesh Srinivasan, Abhijit Chatterjee	On-Line Error Detection in Wireless RF Transmitters Using Real-time Streaming Data.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Cecilia Metra, Martin Omaña 0001, Daniele Rossi 0001, José Manuel Cazeaux, T. M. Mak	Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Tino Heijmen	Soft Error Rates in Deep-Submicron CMOS Technologies.	IOLTS	2006	DBLP DOI BibTeX RDF
44	David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre	Secure Scan Techniques: A Comparison.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Magdy S. Abadir	Floorplanning and Thermal Impact on Leakage Power and Proper Operation of Complex SOC Designs.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz	A Partitioning Technique for Identification of Error-Capturing Scan Cells in Scan-BIST.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Jacques Henri Collet, Piotr Zajac, Yves Crouzet, Andrzej Napieralski	Contribution of Communications to Dependability in Massively-Defective General-Purpose Nanoarchitectures.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Ramtilak Vemu, Jacob A. Abraham	CEDA: Control-flow Error Detection through Assertions.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Stelios Neophytou, Maria K. Michael, Spyros Tragoudas	Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding.	IOLTS	2006	DBLP DOI BibTeX RDF
44	André K. Nieuwland, Samir Jasarevic, Goran Jerin	Combinational Logic Soft Error Analysis and Protection.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Steffen Tarnick	Embedded Borden 2-UED Code Checkers.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Isaac Levendel	The Consequences of Variability in Software.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Rochit Rajsuman	Towards The Methodology of On-line Diagnosis.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gössel	A New Self-Checking and Code-Disjoint Non-Restoring Array Divider.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas 0001, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira 0001	Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Günter Schindlbeck	Trend in DRAM Soft Errors.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Matteo Sonza Reorda, Massimo Violante	Hardware-in-the-Loop-Based Dependability Analysis of Automotive Systems.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Andrea Cuomo	The Challenge of Reliability in Future Complex Systems.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano	Localization of Faults in Radix-n Signed Digit Adders.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin	Power Attacks on Secure Hardware Based on Early Propagation of Data.	IOLTS	2006	DBLP DOI BibTeX RDF
44	S. Habermann, René Kothe, Heinrich Theodor Vierhaus	Built-in Self Repair by Reconfiguration of FPGAs.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Alexander V. Drozd, M. V. Lobachev, J. V. Drozd	The Problem of On-Line Testing Methods In Approximate Data Processing.	IOLTS	2006	DBLP DOI BibTeX RDF
44	Mario García-Valderas, Marta Portela-García, Celia López-Ongil, Luis Entrena	Emulation-based Fault Injection in Circuits with Embedded Memories.	IOLTS	2006	DBLP DOI BibTeX RDF
44		11th IEEE International On-Line Testing Symposium (IOLTS 2005), 6-8 July 2005, Saint Raphael, France	IOLTS	2005	DBLP BibTeX RDF
44	Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Deepali Koppad	On-Line Testing of Globally Asynchronous Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Piotr Gawkowski, Janusz Sosnowski, B. Radko	Analyzing the Effectiveness of Fault Hardening Procedures.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Erik Schüler, Luigi Carro	Increasing Fault Tolerance to Multiple Upsets Using Digital Sigma-Delta Modulators.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Frederic Wrobel	Use of Nuclear Codes for Neutron-Induced Nuclear Reactions in Microelectronics.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Cristiano Lazzari, Lorena Anghel, Ricardo A. L. Reis	On Implementing a Soft Error Hardening Technique by Using an Automatic Layout Generator: Case Study.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Alexandre Douin, Vincent Pouget, Dean Lewis, Pascal Fouillat, Philippe Perdu	Electrical Modeling for Laser Testing with Different Pulse Durations.	IOLTS	2005	DBLP DOI BibTeX RDF
44	André K. Nieuwland, Atul Katoch, Daniele Rossi 0001, Cecilia Metra	Coding Techniques for Low Switching Noise in Fault Tolerant Busses.	IOLTS	2005	DBLP DOI BibTeX RDF
44	José Manuel Cazeaux, Daniele Rossi 0001, Martin Omaña 0001, Cecilia Metra, Abhijit Chatterjee	On Transistor Level Gate Sizing for Increased Robustness to Transient Faults.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Nicolas Renaud	How to Cope with SEU/SET at Chip Level? The Example of a Microprocessor Family.	IOLTS	2005	DBLP DOI BibTeX RDF
44		Organizing Committee.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Amandeep Singh, Debashish Bose	A Software Based Online Memory Test for Highly Available Systems.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Michel Pignol	How to Cope with SEU/SET at System Level?.	IOLTS	2005	DBLP DOI BibTeX RDF
44	T. M. Mak, Subhasish Mitra, Ming Zhang	DFT Assisted Built-In Soft Error Resilience.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Animesh Datta, Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy 0001	Yield Prediction of High Performance Pipelined Circuit with Respect to Delay Failures in Sub-100nm Technology.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Antoine Lemarechal	Introduction to Fault Attacks on Smartcard.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Régis Leveugle	Introduction to the Special Session on Secure Implementations.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Andre L. R. Pouponnot	Strategic Use of SEE Mitigation Techniques for the Development of the ESA Microprocessors: Past, Present and Future.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Fabian Vargas 0001, D. L. Cavalcante, Edmundo Gatti, Dárcio Prestes, Daniel Lupi	On the Proposition of an EMI-Based Fault Injection Approach.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Andrzej Krasniewski	A Pragmatic Approach to Concurrent Error Detection in Sequential Circuits Implemented Using FPGAs with Embedded Memory.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Laurent Sourgen	Security Constraints in Integrated Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Chris H. Kim, Steven Hsu, Ram Krishnamurthy 0001, Shekhar Borkar, Kaushik Roy 0001	Self Calibrating Circuit Design for Variation Tolerant VLSI Systems.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas 0001, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira 0001	Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev	Power-Balanced Self Checking Circuits for Cryptographic Chips.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Christian Boléat, Gerard Colas	Overview of Soft Errors Issues in Aerospace Systems.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Régis Leveugle, Yervant Zorian, Luca Breveglieri, André K. Nieuwland, Klaus Rothbart, Jean-Pierre Seifert	On-Line Testing for Secure Implementations: Design and Validation.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Michele Portolan, Régis Leveugle	On the Need for Common Evaluation Methods for Fault Tolerance Costs in Microprocessors.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Lejla Batina, Nele Mentens, Ingrid Verbauwhede	Side-Channel Issues for Designing Secure Hardware Implementations.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Balkaran S. Gill, Michael Nicolaidis, Christos A. Papachristou	Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Matteo Sonza Reorda, Luca Sterpone, Massimo Violante	Efficient Estimation of SEU Effects in SRAM-Based FPGAs.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Kentaroh Katoh, Abderrahim Doumar, Hideo Ito	Design of On-Line Testing for SoC with IEEE P1500 Compliant Cores Using Reconfigurable Hardware and Scan Shift.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Yannick Monnet, Marc Renaudin, Régis Leveugle	Hardening Techniques against Transient Faults for Asynchronous Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Riccardo Mariani, Gabriele Boschi	Scrubbing and Partitioning for Protection of Memory Systems.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy 0001	A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning.	IOLTS	2005	DBLP DOI BibTeX RDF	Speed binning, delay measurement hardware, process variation
44	Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes	Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Monica Alderighi, A. Candelori, Fabio Casini, Sergio D'Angelo, Marcello Mancini, Alessandro Paccagnella, Sandro Pastore, Giacomo R. Sechi	Heavy Ion Effects on Configuration Logic of Virtex FPGAs.	IOLTS	2005	DBLP DOI BibTeX RDF
44		Program Committee.	IOLTS	2005	DBLP DOI BibTeX RDF
44	T. M. Mak	Does It Mean Less Testing for Self Calibrating Design?.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Amir Rajabzadeh	A 32-Bit COTS-Based Fault-Tolerant Embedded System.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Régis Leveugle	A New Approach for Early Dependability Evaluation Based on Formal Property Checking and Controlled Mutations.	IOLTS	2005	DBLP DOI BibTeX RDF
44	René Kothe, Christian Galke, Heinrich Theodor Vierhaus	A Multi-Purpose Concept for SoC Self Test Including Diagnostic Features.	IOLTS	2005	DBLP DOI BibTeX RDF
44		Welcome.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Vitalij Ocheretnij, G. Kouznetsov, Ramesh Karri, Michael Gössel	On-Line Error Detection and BIST for the AES Encryption Algorithm with Different S-Box Implementations.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Damien Leroy, Stanislaw J. Piestrak, Fabrice Monteiro, Abbas Dandache	Modeling of Transients Caused by a Laser Attack on Smart Cards.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Ioannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis	Accumulator-Based Weighted Pattern Generation.	IOLTS	2005	DBLP DOI BibTeX RDF
44		IEEE Computer Society TTTC: Test Technology Technical Council.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Dhiraj K. Pradhan, Dimitri Kagaris, Rohit Gambhir	A Hamming Distance Based Test Pattern Generator with Improved Fault Coverage.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Qikai Chen, Saibal Mukhopadhyay, Hamid Mahmoodi, Kaushik Roy 0001	Process Variation Tolerant Online Current Monitor for Robust Systems.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Alberto Manzone, Paolo Bernardi, Michelangelo Grosso, Maurizio Rebaudengo, Ernesto Sánchez 0001, Matteo Sonza Reorda	Integrating BIST Techniques for On-Line SoC Testing.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Sotirios Matakias, Y. Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni, Aristides Efthymiou	Fast, Parallel Two-Rail Code Checker with Enhanced Testability.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Donghoon Han, Selim Sermet Akbay, Soumendu Bhattacharya, Abhijit Chatterjee, William R. Eisenstadt	On-Chip Self-Calibration of RF Circuits Using Specification-Driven Built-In Self Test (S-BIST).	IOLTS	2005	DBLP DOI BibTeX RDF
44	Robert C. Aitken, Betina Hold	Modeling Soft-Error Susceptibility for IP Blocks.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Alain Merle, Jessy Clédière	Security Testing for Hardware Products: The Security Evaluations Practice.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Martin Omaña 0001, O. Losco, Cecilia Metra, Andrea Pagni	On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits' Area Overhead and Performance Optimization.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Yves Crouzet, Jacques Henri Collet, Jean Arlat	Mitigating Soft Errors to Prevent a Hard Threat to Dependable Computing.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Lorena Anghel, Régis Leveugle, Pierre Vanhauwaert	Evaluation of SET and SEU Effects at Multiple Abstraction Levels.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Bartomeu Alorda, Sebastià A. Bota, Jaume Segura 0001	A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF	Current based testing, built-in current monitors, high-speed measurements, transient current
44	Raoul Velazco, R. Ecoffet, F. Faure	How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Michael Nicolaidis	Design for Mitigation of Single Event Effects.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Gian Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano	Design of a Self Checking Reed Solomon Encoder.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Yuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra	Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Tino Heijmen	Analytical Semi-Empirical Model for SER Sensitivity Estimation of Deep-Submicron CMOS Circuits.	IOLTS	2005	DBLP DOI BibTeX RDF
44	Guillaume Hubert, Nadine Buard, Cécile Weulersse, Thierry Carrière, Marie-Catherine Palau, Jean-Marie Palau, Damien Lambert, Jacques Baggio, Frederic Wrobel, Frédéric Saigné, Rémi Gaillard	A Review of DASIE Code Family: Contribution to SEU/MBU Understanding.	IOLTS	2005	DBLP DOI BibTeX RDF