Search results for "Multithreading"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
9	Upsorn Praphamontripong, Swapna S. Gokhale, Aniruddha S. Gokhale, Jeff Gray 0001	Performance Analysis of an Asynchronous Web Server.	COMPSAC (2)	2006	DBLP DOI BibTeX RDF
9	Matthew De Vuyst, Rakesh Kumar 0002, Dean M. Tullsen	Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors.	IPDPS	2006	DBLP DOI BibTeX RDF
9	Dimitrios S. Nikolopoulos	Facing the challenges of multicore processor technologies using autonomic system software.	IPDPS	2006	DBLP DOI BibTeX RDF
9	Sunan Tugsinavisut, Roger Su, Peter A. Beerel	High-level Synthesis for Highly Concurrent Hardware Systems.	ACSD	2006	DBLP DOI BibTeX RDF
9	Blair Fort, Davor Capalija, Zvonko G. Vranesic, Stephen Dean Brown	A Multithreaded Soft Processor for SoPC Area Reduction.	FCCM	2006	DBLP DOI BibTeX RDF
9	Christopher Nitta, Raju Pandey, Yann Ramin	Y-Threads: Supporting Concurrency in Wireless Sensor Networks.	DCOSS	2006	DBLP DOI BibTeX RDF	Stack sharing, Concurrency, Multi-threading
9	Matthew Curtis-Maury, James Dzierwa, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos	Online power-performance adaptation of multithreaded programs using hardware event-based prediction.	ICS	2006	DBLP DOI BibTeX RDF	online adaptation, performance prediction, power-aware computing, hardware performance counters
9	Caixia Sun, Hong-Wei Tang, Minxuan Zhang	Enhancing ICOUNT2.8 Fetch Policy with Better Fairness for SMT Processors.	Asia-Pacific Computer Systems Architecture Conference	2006	DBLP DOI BibTeX RDF
9	Lars Ailo Bongo, Brian Vinter, Otto J. Anshus, Tore Larsen, John Markus Bjørndalen	Using Overdecomposition to Overlap Communication Latencies with Computation and Take Advantage of SMT Processors.	ICPP Workshops	2006	DBLP DOI BibTeX RDF
9	Jason A. Blome, Shantanu Gupta, Shuguang Feng, Scott A. Mahlke	Cost-efficient soft error protection for embedded microprocessors.	CASES	2006	DBLP DOI BibTeX RDF	reliability, embedded processors, soft errors
9	Michela Becchi, Patrick Crowley	Dynamic thread assignment on heterogeneous multiprocessor architectures.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	simulation, chip multiprocessor, heterogeneous architectures
9	Peter Rounce, Alberto Ferreira de Souza	The mDTSVLIW: a Multi-Threaded Trace-based VLIW Architecture.	SBAC-PAD	2006	DBLP DOI BibTeX RDF
9	Wessam Hassanein, Moustafa A. Hammad, Layali K. Rashid	Characterizing the Performance of Data Management Systems on Hyper-Threaded Architectures.	SBAC-PAD	2006	DBLP DOI BibTeX RDF
9	Alban Ponse, Mark van der Zwaag	An Introduction to Program and Thread Algebra.	CiE	2006	DBLP DOI BibTeX RDF	Program Algebra, PGA, Thread Algebra
9	Steve Scott	Roadmaps and visions I - Cray: creating a path to adaptive supercomputing.	SC	2006	DBLP DOI BibTeX RDF
9	Guy L. Steele Jr.	Parallel programming and code selection in fortress.	PPoPP	2006	DBLP DOI BibTeX RDF
9	Hans P. Reiser, Rüdiger Kapitza, Jörg Domaschka, Franz J. Hauck	Fault-Tolerant Replication Based on Fragmented Objects.	DAIS	2006	DBLP DOI BibTeX RDF
9	Madan Musuvathi, Shaz Qadeer	CHESS: Systematic Stress Testing of Concurrent Software.	LOPSTR	2006	DBLP DOI BibTeX RDF
9	Zhenghong Wang, Ruby B. Lee	Covert and Side Channels Due to Processor Architecture.	ACSAC	2006	DBLP DOI BibTeX RDF
9	Yang Jie, Shen Sun	Implementation of Multipoint Video Conference in Software.	APCCAS	2006	DBLP DOI BibTeX RDF
9	Caixia Sun, Hong-Wei Tang, Minxuan Zhang	Controlling Performance of a Time-Criticial Thread in SMT Processors by Instruction Fetch Policy.	PDCAT	2006	DBLP DOI BibTeX RDF
9	John D. Davis, Cong Fu 0010, James Laudon	The RASE (Rapid, Accurate Simulation Environment) for chip multiprocessors.	SIGARCH Comput. Archit. News	2005	DBLP DOI BibTeX RDF
9	Jörg Keller 0001, Andreas Grävinghoff	Thread-Based Virtual Duplex Systems in Embedded Environments.	IEEE Micro	2005	DBLP DOI BibTeX RDF	virtual duplex systems, embedded environments
9	J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry	The STAMPede approach to thread-level speculation.	ACM Trans. Comput. Syst.	2005	DBLP DOI BibTeX RDF	cache coherence, automatic parallelization, Thread-level speculation, chip-multiprocessing
9	Shah Bhatti, James Carlson, Hui Dai, Jing Deng 0002, Jeff Rose, Anmol Sheth, Brian Shucker, Charles Gruenwald, Adam Torgerson, Richard Han 0001	MANTIS OS: An Embedded Multithreaded Operating System for Wireless Micro Sensor Platforms.	Mob. Networks Appl.	2005	DBLP DOI BibTeX RDF	dynamic reprogramming, sensor networks, low power, multithreaded, lightweight, embedded operating system, cross-platform
9	Marisa Gil, Ruben Pinilla	Thread coloring: a scheduler proposal from user to hardware threads.	ACM SIGOPS Oper. Syst. Rev.	2005	DBLP DOI BibTeX RDF	hyper-threading, thread coloring, scheduling, multithreaded, SMT, linux kernel
9	Jedidiah R. Crandall, Zhendong Su 0001, Shyhtsun Felix Wu, Frederic T. Chong	On deriving unknown vulnerabilities from zero-day polymorphic and metamorphic worm exploits.	CCS	2005	DBLP DOI BibTeX RDF	metamorphism, polymorphism, symbolic execution, worms, honeypots, polymorphic worms
9	Yingmin Li, David M. Brooks, Zhigang Hu, Kevin Skadron	Performance, Energy, and Thermal Considerations for SMT and CMP Architectures.	HPCA	2005	DBLP DOI BibTeX RDF
9	Zhichun Zhu, Zhao Zhang 0010	A Performance Comparison of DRAM Memory System Optimizations for SMT Processors.	HPCA	2005	DBLP DOI BibTeX RDF
9	Yair Sade, Shmuel Sagiv, Ran Shaham	Optimizing C Multithreaded Memory Management Using Thread-Local Storage.	CC	2005	DBLP DOI BibTeX RDF
9	Yuxing Tang, Kun Deng, Xingming Zhou	The Design Space of CMP vs. SMT for High Performance Embedded Processor.	ICESS	2005	DBLP DOI BibTeX RDF
9	Robert L. McGregor, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos	Scheduling Algorithms for Effective Thread Pairing on Hybrid Multiprocessors.	IPDPS	2005	DBLP DOI BibTeX RDF
9	José María Pérez, Luis Miguel Sánchez, Félix García Carballeira, Alejandro Calderón 0001, Jesús Carretero 0001	High Performance Java Input/Output for Heterogeneous Distributed Computing.	ISCC	2005	DBLP DOI BibTeX RDF	Java, distributed computing, Parallel I/O, NFS, data declustering
9	C. John Glossner, Mayan Moudgill, Daniel Iancu, Gary Nacer, Sanjay Jinturkar, Stuart Stanley, Michael Samori, Tanuj Raja, Michael J. Schulte, Stamatis Vassiliadis	Future wireless convergence platforms.	CODES+ISSS	2005	DBLP DOI BibTeX RDF	wireless, software defined radio, digital signal processors
9	Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, Glenn Reinman	Tornado warning: the perils of selective replay in multithreaded processors.	ICS	2005	DBLP DOI BibTeX RDF
9	Shi-Wu Lo, Kam-yiu Lam, Tei-Wei Kuo	Real-Time Task Scheduling for SMT Systems.	RTCSA	2005	DBLP DOI BibTeX RDF
9	David Carrera 0001, Vicenç Beltran 0001, Jordi Torres, Eduard Ayguadé	A Hybrid Web Server Architecture for e-Commerce Applications.	ICPADS (1)	2005	DBLP DOI BibTeX RDF
9	Wenbing Zhao 0001, Louise E. Moser, P. M. Melliar-Smith	Deterministic Scheduling for Multithreaded Replicas.	WORDS	2005	DBLP DOI BibTeX RDF
9	Minxuan Zhang, Caixia Sun	Enhancing DCache Warn Fetch Policy for SMT Processors.	ISPA	2005	DBLP DOI BibTeX RDF	L2 cache miss, I-fetch Policy, Fetch Priority, Resource Allocation, SMT
9	Changhee Jung, Daeseob Lim, Jaejin Lee, Sangyong Han	Adaptive execution techniques for SMT multiprocessor architectures.	PPoPP	2005	DBLP DOI BibTeX RDF	simultaneous multi-threading, compilers, performance estimation, performance counters, adaptive execution
9	Li Zhao 0002, Yan Luo, Laxmi N. Bhuyan, Ravishankar R. Iyer 0001	Design and Implementation of a Content-Aware Switch Using a Network Processor.	Hot Interconnects	2005	DBLP DOI BibTeX RDF
9	Daniela Saccol Peranconi, Gerson Geraldo Homrich Cavalheiro	Using active messages to explore high performance in clusters of computers.	SCCC	2005	DBLP DOI BibTeX RDF
9	Takashi Yokota, Moriyuki Saito, Fumihito Furukawa, Kanemitsu Ootsu, Takanobu Baba	Two-Path Limited Speculation Method for Static/Dynamic Optimization in Multithreaded Systems.	PDCAT	2005	DBLP DOI BibTeX RDF
9	Li Zhao 0002, Yan Luo, Laxmi N. Bhuyan, Ravi R. Iyer 0001	SpliceNP: a TCP splicer using a network processor.	ANCS	2005	DBLP DOI BibTeX RDF	TCP splicing, network processors
9	Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández	QoS for High-Performance SMT Processors in Embedded Systems.	IEEE Micro	2004	DBLP DOI BibTeX RDF
9	Bo Ingvar Sandén	Coping with Java Threads.	Computer	2004	DBLP DOI BibTeX RDF
9	Anasua Bhowmik, Manoj Franklin	A General Compiler Framework for Speculative Multithreaded Processors.	IEEE Trans. Parallel Distributed Syst.	2004	DBLP DOI BibTeX RDF
9	Tulika Mitra, Abhik Roychoudhury, Qinghua Shen	Impact of Java Memory Model on Out-of-Order Multiprocessors.	IEEE PACT	2004	DBLP DOI BibTeX RDF
9	Erika Ábrahám, Marcello M. Bonsangue, Frank S. de Boer, Martin Steffen	Object Connectivity and Full Abstraction for a Concurrent Calculus of Classes.	ICTAC	2004	DBLP DOI BibTeX RDF
9	Jamison D. Collins, Dean M. Tullsen, Hong Wang 0003	Control Flow Optimization Via Dynamic Reconvergence Prediction.	MICRO	2004	DBLP DOI BibTeX RDF
9	Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan del Cuvillo, Xinmin Tian, Xiang Zou, Hong Wang 0003, Donald Yeung, Milind Girkar, John Paul Shen	Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors.	CGO	2004	DBLP DOI BibTeX RDF
9	Marco Bernardo 0001, Edoardo Bontà	Generating Well-Synchronized Multithreaded Programs from Software Architecture Descriptions.	WICSA	2004	DBLP DOI BibTeX RDF
9	R. Sharmila, M. V. Lakshmi Priya, Ranjani Parthasarathi	An Active Framework for a WLAN Access Point Using Intel's IXP1200 Network Processor.	HiPC	2004	DBLP DOI BibTeX RDF
9	Liem Tran, Nicholas Nelson 0001, Fung Ngai, Steve Dropsho, Michael C. Huang 0001	Dynamically reducing pressure on the physical register file through simple register sharing.	ISPASS	2004	DBLP DOI BibTeX RDF
9	David Callahan, Bradford L. Chamberlain, Hans P. Zima	The Cascade High Productivity Language.	HIPS	2004	DBLP DOI BibTeX RDF
9	Yen-Kuang Chen, Xinmin Tian, Steven Ge, Milind Girkar	Towards Efficient Multi-Level Threading of H.264 Encoder on Intel Hyper-Threading Architectures.	IPDPS	2004	DBLP DOI BibTeX RDF	H.264 standard, Hyper-Threading Technology, multimedia, OpenMP, thread-level parallelism
9	Francisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández	DCache Warn: An I-Fetch Policy to Increase SMT Efficiency.	IPDPS	2004	DBLP DOI BibTeX RDF
9	Dan Henriksson, Anton Cervin	Multirate Feedback Control Using the TinyRealTime Kernel.	ISCIS	2004	DBLP DOI BibTeX RDF
9	Maged M. Michael	Scalable lock-free dynamic memory allocation.	PLDI	2004	DBLP DOI BibTeX RDF	async-signal-safe, malloc, availability, lock-free
9	Ruchira Sasanka, Sarita V. Adve, Yen-Kuang Chen, Eric Debes	The energy efficiency of CMP vs. SMT for multimedia workloads.	ICS	2004	DBLP DOI BibTeX RDF	multimedia, energy efficiency, CMP, SMT
9	Vadim Iosevich, Assaf Schuster	A comparison of sequential consistency with home-based lazy release consistency for software distributed shared memory.	ICS	2004	DBLP DOI BibTeX RDF	home-based lazy release consistency, sequencial consistency, distributed shared memory, consistency model
9	Fernando Latorre, José González 0002, Antonio González 0001	Back-end assignment schemes for clustered multithreaded processors.	ICS	2004	DBLP DOI BibTeX RDF	clustered, CMP, multithreaded, steering
9	Georgios Tsilikas, Martin Fleury	Matrix Multiplication Performance on Commodity Shared-Memory Multiprocessors.	PARELEC	2004	DBLP DOI BibTeX RDF
9	Tzung-Rei Yang, Jong-Jiann Shieh	Dynamic Fetch Engine for Simultaneous Multithreaded Processors.	Asia-Pacific Computer Systems Architecture Conference	2004	DBLP DOI BibTeX RDF
9	Joshua L. Kihm, Daniel A. Connors	Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling.	ICCD	2004	DBLP DOI BibTeX RDF
9	Myungho Lee, Brian Whitney, Nawal Copty	Performance and Scalability of OpenMP Programs on the Sun FireTM E25K Throughput Computing Server.	WOMPAT	2004	DBLP DOI BibTeX RDF
9	Hesham Hallal, El Hachemi Alikacem, W. P. Tunney, Sergiy Boroday, Alexandre Petrenko	Antipattern-Based Detection of Deficiencies in Java Multithreaded Software.	QSIC	2004	DBLP DOI BibTeX RDF
9	Christian Tenllado, Carlos García 0001, Manuel Prieto 0001, Luis Piñuel, Francisco Tirado	Exploiting Multilevel Parallelism Within Modern Microprocessors: DWT as a Case Study.	VECPAR	2004	DBLP DOI BibTeX RDF
9	Jinmin Yang, Dafang Zhang, Zheng Qin 0001, Xue Dong Yang	WINDAR: A Multithreaded Rollback-Recovery Toolkit on Windows.	PRDC	2004	DBLP DOI BibTeX RDF
9	Bharath Iyer, Sadagopan Srinivasan, Bruce L. Jacob	Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs.	ISCA	2004	DBLP DOI BibTeX RDF
9	Rakesh Kumar 0002, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P. Jouppi, Keith I. Farkas	Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance.	ISCA	2004	DBLP DOI BibTeX RDF
9	T. N. Vijaykumar, Zeshan Chishti	Wire Delay is Not a Problem for SMT (In the Near Future).	ISCA	2004	DBLP DOI BibTeX RDF
9	Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam G. Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip J. Restle, Ronald N. Kalla, Joseph McGill, J. Steve Dodson	Design and implementation of the POWER5 microprocessor.	DAC	2004	DBLP DOI BibTeX RDF	POWER5, simultaneous multi-threading (SMT), clock gating, power reduction, microprocessor design, temperature sensor
9	Byung In Moon, Hongil Yoon, Ilgu Yun, Sungho Kang	An In-Order SMT Architecture with Static Resource Partitioning for Consumer Applications.	PDCAT	2004	DBLP DOI BibTeX RDF
9	Jack B. Dennis	Fresh Breeze: a multiprocessor chip architecture guided by modular programming principles.	SIGARCH Comput. Archit. News	2003	DBLP DOI BibTeX RDF
9	Dorit Naishlos, Joseph Nuzman, Chau-Wen Tseng, Uzi Vishkin	Towards a First Vertical Prototyping of an Extremely Fine-Grained Parallel Programming Approach.	Theory Comput. Syst.	2003	DBLP DOI BibTeX RDF
9	Steven E. Raasch, Steven K. Reinhardt	The Impact of Resource Partitioning on SMT Processors.	IEEE PACT	2003	DBLP DOI BibTeX RDF
9	Jeff Napper, Lorenzo Alvisi, Harrick M. Vin	A Fault-Tolerant Java Virtual Machine.	DSN	2003	DBLP DOI BibTeX RDF
9	Claudio Basile, Zbigniew Kalbarczyk, Ravishankar K. Iyer	A Preemptive Deterministic Scheduling Algorithm for Multithreaded Replicas.	DSN	2003	DBLP DOI BibTeX RDF
9	Judith Hippold, Gudula Rünger	A Communication API for Implementing Irregular Algorithms on SMP Clusters.	PVM/MPI	2003	DBLP DOI BibTeX RDF
9	Stefan Kuhlins, Axel Korthaus	A multithreaded Java framework for information extraction in the context of enterprise application integration.	ISICT	2003	DBLP DOI BibTeX RDF
9	Vincent Danjean, Raymond Namyst	Controlling Kernel Scheduling from User Space: An Approach to Enhancing Applications' Reactivity to I/O Events.	HiPC	2003	DBLP DOI BibTeX RDF
9	Konstantin Popov, Vladimir Vlassov, Mahmoud Rafea, Fredrik Holmgren, Per Brand, Seif Haridi	Parallel Agent-Based Simulation on a Cluster of Workstations.	Euro-Par	2003	DBLP DOI BibTeX RDF
9	Bernd Mohr, Felix Wolf 0001	KOJAK - A Tool Set for Automatic Performance Analysis of Parallel Programs.	Euro-Par	2003	DBLP DOI BibTeX RDF
9	Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Compiler-Assisted Thread Level Control Speculation.	Euro-Par	2003	DBLP DOI BibTeX RDF
9	Chulho Shin, Seong-Won Lee, Jean-Luc Gaudiot	Dynamic Scheduling Issues in SMT Architectures.	IPDPS	2003	DBLP DOI BibTeX RDF
9	Guang R. Gao, Kevin B. Theobald, Ramaswamy Govindarajan, Clement Leung, Ziang Hu, Haiping Wu, Jizhu Lu, Juan del Cuvillo, Adeline Jacquet, Vincent Janot, Thomas L. Sterling	Programming Models and System Software for Future High-End Computing Systems: Work-in-Progress.	IPDPS	2003	DBLP DOI BibTeX RDF
9	Adeline Jacquet, Vincent Janot, Clement Leung, Guang R. Gao, Ramaswamy Govindarajan, Thomas L. Sterling	An Executable Analytical Performance Evaluation Approach for Early Performance Prediction.	IPDPS	2003	DBLP DOI BibTeX RDF
9	Ayose Falcón, Oliverio J. Santana, Alex Ramírez, Mateo Valero	Tolerating Branch Predictor Latency on SMT.	ISHPC	2003	DBLP DOI BibTeX RDF	branch predictor delay, decoupled fetch, predictorpipelining, SMT
9	Tomasz Olas, Roman Wyrzykowski, Adam Tomas, Konrad Karczewski	Performance Modeling of Parallel FEM Computations on Clusters.	PPAM	2003	DBLP DOI BibTeX RDF
9	Federico Meza, Alvaro E. Campos, Cristian Ruz	On the Design and Implementation of a Portable DSM System for Low-Cost Multicomputers.	ICCSA (1)	2003	DBLP DOI BibTeX RDF	distributed systems, parallel programming, Distributed shared memory, parallel systems, multicomputers
9	Min Xu, Rastislav Bodík, Mark D. Hill	A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay.	ISCA	2003	DBLP DOI BibTeX RDF
9	Il Park 0001, Babak Falsafi, T. N. Vijaykumar	Iimplicitly-Multithreaded Processors.	ISCA	2003	DBLP DOI BibTeX RDF
9	Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve	RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors.	Computer	2002	DBLP DOI BibTeX RDF
9	Peter Pirsch, Achim Freimann, C. Klar, Jens Peter Wittenburg	Processor Architectures for Multimedia Applications.	Embedded Processor Design Challenges	2002	DBLP DOI BibTeX RDF
9	Jessica Chen	Formal Modelling of Java GUI Event Handling.	ICFEM	2002	DBLP DOI BibTeX RDF	Java Swing and AWT, Model Checking, Concurrency, Nondeterminism, Labelled Transition Systems
9	Darryl J. Genovesi, Lyle N. Long	An object-oriented approach to the DSMC method.	Java Grande	2002	DBLP DOI BibTeX RDF	DSMC, gas/fluid dynamics, Java, OOP
9	Dirk Grunwald, Soraya Ghiasi	Microarchitectural denial of service: insuring microarchitectural fairness.	MICRO	2002	DBLP DOI BibTeX RDF
9	José F. Martínez, Jose Renau, Michael C. Huang 0001, Milos Prvulovic, Josep Torrellas	Cherry: checkpointed early resource recycling in out-of-order microprocessors.	MICRO	2002	DBLP DOI BibTeX RDF
9	Perry H. Wang, Hong Wang 0003, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen	Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.	HPCA	2002	DBLP DOI BibTeX RDF